| 648fe99e | 20-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Ignore the revision field of the IDCODE
The revision field may change between silicon revisions without changing the mapping to a part. This avoids errors like: ERROR: Incorrect XILINX IDC
zynqmp: Ignore the revision field of the IDCODE
The revision field may change between silicon revisions without changing the mapping to a part. This avoids errors like: ERROR: Incorrect XILINX IDCODE 0x14738093, maskid 0x4600093 NOTICE: ATF running on XCZUUNKN/EP108 v3/RTL5.1 at 0xfffe5000 on parts with a newer revision.
Reported-by: Love Kumar <love.kumar@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Love Kumar <love.kumar@xilinx.com>
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| 03b80773 | 20-May-2016 |
Stefan Krsmanovic <stefan.krsmanovic@aggios.com> |
zynqmp: Add bakery_lock to protect APU_PWRCTRL register access
Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure in order to save valid state. If more than one CPU is access
zynqmp: Add bakery_lock to protect APU_PWRCTRL register access
Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure in order to save valid state. If more than one CPU is accessing this register it can be left in corrupted state during read-modify-write process.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 8212f1f0 | 20-May-2016 |
Stefan Krsmanovic <stefan.krsmanovic@aggios.com> |
zynqmp: Put pm_secure_lock in coherent memory region
DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region. ARM Trusted Firmware design guide, chapter 11 states that bakery_lock d
zynqmp: Put pm_secure_lock in coherent memory region
DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region. ARM Trusted Firmware design guide, chapter 11 states that bakery_lock data structures should be allocated in coherent memory region because it is accessed by multiple CPUs with mismatched shareability, cacheability and memory attributes.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| fc65b87b | 12-May-2016 |
Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> |
zynqmp: pm: Implement pm_register_notifier PM API function
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: So
zynqmp: pm: Implement pm_register_notifier PM API function
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 493541d6 | 12-May-2016 |
Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> |
zynqmp: pm: Implemented 'get_op_characteristic' PM API call
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: S
zynqmp: pm: Implemented 'get_op_characteristic' PM API call
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| df4c59c5 | 12-May-2016 |
Filip Drazic <filip.drazic@aggios.com> |
zynqmp: pm: Removed double declaration of pm_ipi_send functions
Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-
zynqmp: pm: Removed double declaration of pm_ipi_send functions
Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 142ec043 | 22-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Reduce mapped memory area
The GIC area is specified larger than it needs to be and can be reduced. Which allows reducing the structures required for the translation tables as well. This resu
zynqmp: Reduce mapped memory area
The GIC area is specified larger than it needs to be and can be reduced. Which allows reducing the structures required for the translation tables as well. This results in a reduction of memory footprint of ca. 4k.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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| 6704f425 | 05-May-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Replace Rockchip delay timer by generic one
Use the generic delay timer instead of having a specific platform file for configuring it.
Change-Id: Ifa68b9c97cd96ae1190cee74d22d729af95e4537 |
| 1d0b990e | 05-May-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Replace MediaTek delay timer by generic one
Use the generic delay timer instead of having a specific platform file for configuring it.
Change-Id: If6b8f60bc04230f4b85b2bcc1b670fc65461214e |
| 32cd95f0 | 17-May-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Replace SP804 timer by generic delay timer on FVP
Added a build flag to select the generic delay timer on FVP instead of the SP804 timer. By default, the generic one will be selected. The user guide
Replace SP804 timer by generic delay timer on FVP
Added a build flag to select the generic delay timer on FVP instead of the SP804 timer. By default, the generic one will be selected. The user guide has been updated.
Change-Id: Ica34425c6d4ed95a187b529c612f6d3b26b78bc6
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| f3d3b316 | 19-May-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Implement plat_get_syscnt_freq2 on platforms
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all upstream platforms.
Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe |
| d4486391 | 18-May-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Add 32 bit version of plat_get_syscnt_freq
Added plat_get_syscnt_freq2, which is a 32 bit variant of the 64 bit plat_get_syscnt_freq. The old one has been flagged as deprecated. Common code has been
Add 32 bit version of plat_get_syscnt_freq
Added plat_get_syscnt_freq2, which is a 32 bit variant of the 64 bit plat_get_syscnt_freq. The old one has been flagged as deprecated. Common code has been updated to use this new version. Porting guide has been updated.
Change-Id: I9e913544926c418970972bfe7d81ee88b4da837e
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| d1d71653 | 12-May-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #622 from mtk09422/hw-crypt-v3
Hw crypt v3 |
| 7ace1cc0 | 11-May-2016 |
Yi Zheng <yi.zheng@mediatek.com> |
MT8173: Add Sip function for MTK HW crypt driver
Change-Id: Idc40cc6243e532567ec4334ae37d97c003c90bfa Signed-off-by: Yi Zheng <yi.zheng@mediatek.com> |
| b659b1a7 | 11-May-2016 |
Jimmy Huang <jimmy.huang@mediatek.com> |
mt8173: Reorganize plat SiP functions
Due to the changes in Mediatek platform common code, we need to move plat related SiP functions to plat folder.
Change-Id: I6b14b988235205a5858b4bf49043bc79d05
mt8173: Reorganize plat SiP functions
Due to the changes in Mediatek platform common code, we need to move plat related SiP functions to plat folder.
Change-Id: I6b14b988235205a5858b4bf49043bc79d0512b06 Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
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| 80fb66b3 | 05-May-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Rockchip: Add some debug assertions in the PMU driver
This patch adds some debug assertions ensuring that array indices are within the bounds of the array.
Change-Id: I96ee81d14834c1e92cdfb7e60b499
Rockchip: Add some debug assertions in the PMU driver
This patch adds some debug assertions ensuring that array indices are within the bounds of the array.
Change-Id: I96ee81d14834c1e92cdfb7e60b49995cdacfd93a
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| 8fc83577 | 04-May-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #618 from rockchip-linux/fixes-for-suspend/resume
rockchip: support the suspend/resume for rk3399 |
| 2edaa749 | 04-May-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #617 from leon-chen-mtk/refactor_common_1
Refactor MediaTek platform common code |
| f47a25dd | 10-Apr-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: support the suspend/resume for rk3399
This patch adds to support the suspend/resume for rk3399 SoCs.
Signed-off-by: Shengfei xu <xsf@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-c
rockchip: support the suspend/resume for rk3399
This patch adds to support the suspend/resume for rk3399 SoCs.
Signed-off-by: Shengfei xu <xsf@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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| cf906b2a | 28-Apr-2016 |
Leon Chen <leon.chen@mediatek.com> |
Refactor MediaTek platform common code
Refactor MediaTek platform common code for further mt6795 upstream. |
| a8af6a4d | 07-Apr-2016 |
Soby Mathew <soby.mathew@arm.com> |
Change the default driver to GICv3 in FVP
This patch changes the default driver for FVP platform from the deprecated GICv3 legacy to the GICv3 only driver. This means that the default build of Trust
Change the default driver to GICv3 in FVP
This patch changes the default driver for FVP platform from the deprecated GICv3 legacy to the GICv3 only driver. This means that the default build of Trusted Firmware will not be able boot Linux kernel with GICv2 FDT blob. The user guide is also updated to reflect this change of default GIC driver for FVP.
Change-Id: Id6fc8c1ac16ad633dabb3cd189b690415a047764
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| 21a3973d | 13-Jan-2016 |
Soby Mathew <soby.mathew@arm.com> |
Remove support for legacy VE memory map in FVP
This patch removes support for legacy Versatile Express memory map for the GIC peripheral in the FVP platform. The user guide is also updated for the s
Remove support for legacy VE memory map in FVP
This patch removes support for legacy Versatile Express memory map for the GIC peripheral in the FVP platform. The user guide is also updated for the same.
Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533
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| 1969625a | 26-Apr-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms
This patch puts the definition of `plat_get_syscnt_freq()` under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file. This is t
Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms
This patch puts the definition of `plat_get_syscnt_freq()` under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file. This is the fix for compilation error introduced by commit-id `749ade4`, for platforms that use arm_common.c but do not provide a memory mapped interface to the generic counter.
Fixes ARM-software/tf-issues#395
Change-Id: I2f2b10bd9500fa15308541ccb15829306a76a745
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| b96f77c6 | 15-Jun-2015 |
Michal Simek <michal.simek@xilinx.com> |
zynqmp: FSBL->ATF handover
Parse the parameter structure the FSBL populates, to populate the bl32 and bl33 image structures.
Cc: Sarat Chand Savitala <saratcha@xilinx.com> Cc: petalinux-dev@xilinx.
zynqmp: FSBL->ATF handover
Parse the parameter structure the FSBL populates, to populate the bl32 and bl33 image structures.
Cc: Sarat Chand Savitala <saratcha@xilinx.com> Cc: petalinux-dev@xilinx.com Signed-off-by: Michal Simek <michal.simek@xilinx.com> [ SB - pass pointers to structs instead of structs - handle execution state parameter - populate bl32 SPSR - add documentation - query bootmode and consider missing handoff parameters an error when not in JTAG boot mode ] Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 2cb5bac9 | 18-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Introduce zynqmp_get_bootmode
Provide a function to retrieve the bootmode.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> |