| ab3a33fe | 23-Dec-2016 |
Steven Kao <skao@nvidia.com> |
Tegra186: mce: max retries for ARI requests
This patch adds max retries for all ARI requests and asserts
if the ARI request is still busy.
Change-Id: I454ad9b557bb59e513e4c0c6f071275c87d0e07a
Signe
Tegra186: mce: max retries for ARI requests
This patch adds max retries for all ARI requests and asserts
if the ARI request is still busy.
Change-Id: I454ad9b557bb59e513e4c0c6f071275c87d0e07a
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| e99eeec6 | 23-Dec-2016 |
Steven Kao <skao@nvidia.com> |
Tegra: memmap Tegra micro-seconds timer controller
This patch adds the Tegra micro-seconds controller to the
memory map. This allows us to use the delay_timer functionality.
Change-Id: Ia8b148a8719
Tegra: memmap Tegra micro-seconds timer controller
This patch adds the Tegra micro-seconds controller to the
memory map. This allows us to use the delay_timer functionality.
Change-Id: Ia8b148a871949bfede539974cacbe0e93ec7e77c
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| d29d96fb | 21-Oct-2016 |
Steven Kao <skao@nvidia.com> |
Tegra: early init the delay timer
This patch moves the platform delay timer init to early BL31
platform setup, so that platforms can use the udelay/mdelay
routines in the early init code.
Change-Id
Tegra: early init the delay timer
This patch moves the platform delay timer init to early BL31
platform setup, so that platforms can use the udelay/mdelay
routines in the early init code.
Change-Id: I6fe20b76176ea22589539c180c5b6f9d09eda8de
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| 0f22bef3 | 29-Apr-2017 |
Scott Branden <sbranden@users.noreply.github.com> |
Merge branch 'integration' into tf_issue_461 |
| 53d9c9c8 | 10-Apr-2017 |
Scott Branden <scott.branden@broadcom.com> |
Move defines in utils.h to utils_def.h to fix shared header compile issues
utils.h is included in various header files for the defines in it.
Some of the other header files only contain defines. Th
Move defines in utils.h to utils_def.h to fix shared header compile issues
utils.h is included in various header files for the defines in it.
Some of the other header files only contain defines. This allows the
header files to be shared between host and target builds for shared defines.
Recently types.h has been included in utils.h as well as some function
prototypes.
Because of the inclusion of types.h conflicts exist building host tools
abd these header files now. To solve this problem,
move the defines to utils_def.h and have this included by utils.h and
change header files to only include utils_def.h and not pick up the new
types.h being introduced.
Fixes ARM-software/tf-issues#461
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Remove utils_def.h from utils.h
This patch removes utils_def.h from utils.h as it is not required.
And also makes a minor change to ensure Juno platform compiles.
Change-Id: I10cf1fb51e44a8fa6dcec02980354eb9ecc9fa29
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|
| bf097cac | 28-Mar-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Tegra: Control inclusion of helper code used for asserts
One assert depends on code that is conditionally compiled based on the
DEBUG define. This patch modifies the conditional inclusion of such co
Tegra: Control inclusion of helper code used for asserts
One assert depends on code that is conditionally compiled based on the
DEBUG define. This patch modifies the conditional inclusion of such code
so that it is based on the ENABLE_ASSERTIONS build option.
Change-Id: Ic5659a3db8632593b9d2e83dac6d30afd87c131d
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| cd3b7eb4 | 26-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: smmu: enable asserts by default
This patch enables the assert in the context save routine
by default, for all flavours of the build.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
| 6c16918f | 26-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: enable 'ENABLE_ASSERTIONS' for all builds
This patch changes the platform Makefile to set `ENABLE_ASSERTIONS` to
1 instead of the deprecated option `ASM_ASSERTION`. This also pulls in
C asser
Tegra: enable 'ENABLE_ASSERTIONS' for all builds
This patch changes the platform Makefile to set `ENABLE_ASSERTIONS` to
1 instead of the deprecated option `ASM_ASSERTION`. This also pulls in
C assertions in release mode.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| 03af25bc | 26-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: group platform settings together
This patch groups all the platform configuration macros into
the common platform.mk makefile.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
| 0d5ec955 | 24-Apr-2017 |
tony.xie <tony.xie@rock-chips.com> |
rockchip: rk3328: support rk3328
rk3328 is a Quad-core soc and Cortex-a53 inside!
This patch supports the following functions:
1、power up/off cpus
2、suspend/resume cpus
3、suspend/resume system
4、rese
rockchip: rk3328: support rk3328
rk3328 is a Quad-core soc and Cortex-a53 inside!
This patch supports the following functions:
1、power up/off cpus
2、suspend/resume cpus
3、suspend/resume system
4、reset system
5、power off system
Change-Id: I60687058d13912c6929293b06fed9c6bc72bdc84
Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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|
| abd2aba9 | 09-Dec-2016 |
Soby Mathew <soby.mathew@arm.com> |
CSS: Allow system suspend only via PSCI SYSTEM_SUSPEND API
The CSS power management layer previously allowed to suspend system
power domain level via both PSCI CPU_SUSPEND and PSCI SYSTEM_SUSPEND
AP
CSS: Allow system suspend only via PSCI SYSTEM_SUSPEND API
The CSS power management layer previously allowed to suspend system
power domain level via both PSCI CPU_SUSPEND and PSCI SYSTEM_SUSPEND
APIs. System suspend via PSCI CPU_SUSPEND was always problematic to
support because of issues with targeting wakeup interrupts to
suspended cores before the per-cpu GIC initialization is done. This
is not the case for PSCI SYSTEM_SUSPEND API because all the other
cores are expected to be offlined prior to issuing system suspend and
PSCI CPU_ON explicit calls will be made to power them on. Hence the Juno
platform used to downgrade the PSCI CPU_SUSPEND request for system
power domain level to cluster level by overriding the default
`plat_psci_pm_ops` exported by CSS layer.
Given the direction the new CSS platforms are evolving, it is best to
limit the system suspend only via PSCI SYSTEM_SUSPEND API for all
CSS platforms. This patch makes changes to allow system suspend
only via PSCI SYSTEM_SUSPEND API. The override of `plat_psci_ops`
for Juno is removed.
Change-Id: Idb30eaad04890dd46074e9e888caeedc50a4b533
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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|
| 3fb340a2 | 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #912 from vwadekar/tegra-smmu-ctx-save-robust
Tegra: smmu: make the context save sequence robust |
| 484acce3 | 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #910 from dp-arm/dp/AArch32-juno-port
Add AArch32 support for Juno |
| 94e0ed60 | 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #902 from vwadekar/tegra186-sip-mce-calls
Tegra186: Support AARCH32/64 encoding for MCE calls |
| 228bfaba | 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #903 from antonio-nino-diaz-arm/an/build-xlat-v1
ARM platforms: Add option to use xlat tables lib v1 |
| 2edf6482 | 21-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #906 from antonio-nino-diaz-arm/an/asserts-release
Add `ENABLE_ASSERTIONS` build option |
| 63ac1a2a | 21-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: smmu: make the context save sequence robust
This patch sanity checks the SMMU context created by the platform
code. The first entry contains the size of the array; which the
driver now verifi
Tegra: smmu: make the context save sequence robust
This patch sanity checks the SMMU context created by the platform
code. The first entry contains the size of the array; which the
driver now verifies before moving on with the save.
This patch also fixes an error in the calculation of the size of
the context that gets copied to TZDRAM.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| 6f249345 | 14-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Add SP_MIN support for JUNO
This patch adds support for SP_MIN on JUNO platform.
The changes include addition of AArch32 assembly files,
JUNO specific SP_MIN make file and miscellaneous cha
AArch32: Add SP_MIN support for JUNO
This patch adds support for SP_MIN on JUNO platform.
The changes include addition of AArch32 assembly files,
JUNO specific SP_MIN make file and miscellaneous changes
in ARM platform files to enable support for SP_MIN.
Change-Id: Id1303f422fc9b98b9362c757b1a4225a16fffc0b
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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|
| 07570d59 | 14-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Changes to support execution in AArch32 state for JUNO
Following steps are required to boot JUNO in AArch32 state:
1> BL1, in AArch64 state, loads BL2.
2> BL2, in AArch64 state, initializes DDR.
L
Changes to support execution in AArch32 state for JUNO
Following steps are required to boot JUNO in AArch32 state:
1> BL1, in AArch64 state, loads BL2.
2> BL2, in AArch64 state, initializes DDR.
Loads SP_MIN & BL33 (AArch32 executable)images.
Calls RUN_IMAGE SMC to go back to BL1.
3> BL1 writes AArch32 executable opcodes, to load and branch
at the entrypoint address of SP_MIN, at HI-VECTOR address and
then request for warm reset in AArch32 state using RMR_EL3.
This patch makes following changes to facilitate above steps:
* Added assembly function to carry out step 3 above.
* Added region in TZC that enables Secure access to the
HI-VECTOR(0xFFFF0000) address space.
* AArch32 image descriptor is used, in BL2, to load
SP_MIN and BL33 AArch32 executable images.
A new flag `JUNO_AARCH32_EL3_RUNTIME` is introduced that
controls above changes. By default this flag is disabled.
NOTE: BL1 and BL2 are not supported in AArch32 state for JUNO.
Change-Id: I091d56a0e6d36663e6d9d2bb53c92c672195d1ec
Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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|
| 0498343a | 11-Apr-2017 |
dp-arm <dimitris.papastamos@arm.com> |
css: Ensure PSCI system off/reset is not interrupted
If there is a pending interrupt, it is possible for the AP to come out
of the final WFI before SCP has a chance to act on it. Prevent this
by di
css: Ensure PSCI system off/reset is not interrupted
If there is a pending interrupt, it is possible for the AP to come out
of the final WFI before SCP has a chance to act on it. Prevent this
by disabling the GIC CPU interface before issuing a WFI.
Previously, SCP would not wait on WFI before taking an action but
would shut down the core or system regardless.
Change-Id: Ib0bcf69a515d540ed4f73c11e40ec7c863e39c92
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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|
| 044bb2fa | 20-Apr-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove build option `ASM_ASSERTION`
The build option `ENABLE_ASSERTIONS` should be used instead. That way
both C and ASM assertions can be enabled or disabled together.
All occurrences of `ASM_ASSE
Remove build option `ASM_ASSERTION`
The build option `ENABLE_ASSERTIONS` should be used instead. That way
both C and ASM assertions can be enabled or disabled together.
All occurrences of `ASM_ASSERTION` in common code and ARM platforms have
been replaced by `ENABLE_ASSERTIONS`.
ASM_ASSERTION has been removed from the user guide.
Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| 0741c96b | 19-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: smmu: fix the size used to save context
This patch fixes the size used to save the context, when the
device enters System Suspend.
Reported by: David Cunado
Signed-off-by: Varun Wadekar <vw
Tegra: smmu: fix the size used to save context
This patch fixes the size used to save the context, when the
device enters System Suspend.
Reported by: David Cunado
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| 3b211ff5 | 11-Apr-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
ARM platforms: Add option to use xlat tables lib v1
ARM platforms have migrated to the translation tables library v2.
However, for testing purposes, it can be useful to temporarily switch
back to th
ARM platforms: Add option to use xlat tables lib v1
ARM platforms have migrated to the translation tables library v2.
However, for testing purposes, it can be useful to temporarily switch
back to the old version.
This patch introduces the option `ARM_XLAT_TABLES_LIB_V1`, that switches
to v1 of the library when is set to 1. By default, it is 0, so that ARM
platforms use the new version unless specifically stated.
Updated User Guide.
Change-Id: I53d3c8dd97706f6af9c6fca0364a88ef341efd31
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| c76c1b71 | 17-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra186: Support AARCH32/64 encoding for MCE calls
On Tegra systems, there are multiple software components that
require to interact with MCE. The components can either be 32-bit
or 64-bit payloads
Tegra186: Support AARCH32/64 encoding for MCE calls
On Tegra systems, there are multiple software components that
require to interact with MCE. The components can either be 32-bit
or 64-bit payloads. This patch supports MCE SMC functions ID for
AARCH32 and AARCH64 architectures to support such clients.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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|
| 3d21c945 | 16-Apr-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #899 from vwadekar/tegra186-platform-support-v6
Tegra186 platform support v6 |