Merge pull request #1070 from rockchip-linux/rk3399-fixes-logic

rockchip/rk3399: Support Turning off VD_LOGIC during suspend-to-ram

Merge pull request #1068 from jenswi-linaro/optee_arm_plat

Optee arm platform common

rockchip/rk3399: reinitilize secure sgrf when resume

when shutdown logic power rail, the some sgrf register
value will reset, so need to reinitilize secure.

Change-Id: I8ad0570432e54441fe1c60dd2960

rockchip/rk3399: reinitilize secure sgrf when resume

when shutdown logic power rail, the some sgrf register
value will reset, so need to reinitilize secure.

Change-Id: I8ad0570432e54441fe1c60dd2960a81fd58f7163
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip/rk3399: do secure timer init in pmusram

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc1

rockchip/rk3399: do secure timer init in pmusram

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc197f56223e6fff9167556c1c5e3bc
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4

we do not have enough pmusram space now, so use slice1 to restore
ddr slice1 ~ slice4, that's will save more pmusram space.

Change-Id: Id5

rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4

we do not have enough pmusram space now, so use slice1 to restore
ddr slice1 ~ slice4, that's will save more pmusram space.

Change-Id: Id54a7944f33d01a8f244cee6a8a0707bfe4d42da
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip/rk3399: disable more powerdomain prepare for shutdown logic rail

Change-Id: Ia59adf48cf14eb627721264765bce50cb31065ef
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: save and restore pd_alive register

pd_alive control cru, grf, timer, gpio and wdt, when
turn off logic power rail, these register value will
back to reset value, we need to save the

rockchip/rk3399: save and restore pd_alive register

pd_alive control cru, grf, timer, gpio and wdt, when
turn off logic power rail, these register value will
back to reset value, we need to save them value in suspend
and restore them when resuem, since timer will reinitial
in kernel, so it not need to save/restore.

Change-Id: I0fc2a011d3cdc04b66ffbf728e769eb28b51ee38
Signed-off-by: Lin Huang <hl@rock-chips.com>

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Hikey: enable watchdog reset

At the system boot time we need enable watchdog reset, otherwise after
the watchdog is timeout it cannot reset the SoC. We need set the bit 0
and bit 16 together, the bi

Hikey: enable watchdog reset

At the system boot time we need enable watchdog reset, otherwise after
the watchdog is timeout it cannot reset the SoC. We need set the bit 0
and bit 16 together, the bit 16 is mask bit so after set bit 16 we have
permission to operate bit 0 and bit 0 is watchdog reset enabling bit.

Signed-off-by: Leo Yan <leo.yan@linaro.org>

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rockchip/rk3399: set ddr clock source back to dpll when ddr resume

when logic power rail shutdown, CRU register will back to reset
value, ddr use abpll as clock source when do suspend, we need to sa

rockchip/rk3399: set ddr clock source back to dpll when ddr resume

when logic power rail shutdown, CRU register will back to reset
value, ddr use abpll as clock source when do suspend, we need to save
and dpll value in pmusram, then set back these ddr clock back to dpll
when dddr resume.

Change-Id: I95dc0173649e8515859cfa46b40a606e0cc2fe3f
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip/rk3399: reinitilize debug uart when resume

when shutdown logic power rail, the uart register value will reset,
so need to reinitilize debug uart.

Change-Id: I48d3535c0068fd671dea6ea32e9086

rockchip/rk3399: reinitilize debug uart when resume

when shutdown logic power rail, the uart register value will reset,
so need to reinitilize debug uart.

Change-Id: I48d3535c0068fd671dea6ea32e908612992faf62
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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Merge pull request #1064 from islmit01/im/shifted_afinity

FVP: Always assume shifted affinity with MT bit

Merge pull request #1061 from robertovargas-arm/norflash

nor-flash

FVP: bl2: optionally map ARM_OPTEE_PAGEABLE_LOAD_MEM

If SPD_opteed is defined map ARM_OPTEE_PAGEABLE_LOAD_MEM in bl2 to
allow loading of OP-TEE paged part.

Signed-off-by: Jens Wiklander <jens.wikla

FVP: bl2: optionally map ARM_OPTEE_PAGEABLE_LOAD_MEM

If SPD_opteed is defined map ARM_OPTEE_PAGEABLE_LOAD_MEM in bl2 to
allow loading of OP-TEE paged part.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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qemu: Add OP-TEE extra image parsing support

OP-TEE may have extra images to be loaded. Load them one by one and do
the parsing. In this patch, ARM TF need to load up to 3 images for
OP-TEE: header,

qemu: Add OP-TEE extra image parsing support

OP-TEE may have extra images to be loaded. Load them one by one and do
the parsing. In this patch, ARM TF need to load up to 3 images for
OP-TEE: header, pager and pages images. Header image is the info about
optee os and images. Pager image include pager code and data. Paged
image include the paging parts using virtual memory.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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qemu: replace deprecated plat_psci_common.c

Change to compile with new plat/common/plat_psci_common.c instead of the old
deprecated plat/common/aarch64/plat_psci_common.c

Signed-off-by: Jens Wiklan

qemu: replace deprecated plat_psci_common.c

Change to compile with new plat/common/plat_psci_common.c instead of the old
deprecated plat/common/aarch64/plat_psci_common.c

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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qemu: replace deprecated ADDR_SPACE_SIZE

Replaces the deprecated ADDR_SPACE_SIZE with PLAT_PHY_ADDR_SPACE_SIZE
and PLAT_VIRT_ADDR_SPACE_SIZE.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.or

qemu: replace deprecated ADDR_SPACE_SIZE

Replaces the deprecated ADDR_SPACE_SIZE with PLAT_PHY_ADDR_SPACE_SIZE
and PLAT_VIRT_ADDR_SPACE_SIZE.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>

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FVP: Always assume shifted affinity with MT bit

At present, the MPIDR validation on FVP relies on MT bit set along
with shifted affinities. This currently is additionally dependent
on the FVP model

FVP: Always assume shifted affinity with MT bit

At present, the MPIDR validation on FVP relies on MT bit set along
with shifted affinities. This currently is additionally dependent
on the FVP model being of variant C. This however should be based
on the presence of MT bit alone.

This patch makes the change to always assume that the affinities
are shifted in the FVP model when MT bit is present.

Change-Id: I09fcb0126e1b38d29124bdeaf3450a60b95d485d
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>

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norflash: Add full status check

The nor_XXXXX functions may fail due to different reasons, and it
is convenient to do a full check to detect any failure. It is also
a good idea to have a specific fu

norflash: Add full status check

The nor_XXXXX functions may fail due to different reasons, and it
is convenient to do a full check to detect any failure. It is also
a good idea to have a specific function to do a full status check,
because new checks can be added to this function and they will be
incorporated automatically to any function calling it.

Change-Id: I54fed913e37ef574c1608e94139a519426348d12
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Merge pull request #1053 from jwerner-chromium/JW_func_align

Add new alignment parameter to func assembler macro

norflash: Add nor_erase() to NOR driver

NOR memory only supports setting bits to 1. To clear a bit, set to zero,
the NOR memory needs to be erased.

Change-Id: Ia82eb15a5af9a6d4fc7e5ea2b58e6db87226b

norflash: Add nor_erase() to NOR driver

NOR memory only supports setting bits to 1. To clear a bit, set to zero,
the NOR memory needs to be erased.

Change-Id: Ia82eb15a5af9a6d4fc7e5ea2b58e6db87226b351
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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norflash: Clear status register before sending commands

The status register bits remain until explicitly cleared, which means
that a command can be incorrectly considered to have generated an error

norflash: Clear status register before sending commands

The status register bits remain until explicitly cleared, which means
that a command can be incorrectly considered to have generated an error -
for example, after reset the status register contents may be unknown or
if a previous command had failed.

This patch clears the status register before beginning any command to
be sure that the status register only represents information about the
current operation.

Change-Id: I9e98110ee24179937215461c00b6543a3467b350
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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norflash: Wait for WSM bit in lock/unlock

lock/unlock operation must wait until WSM bit
is set. Since we do not allow to loop forever then these functions
must return an error if WSM bit isn't enabl

norflash: Wait for WSM bit in lock/unlock

lock/unlock operation must wait until WSM bit
is set. Since we do not allow to loop forever then these functions
must return an error if WSM bit isn't enabled after a number of tries.

Change-Id: I21c9e292b514b28786ff4a225128bcd8c1bfa999
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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norflash: clean-up norflash.c

- Add comments to all the functions
- Simplify nor_poll_dws
- Simplify nor_word_program

Change-Id: I29c0199d2908a4fceb1ac3430fcfdd699be22bb3
Signed-off-by: Roberto Var

norflash: clean-up norflash.c

- Add comments to all the functions
- Simplify nor_poll_dws
- Simplify nor_word_program

Change-Id: I29c0199d2908a4fceb1ac3430fcfdd699be22bb3
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Merge pull request #1051 from Kevin-WangTao/fix_suspend_issue

Hikey960: fix PSCI suspend stuck issue

Hikey960: fix PSCI suspend stuck issue

Clear the cpuidle flag when resuming from idle. This flag is set
when entering idle, and if it remains set when resuming, it can
prevent the cluster from power

Hikey960: fix PSCI suspend stuck issue

Clear the cpuidle flag when resuming from idle. This flag is set
when entering idle, and if it remains set when resuming, it can
prevent the cluster from powering off during the next system
suspend operation. During system suspend, all CPUs are plugged
out except the last CPU, which is suspended. If any of the
cpuidle flags are set at this point, the last CPU will be stuck
in a WFI loop and will not be powered off.
This problem only occurs during system suspend.

Signed-off-by: Tao Wang <kevin.wangtao@linaro.org>

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