Merge pull request #1081 from masahir0y/uniphier

uniphier: fix-up for PXs3 SoC

hikey*: Support Trusted OS extra image (OP-TEE header) parsing

Signed-off-by: Victor Chong <victor.chong@linaro.org>

hikey*: Add LOAD_IMAGE_V2 support

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>

uniphier: work around Boot ROM bug for USB boot mode of PXs3 SoC

Due to a bug in the Boot ROM, the USB load API turned out not working
as expected. It is unfixable because the Boot ROM is hard-wire

uniphier: work around Boot ROM bug for USB boot mode of PXs3 SoC

Due to a bug in the Boot ROM, the USB load API turned out not working
as expected. It is unfixable because the Boot ROM is hard-wired.

Add work around code in TF to bypass the problematic Boot ROM code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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uniphier: fix code indent for conditional statement

checkpatch.pl from Linux reports tons of coding style errors and
warnings. I am just fixing under plat/socionext/uniphier/.

Signed-off-by: Masah

uniphier: fix code indent for conditional statement

checkpatch.pl from Linux reports tons of coding style errors and
warnings. I am just fixing under plat/socionext/uniphier/.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge pull request #1072 from sandrine-bailleux-arm/sb/tsp-mapping

ARM platforms: Map TSP only when TSPD is included

Export KEY_ALG as a user build option

The `KEY_ALG` variable is used to select the algorithm for key
generation by `cert_create` tool for signing the certificates. This
variable was previously undoc

Export KEY_ALG as a user build option

The `KEY_ALG` variable is used to select the algorithm for key
generation by `cert_create` tool for signing the certificates. This
variable was previously undocumented and did not have a global default
value. This patch corrects this and also adds changes to derive the
value of `TF_MBEDTLS_KEY_ALG` based on `KEY_ALG` if it not set by the
platform. The corresponding assignment of these variables are also now
removed from the `arm_common.mk` makefile.

Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: I78e2d6f4fc04ed5ad35ce2266118afb63127a5a4

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ARM platforms: Map TSP only when TSPD is included

This patch ensures that the ARM_MAP_TSP_SEC_MEM memory region is mapped
in BL2 only if the TSPD has been included in the build. This saves one
entry

ARM platforms: Map TSP only when TSPD is included

This patch ensures that the ARM_MAP_TSP_SEC_MEM memory region is mapped
in BL2 only if the TSPD has been included in the build. This saves one
entry in the plat_arm_mmap[] array and avoids to map extra memory when
it's not needed.

Change-Id: I6ae60822ff8f0de198145925b0b0d45355179a94
Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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Merge pull request #1077 from soby-mathew/sm/fix_juno_assert_lvl

Juno: Define PLAT_LOG_LEVEL_ASSERT to LOG_LEVEL_INFO

Juno: Define PLAT_LOG_LEVEL_ASSERT to LOG_LEVEL_INFO

This patch fixes the PLAT_LOG_LEVEL_ASSERT to 40 which corresponds
to LOG_LEVEL_INFO. Having this level of log for assertions means that the
`ass

Juno: Define PLAT_LOG_LEVEL_ASSERT to LOG_LEVEL_INFO

This patch fixes the PLAT_LOG_LEVEL_ASSERT to 40 which corresponds
to LOG_LEVEL_INFO. Having this level of log for assertions means that the
`assert()` will not generate the strings implied in the expression taken
as parameter. This allows to save some memory when Juno is built for
LOG_LEVEL = LOG_LEVEL_VERBOSE and DEBUG = 1.

Fixes ARM-software/tf-issues#511

Change-Id: Id84a40f803ab07a5a8f6e587167af96694a07d04
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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Merge pull request #1069 from Leo-Yan/hikey_enable_watchdog_reset

Hikey: enable watchdog reset

Merge pull request #1075 from robertovargas-arm/fix_el3_payload

Don't use zero_normalmem in bl2_platform_setup

Don't use zero_normalmem in bl2_platform_setup

zero_normalmem only can zero memory when caches are enabled
and the target memory is a normal memory, otherwise an abort is
generated. In the case of E

Don't use zero_normalmem in bl2_platform_setup

zero_normalmem only can zero memory when caches are enabled
and the target memory is a normal memory, otherwise an abort is
generated. In the case of EL3_PAYLOAD_BASE bl2_platform_setup was
calling zero_normalmem with device memory and it generated an abort.

Change-Id: If013603f209a12af488a9c54481f97a8f395b26a
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

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Merge pull request #1062 from jeenu-arm/cpu-fixes

Cpu macro fixes

Merge pull request #1071 from jeenu-arm/syntax-fix

plat/arm: Fix ARM_INSTANTIATE_LOCK syntax anomaly

Tegra: Rename CORTEX_A57_ACTLR_EL1 to *CPUACTLR*

CORTEX_A57_ACTLR_EL1 macro refers to the CPUACTLR_EL1 register. Since
ACTLR_EL1 is a different register (not implemented in Cortex-A57) this
patch re

Tegra: Rename CORTEX_A57_ACTLR_EL1 to *CPUACTLR*

CORTEX_A57_ACTLR_EL1 macro refers to the CPUACTLR_EL1 register. Since
ACTLR_EL1 is a different register (not implemented in Cortex-A57) this
patch renames this macro for clarity.

Change-Id: I94d7d564cd2423ae032bbdd59a99d2dc535cdff6
Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com>

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HiKey: Rename CPUACTRL reg constants

Constants named as *ACTLR* refer in fact to the CPUACTRL_EL1 register.
Since ACTLR and ACTRL_EL1 are different registers this patch renames
these constants for c

HiKey: Rename CPUACTRL reg constants

Constants named as *ACTLR* refer in fact to the CPUACTRL_EL1 register.
Since ACTLR and ACTRL_EL1 are different registers this patch renames
these constants for clarity.

Change-Id: I2a9e402dab7b0fcb6e481ee0d8a11eda943ed299
Signed-off-by: Eleanor Bonnici <Eleanor.bonnici@arm.com>

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plat/arm: Fix ARM_INSTANTIATE_LOCK syntax anomaly

The current definition of ARM_INSTANTIATE_LOCK macro includes a
semicolon, which means it's omitted where it's used. This is anomalous
for a C state

plat/arm: Fix ARM_INSTANTIATE_LOCK syntax anomaly

The current definition of ARM_INSTANTIATE_LOCK macro includes a
semicolon, which means it's omitted where it's used. This is anomalous
for a C statement in global scope.

Fix this by removing semicolon from the definition; and where it's a
NOP, declare a file-scoped variable explicitly tagged as unused to avoid
compiler warning.

No functional changes.

Change-Id: I2c1d92ece4777e272a025011e03b8003f3543335
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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Merge pull request #1070 from rockchip-linux/rk3399-fixes-logic

rockchip/rk3399: Support Turning off VD_LOGIC during suspend-to-ram

Merge pull request #1068 from jenswi-linaro/optee_arm_plat

Optee arm platform common

rockchip/rk3399: reinitilize secure sgrf when resume

when shutdown logic power rail, the some sgrf register
value will reset, so need to reinitilize secure.

Change-Id: I8ad0570432e54441fe1c60dd2960

rockchip/rk3399: reinitilize secure sgrf when resume

when shutdown logic power rail, the some sgrf register
value will reset, so need to reinitilize secure.

Change-Id: I8ad0570432e54441fe1c60dd2960a81fd58f7163
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip/rk3399: do secure timer init in pmusram

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc1

rockchip/rk3399: do secure timer init in pmusram

we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.

Change-Id: I472e7eec3fc197f56223e6fff9167556c1c5e3bc
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4

we do not have enough pmusram space now, so use slice1 to restore
ddr slice1 ~ slice4, that's will save more pmusram space.

Change-Id: Id5

rockchip/rk3399: use slice1 to restore ddr slice1 ~ slice4

we do not have enough pmusram space now, so use slice1 to restore
ddr slice1 ~ slice4, that's will save more pmusram space.

Change-Id: Id54a7944f33d01a8f244cee6a8a0707bfe4d42da
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip/rk3399: disable more powerdomain prepare for shutdown logic rail

Change-Id: Ia59adf48cf14eb627721264765bce50cb31065ef
Signed-off-by: Lin Huang <hl@rock-chips.com>

rockchip/rk3399: save and restore pd_alive register

pd_alive control cru, grf, timer, gpio and wdt, when
turn off logic power rail, these register value will
back to reset value, we need to save the

rockchip/rk3399: save and restore pd_alive register

pd_alive control cru, grf, timer, gpio and wdt, when
turn off logic power rail, these register value will
back to reset value, we need to save them value in suspend
and restore them when resuem, since timer will reinitial
in kernel, so it not need to save/restore.

Change-Id: I0fc2a011d3cdc04b66ffbf728e769eb28b51ee38
Signed-off-by: Lin Huang <hl@rock-chips.com>

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