| 8705ec89 | 08-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1154 from soby-mathew/sm/fix_psci_stat
Fix PSCI STAT time stamp collection |
| ceada2b5 | 05-Nov-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
aarch32: add few missing weak platform specific function
Adds weak functions for plat_report_exception, bl1_plat_prepare_exit
and plat_error_handler in AArch32 mode.
Signed-off-by: Etienne Carriere
aarch32: add few missing weak platform specific function
Adds weak functions for plat_report_exception, bl1_plat_prepare_exit
and plat_error_handler in AArch32 mode.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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|
| 2904f84e | 07-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1155 from masahir0y/uniphier
Fix build error when creating ROT key for UniPhier platform |
| 3c946152 | 03-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: make sure to create build directory before ROT key
Building the UniPhier platform in parallel with TRUSTED_BOARD_BOOT=1
could fail due to non-existing directory. It might be difficult to
uniphier: make sure to create build directory before ROT key
Building the UniPhier platform in parallel with TRUSTED_BOARD_BOOT=1
could fail due to non-existing directory. It might be difficult to
reproduce, but here is an easier way to trigger the problem:
$ make PLAT=uniphier TRUSTED_BOARD_BOOT=1 MBEDTLS_DIR=mbedtls certificates
OPENSSL build/uniphier/release/rot_key.pem
/bin/sh: 1: cannot create build/uniphier/release/rot_key.pem: Directory nonexistent
make: *** [build/uniphier/release/rot_key.pem] Error 2
The $(ROT_KEY) must depend on $(BUILD_PLAT) so that the build directory
is created before the key.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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|
| 8012cc5c | 03-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
Build: introduce ${BUILD_PLAT} target to create the top build directory
Some platforms (for ex. UniPhier) want to create files in the very
top of the build directory. Add ${BUILD_PLAT} so such file
Build: introduce ${BUILD_PLAT} target to create the top build directory
Some platforms (for ex. UniPhier) want to create files in the very
top of the build directory. Add ${BUILD_PLAT} so such files can
depend on it.
Make existing directory targets depend on ${BUILD_PLAT} because
they are sub-directories of ${BUILD_PLAT}.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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|
| 92c5066c | 06-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1153 from robertovargas-arm/fix-macros
Avoid use of undefined macros |
| 157650c7 | 03-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1142 from etienne-lms/qemu-int
qemu: update deprecated interrupt registering |
| bfc87a8d | 16-Oct-2017 |
Soby Mathew <soby.mathew@arm.com> |
Fix PSCI STAT time stamp collection
This patch includes various fixes for PSCI STAT functionality
relating to timestamp collection:
1. The PSCI stat accounting for retention states for higher level
Fix PSCI STAT time stamp collection
This patch includes various fixes for PSCI STAT functionality
relating to timestamp collection:
1. The PSCI stat accounting for retention states for higher level
power domains were done outside the locks which could lead to
spurious values in some race conditions. This is moved inside
the locks. Also, the call to start the stat accounting was redundant
which is now removed.
2. The timestamp wrap-around case when calculating residency did
not cater for AArch32. This is now fixed.
3. In the warm boot path, `plat_psci_stat_accounting_stop()` was
getting invoked prior to population of target power states. This
is now corrected.
Change-Id: I851526455304fb74ff0a724f4d5318cd89e19589
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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|
| 3de7d58e | 03-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1137 from soby-mathew/sm/arm_plat_en_gicv3_save
Enable GICv3 save for ARM platforms |
| ad3803bf | 02-Nov-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
qemu: update deprecated interrupt registering
Registered interrupts are configured in edge detection as the default
previous configuration assumed in previous code.
Not target mask required as Qemu
qemu: update deprecated interrupt registering
Registered interrupts are configured in edge detection as the default
previous configuration assumed in previous code.
Not target mask required as Qemu BL31 will not send/route SGIs.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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|
| e8a87acd | 23-Oct-2017 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix usage of IMAGE_BLx macros
These macros are only defined for corresponding image,
and they are undefined for other images. It means that we have
to use ifdef or defined() instead of relying on be
Fix usage of IMAGE_BLx macros
These macros are only defined for corresponding image,
and they are undefined for other images. It means that we have
to use ifdef or defined() instead of relying on being 0 by default.
Change-Id: Iad11efab9830ddf471599b46286e1c56581ef5a7
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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|
| d58f3cac | 20-Oct-2017 |
Roberto Vargas <roberto.vargas@arm.com> |
Always define ARM_TSP_RAM_LOCATION_ID
ARM_TSP_RAM_LOCATION_ID was defined only in AARCH64, but the macro
was also used in AARCH32, and it meant that it was taking the value 0,
which happened to equa
Always define ARM_TSP_RAM_LOCATION_ID
ARM_TSP_RAM_LOCATION_ID was defined only in AARCH64, but the macro
was also used in AARCH32, and it meant that it was taking the value 0,
which happened to equal ARM_TRUSTED_SRAM_ID.
Change-Id: If9f4dbee1a2ba15e7806f2a03305b554bd327363
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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|
| 27b2493c | 31-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1141 from robertovargas-arm/boot_redundancy
Add platform hooks for boot redundancy support |
| a2ef56af | 30-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1144 from geesun/qx/resize_bl2_size
Change the default option of ARM_TSP_RAM_LOCATION and Enlarge the BL2 size on ARM platforms |
| 24552242 | 27-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1147 from etienne-lms/qemu-optee-load
qemu/optee: load OP-TEE pageable part 2MB above OP-TEE image |
| 90714000 | 26-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1143 from etienne-lms/qemu-hpen
qemu: fix holding pen mailbox sequence |
| 11d9b20f | 26-Oct-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
qemu/optee: load OP-TEE pageable part 2MB above OP-TEE image
OP-TEE dedicates the end of the Qemu secure DRAM as specific out-of-TEE
secure RAM. To support this configuration the trusted firmware sh
qemu/optee: load OP-TEE pageable part 2MB above OP-TEE image
OP-TEE dedicates the end of the Qemu secure DRAM as specific out-of-TEE
secure RAM. To support this configuration the trusted firmware should
not load OP-TEE resources in this area.
To overcome the issue, OP-TEE pageable image is now loaded 2MByte above
the secure RAM base address.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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|
| cebec742 | 26-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1138 from michpappas/tf-issues#526_qemu_does_not_support_TBB
qemu: Add support for Trusted Board Boot |
| 5cc34b10 | 18-Oct-2017 |
Michalis Pappas <mpappas@fastmail.fm> |
qemu: Add support for Trusted Board Boot
This patch adds support for TBB to qemu. An RSA ROT keypair is generated at
build time and is included into BL1/BL2. The key and content certificates
are rea
qemu: Add support for Trusted Board Boot
This patch adds support for TBB to qemu. An RSA ROT keypair is generated at
build time and is included into BL1/BL2. The key and content certificates
are read over semihosting.
Fixes ARM-software/tf-issues#526
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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|
| 9b1eae96 | 13-Oct-2017 |
Qixiang Xu <qixiang.xu@arm.com> |
plat/arm: enlarge the BL2 size on Arm platforms when TBB is enabled
For Trusted Board Boot, BL2 needs more space to support the ECDSA
and ECDSA+RSA algorithms.
Change-Id: Ie7eda9a1315ce836dbc6d18d6
plat/arm: enlarge the BL2 size on Arm platforms when TBB is enabled
For Trusted Board Boot, BL2 needs more space to support the ECDSA
and ECDSA+RSA algorithms.
Change-Id: Ie7eda9a1315ce836dbc6d18d6588f8d17891a92d
Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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|
| 7ca267bd | 13-Oct-2017 |
Qixiang Xu <qixiang.xu@arm.com> |
plat/arm: change the default option of ARM_TSP_RAM_LOCATION
On Arm standard platforms, it runs out of SRAM space when TBB is
enabled, so the TSP default location is changed to dram when TBB
is enabl
plat/arm: change the default option of ARM_TSP_RAM_LOCATION
On Arm standard platforms, it runs out of SRAM space when TBB is
enabled, so the TSP default location is changed to dram when TBB
is enabled.
Change-Id: I516687013ad436ef454d2055d4e6fce06e467044
Signed-off-by: Qixiang Xu <qixiang.xu@arm.com>
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|
| 01f62b6d | 26-Sep-2017 |
Roberto Vargas <roberto.vargas@arm.com> |
Add platform hooks for boot redundancy support
These hooks are intended to allow one platform to try load
images from alternative places. There is a hook to initialize
the sequence of boot locations
Add platform hooks for boot redundancy support
These hooks are intended to allow one platform to try load
images from alternative places. There is a hook to initialize
the sequence of boot locations and a hook to pass to the next
sequence.
Change-Id: Ia0f84c415208dc4fa4f9d060d58476db23efa5b2
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
show more ...
|
| 33dd33f8 | 23-Oct-2017 |
Etienne Carriere <etienne.carriere@linaro.org> |
qemu: fix holding pen mailbox sequence
Before this change, plat_secondary_cold_boot_setup reads wake up mailbox
as a byte array but through 64bit accesses on unaligned 64bit addresses.
In the other
qemu: fix holding pen mailbox sequence
Before this change, plat_secondary_cold_boot_setup reads wake up mailbox
as a byte array but through 64bit accesses on unaligned 64bit addresses.
In the other hand qemu_pwr_domain_on wakes secondary cores by writing
into a 64bit array.
This change forces the 64bit mailbox format as PLAT_QEMU_HOLD_ENTRY_SIZE
explicitly specifies it.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|
| 3b39efa4 | 23-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1139 from hzhuang1/fix_edmac
Fix edmac |
| f911e229 | 21-Oct-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1131 from jeenu-arm/gic-migrate
Migrate upstream platforms to using interrupt properties |