Merge pull request #1167 from Leo-Yan/hikey-fix-alignment

Set alignment size to 512B for Hikey/Hikey960

zynqmp: pm_service: use zynqmp_ipi APIs

Use zynqmp_ipi APIs to access IPI registers in pm_service.
As the zynqmp_ipi APIs doesn't cover IPI buffers, the pm_ipi
in pm_service will still directly acce

zynqmp: pm_service: use zynqmp_ipi APIs

Use zynqmp_ipi APIs to access IPI registers in pm_service.
As the zynqmp_ipi APIs doesn't cover IPI buffers, the pm_ipi
in pm_service will still directly access the IPI buffers.

Signed-off-by: Wendy Liang <jliang@xilinx.com>

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Add Xilinx ZynqMP IPI mailbox service

Add IPI mailbox service to manage Xilinx ZynqMP IPI(Inter Processors
Interrupt) access.

Signed-off-by: Wendy Liang <jliang@xilinx.com>

Introduce ZynqMP IPI implementation

Previously, ZynqMP IPI in ATF is only for ZynqMP PM,
This patch is to have a ZynqMP IPI implementation to handle
both ZynqMP PM IPI requirement and IPI mailbox se

Introduce ZynqMP IPI implementation

Previously, ZynqMP IPI in ATF is only for ZynqMP PM,
This patch is to have a ZynqMP IPI implementation to handle
both ZynqMP PM IPI requirement and IPI mailbox service requirement
which will be introduced next.

We control IPI agents registers access but not IPI buffers access in
this implementation. Each IPI mailbox user will directly access the
IPI buffers.

Signed-off-by: Wendy Liang <jliang@xilinx.com>

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uniphier: simplify GZIP compress rule

It is not necessary to read data from stdin. The input file name
is ripped off by -n option, anyway. I still use the redirect for
the output to specify the ou

uniphier: simplify GZIP compress rule

It is not necessary to read data from stdin. The input file name
is ripped off by -n option, anyway. I still use the redirect for
the output to specify the output file name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Move TSP to TZC secured DRAM

To allow BL31 to grow in SRAM, move TSP in TZC secured DRAM
by default.

Increase the BL31 max limit by one page.

Change-Id: Idd3479be02f0f9bafac2f275376d7db0c2015431
S

Move TSP to TZC secured DRAM

To allow BL31 to grow in SRAM, move TSP in TZC secured DRAM
by default.

Increase the BL31 max limit by one page.

Change-Id: Idd3479be02f0f9bafac2f275376d7db0c2015431
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>

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Merge pull request #1203 from masahir0y/uniphier

uniphier: a bundle of fixes

Merge pull request #1201 from jeenu-arm/sdei-plat-events

ARM platforms: Allow platforms to define SDEI events

uniphier: fix alignment of build log

The build log should be indented with two spaces for correct alignment.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

uniphier: fix base address of IO block buffer

The current IO block buffer overlaps with BL2 image location.
So, BL2 may corrupt itself.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM platforms: Allow platforms to define SDEI events

With this patch, ARM platforms are expected to define the macros
PLAT_ARM_SDEI_PRIVATE_EVENTS and PLAT_ARM_SDEI_SHARED_EVENTS as a list
of privat

ARM platforms: Allow platforms to define SDEI events

With this patch, ARM platforms are expected to define the macros
PLAT_ARM_SDEI_PRIVATE_EVENTS and PLAT_ARM_SDEI_SHARED_EVENTS as a list
of private and shared events, respectively. This allows for individual
platforms to define their own events.

Change-Id: I66851fdcbff83fd9568c2777ade9eb12df284b49
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

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hikey960: set isp clks as unsecure mode

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

Add new function-pointer-based console API

This patch overhauls the console API to allow for multiple console
instances of different drivers that are active at the same time. Instead
of binding to w

Add new function-pointer-based console API

This patch overhauls the console API to allow for multiple console
instances of different drivers that are active at the same time. Instead
of binding to well-known function names (like console_core_init),
consoles now provide a register function (e.g. console_16550_register())
that will hook them into the list of active consoles. All console
operations will be dispatched to all consoles currently in the list.

The new API will be selected by the build-time option MULTI_CONSOLE_API,
which defaults to ${ERROR_DEPRECATED} for now. The old console API code
will be retained to stay backwards-compatible to older platforms, but
should no longer be used for any newly added platforms and can hopefully
be removed at some point in the future.

The new console API is intended to be used for both normal (bootup) and
crash use cases, freeing platforms of the need to set up the crash
console separately. Consoles can be individually configured to be active
active at boot (until first handoff to EL2), at runtime (after first
handoff to EL2), and/or after a crash. Console drivers should set a sane
default upon registration that can be overridden with the
console_set_scope() call. Code to hook up the crash reporting mechanism
to this framework will be added with a later patch.

This patch only affects AArch64, but the new API could easily be ported
to AArch32 as well if desired.

Change-Id: I35c5aa2cb3f719cfddd15565eb13c7cde4162549
Signed-off-by: Julius Werner <jwerner@chromium.org>

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rockchip: Implement a panic handler that will reboot the system

The current Rockchip platform code retains the "common" default panic
handler which simply hangs the system (until the watchdog kicks

rockchip: Implement a panic handler that will reboot the system

The current Rockchip platform code retains the "common" default panic
handler which simply hangs the system (until the watchdog kicks in, if
enabled). This is usually not a great user experience.

This patch implements a Rockchip-specific panic handler that calls the
platform's reboot implementation to reset the system.

Change-Id: I4cbe09c48f1b3f86ebdfc0108c186565f9ffc119
Signed-off-by: Julius Werner <jwerner@chromium.org>

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poplar: Add BL32 (OP-TEE) support

Signed-off-by: Victor Chong <victor.chong@linaro.org>

Poplar: Initialize security properties of IP blocks.

The security properties of some IP blocks are configured to secure mode
after reset. This means these IP blocks can only be accessed by cpus
in s

Poplar: Initialize security properties of IP blocks.

The security properties of some IP blocks are configured to secure mode
after reset. This means these IP blocks can only be accessed by cpus
in secure state by default. These should be configured correclty as needed.

Signed-off-by: y00241285 <yyangwei.yangwei@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>

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poplar: Increase FIP_SIZE

This is currently the maximum allowed without affecting bootup.

Signed-off-by: Victor Chong <victor.chong@linaro.org>

poplar: Rename PLAT_ARM_NS_IMAGE_OFFSET

to PLAT_POPLAR_NS_IMAGE_OFFSET

Signed-off-by: Victor Chong <victor.chong@linaro.org>

poplar: Fix GPIO_MAX

Per
https://github.com/sdrobertw/Poplar/blob/master/HardwareDocs/Processor_Datasheet_v2XX.pdf
there are 13 groups of GPIO controllers, not 12.

Signed-off-by: Victor Chong <vict

poplar: Fix GPIO_MAX

Per
https://github.com/sdrobertw/Poplar/blob/master/HardwareDocs/Processor_Datasheet_v2XX.pdf
there are 13 groups of GPIO controllers, not 12.

Signed-off-by: Victor Chong <victor.chong@linaro.org>

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Merge pull request #1178 from davidcunado-arm/dc/enable_sve

Enable SVE for Non-secure world

Merge pull request #1184 from antonio-nino-diaz-arm/an/bl31-in-dram

fvp: Disable SYSTEM_SUSPEND when ARM_BL31_IN_DRAM

Merge pull request #1181 from soby-mathew/sm/el3_payload_tzc_permissions

ARM Platforms: Change the TZC access permissions for EL3 payload

Merge pull request #1179 from paulkocialkowski/integration

rockchip: Include stdint header in plat_sip_calls.c

Merge pull request #1174 from antonio-nino-diaz-arm/an/page-size

Replace magic numbers in linkerscripts by PAGE_SIZE

Merge pull request #1171 from Leo-Yan/hikey960-change-use-recommend-state-id

Hikey960: Change to use recommended power state id format