History log of /rk3399_ARM-atf/plat/ (Results 7526 – 7550 of 8868)
Revision Date Author Comments
(<<< Hide modified files)
(Show modified files >>>)
db0a68fd05-Mar-2018 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1298 from michpappas/tf-issues#560_qemu_UART1_data_abort

qemu: Accessing UART1 causes a data abort

4e858ba005-Mar-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey960: move out duplicated code

Create hikey960_bl_common.c to store duplication initialization
code in both BL1 and BL2.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

19b731e830-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey960: fix invoking driver init in image load driver

It's unnecessary to call platform driver initialization in image
load driver. We could make bl2_platform_setup() to executing
just before SCP_

hikey960: fix invoking driver init in image load driver

It's unnecessary to call platform driver initialization in image
load driver. We could make bl2_platform_setup() to executing
just before SCP_BL2 by setting flag IMAGE_ATTRIB_PLAT_SETUP.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

show more ...

d212873125-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey960: migrate to bl2_el3

Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC),
replace BL1 by BL2_EL3 in normal boot mode.

When flush images in recovery mode, keep to use BL1.

hikey960: migrate to bl2_el3

Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC),
replace BL1 by BL2_EL3 in normal boot mode.

When flush images in recovery mode, keep to use BL1.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

show more ...

99ffcaf229-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey960: drop LOAD_IMAGE v1

Since LOAD_IMAGE_V2 is always enabled in HiKey960 platform. Drop
LOAD_IMAGE v1 to simplify code.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

8495c03a29-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey960: fix memory overlapped in memory map

MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in
DRAM, it's overlapped with MAP_DDR.

Since TSP_MEM is always configured in DRAM case

hikey960: fix memory overlapped in memory map

MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in
DRAM, it's overlapped with MAP_DDR.

Since TSP_MEM is always configured in DRAM case, it means
MAP_OPTEE_PAGEABLE is always disabled. Just remove it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

show more ...

17cf8ab127-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey960: avoid to dump message when fetch boardid

The main difference between HiKey960 v1 hardware and HiKey960 v2
hardware is on UART console.

But the function of detecting boardid dumps message

hikey960: avoid to dump message when fetch boardid

The main difference between HiKey960 v1 hardware and HiKey960 v2
hardware is on UART console.

But the function of detecting boardid dumps message before console
ready. So fix it by removing those messages.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

show more ...

054c3e0f05-Mar-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey: move out duplicated code

Create hikey_bl_common.c to store duplicated initialization
code in BL1 and BL2.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

a628b1ab25-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey: migrate to bl2_el3

Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC),
replace BL1 by BL2_EL3 in normal boot mode.

When we recovery images in recovery mode, keep to use BL1.

hikey: migrate to bl2_el3

Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC),
replace BL1 by BL2_EL3 in normal boot mode.

When we recovery images in recovery mode, keep to use BL1.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

show more ...

a9b3021e29-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey: clean dcache for SRAM after initialized

Although SRAM is initialized, DCACHE should be cleaned too.
Because MCU is a parrallel core to access SRAM. We need to make
sure that initialized value

hikey: clean dcache for SRAM after initialized

Although SRAM is initialized, DCACHE should be cleaned too.
Because MCU is a parrallel core to access SRAM. We need to make
sure that initialized value is really written to SRAM before
MCU using it.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

show more ...

103c213c28-Jan-2018 Haojian Zhuang <haojian.zhuang@linaro.org>

hikey: drop LOAD_IMAGE v1

Since LOAD_IMAGE_V2 is always enabled in HiKey platform. Drop
LOAD_IMAGE v1 to simplify code.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

c5c7538e03-Mar-2018 Michalis Pappas <mpappas@fastmail.fm>

qemu: Accessing UART1 causes a data abort

The register address range of UART1 (crash console) are outside the
address ranges mapped for MMIO, resulting to an MMU abort when the
device registers are

qemu: Accessing UART1 causes a data abort

The register address range of UART1 (crash console) are outside the
address ranges mapped for MMIO, resulting to an MMU abort when the
device registers are accessed.

Increase the size of DEVICE1 memory to include the range of UART1.

Fixes ARM-software/tf-issues#560

Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

show more ...

c37be00b03-Mar-2018 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1292 from danh-arm/dh/spurious-dep-warn

Suppress spurious deprecated declaration warnings

06e3a5e103-Mar-2018 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1297 from soby-mathew/sm/fix_aarch32_plat_cmn

Remove sp_min functions from plat_common.c

0ed8c00101-Mar-2018 Soby Mathew <soby.mathew@arm.com>

Remove sp_min functions from plat_common.c

This patch removes default platform implementations of sp_min
platform APIs from plat/common/aarch32/plat_common.c. The APIs
are now implemented in `plat_s

Remove sp_min functions from plat_common.c

This patch removes default platform implementations of sp_min
platform APIs from plat/common/aarch32/plat_common.c. The APIs
are now implemented in `plat_sp_min_common.c` file within the
same folder.

The ARM platform layer had a weak definition of sp_min_platform_setup2()
which conflicted with the weak definition in the common file. Hence this
patch fixes that by introducing a `plat_arm_` version of the API thus
allowing individual boards within ARM platforms to override it if they
wish to.

Fixes ARM-software/tf-issues#559

Change-Id: I11a74ecae8191878ccc7ea03f12bdd5ae88faba5
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

show more ...

d0c63eaa01-Feb-2018 Roberto Vargas <roberto.vargas@arm.com>

Fix FVP DRAM2 size

This was correct according to the model specifications , but it seems
that FVP doesn't implement it. It is safer to use the size exposed by
the DTB which is currently used by Linu

Fix FVP DRAM2 size

This was correct according to the model specifications , but it seems
that FVP doesn't implement it. It is safer to use the size exposed by
the DTB which is currently used by Linux.

Change-Id: I9aabe3284a50ec2a36ed94966eb7e4ddf37cec3b
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

show more ...

97924e4527-Feb-2018 Dan Handley <dan.handley@arm.com>

Suppress spurious deprecated declaration warnings

Some generic compatibility functions emit deprecated declaration warnings
even when platforms do not use the deprecated functions directly. This
can

Suppress spurious deprecated declaration warnings

Some generic compatibility functions emit deprecated declaration warnings
even when platforms do not use the deprecated functions directly. This
can be confusing. Suppress these warnings by using:
`#pragma GCC diagnostic ignored "-Wdeprecated-declarations"`

Also emit a runtime warning if the weak plat/common implemntation of
plat_get_syscnt_freq2() is used, as this implies the platform has not
migrated from plat_get_syscnt_freq(). The deprecated declaration warnings
only help detect when platforms are calling deprecated functions, not when
they are defining deprecated functions.

Fixes ARM-software/tf-issues#550

Change-Id: Id14a92279c2634c1e76db8ef210da8affdbb2a5d
Signed-off-by: Dan Handley <dan.handley@arm.com>

show more ...

fdcc08af28-Feb-2018 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1290 from jeenu-arm/dynamiq

DynamIQ on FVP

73a9605128-Feb-2018 davidcunado-arm <david.cunado@arm.com>

Merge pull request #1282 from robertovargas-arm/misra-changes

Misra changes


/rk3399_ARM-atf/Makefile
/rk3399_ARM-atf/bl1/bl1_main.c
/rk3399_ARM-atf/bl2/aarch64/bl2_arch_setup.c
/rk3399_ARM-atf/bl2/bl2_image_load_v2.c
/rk3399_ARM-atf/bl2/bl2_main.c
/rk3399_ARM-atf/bl2/bl2_private.h
/rk3399_ARM-atf/bl2u/bl2u_main.c
/rk3399_ARM-atf/bl31/bl31_context_mgmt.c
/rk3399_ARM-atf/bl31/bl31_main.c
/rk3399_ARM-atf/common/desc_image_load.c
/rk3399_ARM-atf/drivers/arm/gic/common/gic_common_private.h
/rk3399_ARM-atf/drivers/arm/gic/v2/gicv2_helpers.c
/rk3399_ARM-atf/drivers/arm/gic/v2/gicv2_main.c
/rk3399_ARM-atf/drivers/arm/gic/v3/gicv3_main.c
/rk3399_ARM-atf/drivers/arm/gic/v3/gicv3_private.h
/rk3399_ARM-atf/drivers/arm/tzc/tzc400.c
/rk3399_ARM-atf/drivers/arm/tzc/tzc_common_private.h
/rk3399_ARM-atf/drivers/delay_timer/delay_timer.c
/rk3399_ARM-atf/drivers/io/io_fip.c
/rk3399_ARM-atf/drivers/io/io_memmap.c
/rk3399_ARM-atf/drivers/io/io_semihosting.c
/rk3399_ARM-atf/include/bl1/bl1.h
/rk3399_ARM-atf/include/bl2/bl2.h
/rk3399_ARM-atf/include/bl2u/bl2u.h
/rk3399_ARM-atf/include/bl31/bl31.h
/rk3399_ARM-atf/include/bl31/interrupt_mgmt.h
/rk3399_ARM-atf/include/common/bl_common.h
/rk3399_ARM-atf/include/common/desc_image_load.h
/rk3399_ARM-atf/include/common/runtime_svc.h
/rk3399_ARM-atf/include/drivers/arm/gicv3.h
/rk3399_ARM-atf/include/drivers/arm/tzc400.h
/rk3399_ARM-atf/include/drivers/delay_timer.h
/rk3399_ARM-atf/include/drivers/io/io_storage.h
/rk3399_ARM-atf/include/lib/cpus/errata_report.h
/rk3399_ARM-atf/include/lib/el3_runtime/cpu_data.h
/rk3399_ARM-atf/include/lib/el3_runtime/pubsub.h
/rk3399_ARM-atf/include/lib/pmf/pmf.h
/rk3399_ARM-atf/include/lib/pmf/pmf_helpers.h
/rk3399_ARM-atf/include/plat/arm/common/plat_arm.h
/rk3399_ARM-atf/include/plat/arm/css/common/css_pm.h
/rk3399_ARM-atf/include/plat/common/platform.h
/rk3399_ARM-atf/lib/extensions/spe/spe.c
/rk3399_ARM-atf/lib/psci/psci_private.h
/rk3399_ARM-atf/lib/stdlib/abort.c
/rk3399_ARM-atf/lib/stdlib/exit.c
/rk3399_ARM-atf/lib/stdlib/sscanf.c
/rk3399_ARM-atf/lib/xlat_tables_v2/xlat_tables_internal.c
/rk3399_ARM-atf/lib/xlat_tables_v2/xlat_tables_private.h
arm/board/fvp/drivers/pwrc/fvp_pwrc.h
arm/board/fvp/fvp_bl1_setup.c
arm/board/fvp/fvp_bl2u_setup.c
arm/board/fvp/fvp_common.c
arm/board/fvp/fvp_err.c
arm/board/fvp/fvp_pm.c
arm/board/fvp/fvp_topology.c
arm/board/fvp/fvp_trusted_boot.c
arm/board/juno/juno_err.c
arm/board/juno/juno_topology.c
arm/board/juno/juno_trng.c
arm/common/arm_bl1_setup.c
arm/common/arm_bl2u_setup.c
arm/common/arm_common.c
arm/common/arm_gicv3.c
arm/common/arm_io_storage.c
arm/common/arm_nor_psci_mem_protect.c
arm/common/arm_tzc400.c
arm/css/common/css_bl1_setup.c
arm/css/common/css_bl2u_setup.c
arm/css/common/css_topology.c
arm/css/drivers/scp/css_bom_bootloader.c
arm/css/drivers/scp/css_pm_scmi.c
arm/soc/common/soc_css_security.c
common/plat_bl_common.c
/rk3399_ARM-atf/services/arm_arch_svc/arm_arch_svc_setup.c
/rk3399_ARM-atf/services/std_svc/std_svc_setup.c
fd116b9f12-Feb-2018 Roberto Vargas <roberto.vargas@arm.com>

Fix MISRA rule 8.4 Part 2

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
make DEBUG=1 PLAT=juno LOG_LEVEL=50 a

Fix MISRA rule 8.4 Part 2

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
make DEBUG=1 PLAT=juno LOG_LEVEL=50 all

Change-Id: Ic8f611da734f356566e8208053296e6c62b54709
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

show more ...

1af540ef12-Feb-2018 Roberto Vargas <roberto.vargas@arm.com>

Fix MISRA rule 8.4 Part 1

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
make DEBUG=1 PLAT=fvp LOG_LEVEL=50 al

Fix MISRA rule 8.4 Part 1

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined

Fixed for:
make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all

Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

show more ...

dc6aad2e12-Feb-2018 Roberto Vargas <roberto.vargas@arm.com>

Fix MISRA rule 8.3 Part 1

Rule 8.3: All declarations of an object or function shall
use the same names and type qualifiers.

Fixed for:

make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all

Change-Id:

Fix MISRA rule 8.3 Part 1

Rule 8.3: All declarations of an object or function shall
use the same names and type qualifiers.

Fixed for:

make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all

Change-Id: I48201c9ef022f6bd42ea8644529afce70f9b3f22
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

show more ...

7fabe1a812-Feb-2018 Roberto Vargas <roberto.vargas@arm.com>

Fix MISRA rule 8.4 in common code

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined.

Change-Id: I26e042cb251a6f9590afa1340fda

Fix MISRA rule 8.4 in common code

Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined.

Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>

show more ...

fe7210cd31-Jan-2018 Jeenu Viswambharan <jeenu.viswambharan@arm.com>

FVP: Allow building for DynamIQ systems

FVPs that model DynamIQ configuration implements all CPUs in a single
cluster. I.e., such models have a single cluster with more than 4 CPUs.
This differs fro

FVP: Allow building for DynamIQ systems

FVPs that model DynamIQ configuration implements all CPUs in a single
cluster. I.e., such models have a single cluster with more than 4 CPUs.
This differs from existing default build configuration for FVP where up
to 4 CPUs are assumed per cluster.

To allow building for DynamIQ configuration, promote the macro
FVP_MAX_CPUS_PER_CLUSTER as a build option to have it set from the build
command line. The value of the build option defaults to 4.

Change-Id: Idc3853bc95f680869b434b011c2dbd733e40c6ce
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

show more ...

27e0ccab28-Feb-2018 Michalis Pappas <mpappas@fastmail.fm>

qemu: Support SEPARATE_CODE_AND_RODATA

Update qemu_configure_mmu_##_el to add an additional region for code,
marked as MT_CODE | MT_SECURE. Update ro region attributes to NON_EXEC.

Update calls to

qemu: Support SEPARATE_CODE_AND_RODATA

Update qemu_configure_mmu_##_el to add an additional region for code,
marked as MT_CODE | MT_SECURE. Update ro region attributes to NON_EXEC.

Update calls to QEMU_CONFIGURE_BLx_MMU() to pass an additional region for
code. Update calls to pass regions defined in common_def.h.

Increase MAX_MMAP_REGIONS to 10.

Enable SEPARATE_CODE_AND_RODATA by default on QEMU builds.

Fixes ARM-software/tf-issues#558

Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

show more ...

1...<<301302303304305306307308309310>>...355