| db0a68fd | 05-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1298 from michpappas/tf-issues#560_qemu_UART1_data_abort
qemu: Accessing UART1 causes a data abort |
| 4e858ba0 | 05-Mar-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: move out duplicated code
Create hikey960_bl_common.c to store duplication initialization code in both BL1 and BL2.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 19b731e8 | 30-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: fix invoking driver init in image load driver
It's unnecessary to call platform driver initialization in image load driver. We could make bl2_platform_setup() to executing just before SCP_
hikey960: fix invoking driver init in image load driver
It's unnecessary to call platform driver initialization in image load driver. We could make bl2_platform_setup() to executing just before SCP_BL2 by setting flag IMAGE_ATTRIB_PLAT_SETUP.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| d2128731 | 25-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: migrate to bl2_el3
Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When flush images in recovery mode, keep to use BL1.
hikey960: migrate to bl2_el3
Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When flush images in recovery mode, keep to use BL1.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 99ffcaf2 | 29-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: drop LOAD_IMAGE v1
Since LOAD_IMAGE_V2 is always enabled in HiKey960 platform. Drop LOAD_IMAGE v1 to simplify code.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 8495c03a | 29-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: fix memory overlapped in memory map
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR.
Since TSP_MEM is always configured in DRAM case
hikey960: fix memory overlapped in memory map
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR.
Since TSP_MEM is always configured in DRAM case, it means MAP_OPTEE_PAGEABLE is always disabled. Just remove it.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 17cf8ab1 | 27-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: avoid to dump message when fetch boardid
The main difference between HiKey960 v1 hardware and HiKey960 v2 hardware is on UART console.
But the function of detecting boardid dumps message
hikey960: avoid to dump message when fetch boardid
The main difference between HiKey960 v1 hardware and HiKey960 v2 hardware is on UART console.
But the function of detecting boardid dumps message before console ready. So fix it by removing those messages.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 054c3e0f | 05-Mar-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: move out duplicated code
Create hikey_bl_common.c to store duplicated initialization code in BL1 and BL2.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| a628b1ab | 25-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: migrate to bl2_el3
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When we recovery images in recovery mode, keep to use BL1.
hikey: migrate to bl2_el3
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When we recovery images in recovery mode, keep to use BL1.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| a9b3021e | 29-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: clean dcache for SRAM after initialized
Although SRAM is initialized, DCACHE should be cleaned too. Because MCU is a parrallel core to access SRAM. We need to make sure that initialized value
hikey: clean dcache for SRAM after initialized
Although SRAM is initialized, DCACHE should be cleaned too. Because MCU is a parrallel core to access SRAM. We need to make sure that initialized value is really written to SRAM before MCU using it.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 103c213c | 28-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: drop LOAD_IMAGE v1
Since LOAD_IMAGE_V2 is always enabled in HiKey platform. Drop LOAD_IMAGE v1 to simplify code.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| c5c7538e | 03-Mar-2018 |
Michalis Pappas <mpappas@fastmail.fm> |
qemu: Accessing UART1 causes a data abort
The register address range of UART1 (crash console) are outside the address ranges mapped for MMIO, resulting to an MMU abort when the device registers are
qemu: Accessing UART1 causes a data abort
The register address range of UART1 (crash console) are outside the address ranges mapped for MMIO, resulting to an MMU abort when the device registers are accessed.
Increase the size of DEVICE1 memory to include the range of UART1.
Fixes ARM-software/tf-issues#560
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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| c37be00b | 03-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1292 from danh-arm/dh/spurious-dep-warn
Suppress spurious deprecated declaration warnings |
| 06e3a5e1 | 03-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1297 from soby-mathew/sm/fix_aarch32_plat_cmn
Remove sp_min functions from plat_common.c |
| 0ed8c001 | 01-Mar-2018 |
Soby Mathew <soby.mathew@arm.com> |
Remove sp_min functions from plat_common.c
This patch removes default platform implementations of sp_min platform APIs from plat/common/aarch32/plat_common.c. The APIs are now implemented in `plat_s
Remove sp_min functions from plat_common.c
This patch removes default platform implementations of sp_min platform APIs from plat/common/aarch32/plat_common.c. The APIs are now implemented in `plat_sp_min_common.c` file within the same folder.
The ARM platform layer had a weak definition of sp_min_platform_setup2() which conflicted with the weak definition in the common file. Hence this patch fixes that by introducing a `plat_arm_` version of the API thus allowing individual boards within ARM platforms to override it if they wish to.
Fixes ARM-software/tf-issues#559
Change-Id: I11a74ecae8191878ccc7ea03f12bdd5ae88faba5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| d0c63eaa | 01-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix FVP DRAM2 size
This was correct according to the model specifications , but it seems that FVP doesn't implement it. It is safer to use the size exposed by the DTB which is currently used by Linu
Fix FVP DRAM2 size
This was correct according to the model specifications , but it seems that FVP doesn't implement it. It is safer to use the size exposed by the DTB which is currently used by Linux.
Change-Id: I9aabe3284a50ec2a36ed94966eb7e4ddf37cec3b Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| 97924e45 | 27-Feb-2018 |
Dan Handley <dan.handley@arm.com> |
Suppress spurious deprecated declaration warnings
Some generic compatibility functions emit deprecated declaration warnings even when platforms do not use the deprecated functions directly. This can
Suppress spurious deprecated declaration warnings
Some generic compatibility functions emit deprecated declaration warnings even when platforms do not use the deprecated functions directly. This can be confusing. Suppress these warnings by using: `#pragma GCC diagnostic ignored "-Wdeprecated-declarations"`
Also emit a runtime warning if the weak plat/common implemntation of plat_get_syscnt_freq2() is used, as this implies the platform has not migrated from plat_get_syscnt_freq(). The deprecated declaration warnings only help detect when platforms are calling deprecated functions, not when they are defining deprecated functions.
Fixes ARM-software/tf-issues#550
Change-Id: Id14a92279c2634c1e76db8ef210da8affdbb2a5d Signed-off-by: Dan Handley <dan.handley@arm.com>
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| fdcc08af | 28-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1290 from jeenu-arm/dynamiq
DynamIQ on FVP |
| 73a96051 | 28-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1282 from robertovargas-arm/misra-changes
Misra changes |
| fd116b9f | 12-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix MISRA rule 8.4 Part 2
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined
Fixed for: make DEBUG=1 PLAT=juno LOG_LEVEL=50 a
Fix MISRA rule 8.4 Part 2
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined
Fixed for: make DEBUG=1 PLAT=juno LOG_LEVEL=50 all
Change-Id: Ic8f611da734f356566e8208053296e6c62b54709 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| 1af540ef | 12-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix MISRA rule 8.4 Part 1
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined
Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 al
Fix MISRA rule 8.4 Part 1
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined
Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all
Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| dc6aad2e | 12-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix MISRA rule 8.3 Part 1
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers.
Fixed for:
make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all
Change-Id:
Fix MISRA rule 8.3 Part 1
Rule 8.3: All declarations of an object or function shall use the same names and type qualifiers.
Fixed for:
make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all
Change-Id: I48201c9ef022f6bd42ea8644529afce70f9b3f22 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| 7fabe1a8 | 12-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix MISRA rule 8.4 in common code
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined.
Change-Id: I26e042cb251a6f9590afa1340fda
Fix MISRA rule 8.4 in common code
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined.
Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| fe7210cd | 31-Jan-2018 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
FVP: Allow building for DynamIQ systems
FVPs that model DynamIQ configuration implements all CPUs in a single cluster. I.e., such models have a single cluster with more than 4 CPUs. This differs fro
FVP: Allow building for DynamIQ systems
FVPs that model DynamIQ configuration implements all CPUs in a single cluster. I.e., such models have a single cluster with more than 4 CPUs. This differs from existing default build configuration for FVP where up to 4 CPUs are assumed per cluster.
To allow building for DynamIQ configuration, promote the macro FVP_MAX_CPUS_PER_CLUSTER as a build option to have it set from the build command line. The value of the build option defaults to 4.
Change-Id: Idc3853bc95f680869b434b011c2dbd733e40c6ce Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| 27e0ccab | 28-Feb-2018 |
Michalis Pappas <mpappas@fastmail.fm> |
qemu: Support SEPARATE_CODE_AND_RODATA
Update qemu_configure_mmu_##_el to add an additional region for code, marked as MT_CODE | MT_SECURE. Update ro region attributes to NON_EXEC.
Update calls to
qemu: Support SEPARATE_CODE_AND_RODATA
Update qemu_configure_mmu_##_el to add an additional region for code, marked as MT_CODE | MT_SECURE. Update ro region attributes to NON_EXEC.
Update calls to QEMU_CONFIGURE_BLx_MMU() to pass an additional region for code. Update calls to pass regions defined in common_def.h.
Increase MAX_MMAP_REGIONS to 10.
Enable SEPARATE_CODE_AND_RODATA by default on QEMU builds.
Fixes ARM-software/tf-issues#558
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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