feat(mt8196): enable MTE2

Enable the Memory Tagging Extension (MTE) feature for the MediaTek
mt8196 platform by setting ENABLE_FEAT_MTE2 to 1 in the platform
configuration. This enables MTE support

feat(mt8196): enable MTE2

Enable the Memory Tagging Extension (MTE) feature for the MediaTek
mt8196 platform by setting ENABLE_FEAT_MTE2 to 1 in the platform
configuration. This enables MTE support at EL1 and EL2.

Change-Id: Iafe4e89ad33d0834ea630009620a605ac36e0be3
Signed-off-by: Yidi Lin <yidilin@google.com>

show more ...

Merge changes from topic "ck/tf-a/tpip-updates" into integration

* changes:
chore(compiler-rt): update compiler-rt to v21.1.4
chore(zlib): update zlib to v1.3.1
chore(libfdt): update libfdt to

Merge changes from topic "ck/tf-a/tpip-updates" into integration

* changes:
chore(compiler-rt): update compiler-rt to v21.1.4
chore(zlib): update zlib to v1.3.1
chore(libfdt): update libfdt to v1.7.2

show more ...

Merge "docs: deprecate Arm RD1AE platform" into integration

fix(build): link Event Log library directly

The `libraries` target is a `.PHONY` target to which various real
library targets, including the Event Log library, have been added over
the years. This t

fix(build): link Event Log library directly

The `libraries` target is a `.PHONY` target to which various real
library targets, including the Event Log library, have been added over
the years. This target is added as a dependency to any target created
with the `MAKE_BL` function. While this might look convenient on the
surface, it also dictates that a library must be linked even to images
it is totally irrelevant for.

The Event Log library is a good example of this; the library is not
typically used by all images, but by attaching itself to the `libraries`
target it becomes mandatory for all of them.

This change returns some of the control over when and where the Event
Log goes to platform maintainers via the introduction of two new
variables:

- `LIBEVLOG_LIBS`: the path to the Event Log static library.
- `LIBEVLOG_INCLUDE_DIRS`: include directories for the public API.

These can be appended to `BLx_LIBS` and `BLx_INCLUDE_DIRS` to include
the Event Log library in the relevant bootloaders.

Change-Id: I3e1a48cd45493334590b34b2ade0c6e29cbfd47a
Signed-off-by: Chris Kay <chris.kay@arm.com>

show more ...

docs: deprecate Arm RD1AE platform

RD1AE (Kronos) is now deprecated in TF-A v2.14. Emit a build-time
warning in platform.mk of that platform to make the status explicit.
Update docs/plat/index.rst t

docs: deprecate Arm RD1AE platform

RD1AE (Kronos) is now deprecated in TF-A v2.14. Emit a build-time
warning in platform.mk of that platform to make the status explicit.
Update docs/plat/index.rst to list RD1AE with deleted version set to
TBD.
Drop from the deprecated table platforms that were already deleted in
v2.13 (TC2, fvp_r, SGI-575, RD-N1-Edge, RD-V1, RD-V1-MC).

Change-Id: Ia334a1901fbf303e876e85c8075e2ac7e3fa0d67
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...

fix(el3-runtime): allow RNDR access at EL3 even when RNG_TRAP is enabled

RNG_TRAP will also trap RNDR accesses at EL3 which we don't want as we
have no way to handle nested exceptions. Clear the tra

fix(el3-runtime): allow RNDR access at EL3 even when RNG_TRAP is enabled

RNG_TRAP will also trap RNDR accesses at EL3 which we don't want as we
have no way to handle nested exceptions. Clear the trap with root
context to always allow access at EL3.

Change-Id: I6e4cd8b5a7730f6ffbeed912d9301877d271110d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

Merge changes Ic735cd1c,Iba4cdbf5,I0dd74152,I3a051ca2,Ie413233d, ... into integration

* changes:
feat(stm32mp2): add RIFSC/RISAB protection for USB3DR
feat(st-drivers): add RIFSC driver
feat(s

Merge changes Ic735cd1c,Iba4cdbf5,I0dd74152,I3a051ca2,Ie413233d, ... into integration

* changes:
feat(stm32mp2): add RIFSC/RISAB protection for USB3DR
feat(st-drivers): add RIFSC driver
feat(stm32mp2): add STM32MP_USB_PROGRAMMER support
feat(stm32mp2): generate FIP for DDR initialization
feat(stm32mp2): add support for minimal FIP with only DDR FW
fix(st): allow several call of stm32cubeprog_uart_load
feat(st): update stm32cubeprogrammer API
feat(stm32mp1): add stm32_get_uid_otp
feat(st-usb): add USB DWC3 driver
fix(st): replace down counter by a timeout upon dfu detach

show more ...

Merge "feat(cpus): add support for venom cpu" into integration

Merge "fix(security): add clrbhb support" into integration

feat(stm32mp2): add RIFSC/RISAB protection for USB3DR

Add RIFSC/RISAB protection for USB3-IP:
- USB3DR Peripheral only accessible form Secure/Priv
- USB3DR Master is Secure/Priv to access SYSRAM in

feat(stm32mp2): add RIFSC/RISAB protection for USB3DR

Add RIFSC/RISAB protection for USB3-IP:
- USB3DR Peripheral only accessible form Secure/Priv
- USB3DR Master is Secure/Priv to access SYSRAM in bl2 plat setup.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: Ic735cd1cadc5a3a52065b0c7db328268d405a77c

show more ...

feat(st-drivers): add RIFSC driver

RIFSC (RIF Security Controller) is responsible for the isolation
of hardware resources like memory or peripherals. It is composed of:

-RISC registers(slave periph

feat(st-drivers): add RIFSC driver

RIFSC (RIF Security Controller) is responsible for the isolation
of hardware resources like memory or peripherals. It is composed of:

-RISC registers(slave peripherals) with RISUP(Resource Isolation
Slave Unit for Peripherals) OR RISAL(Resource Isolation Slave Unit
for Address space - Lite) logics.
-RIMC registers(Non RIF-Aware masters counterpart) with RIMU
(Resource Isolation Master Unit) logic. It is possible for a master to
inherit from its slave port(RISUP) configuration.

This doesn't support semaphore acquisition.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Iba4cdbf53243292fa0b42cad8392c43734dd9bc2

show more ...

feat(stm32mp2): add STM32MP_USB_PROGRAMMER support

Add STM32MP_USB_PROGRAMMER support for STM32MP2 platform by
compiling usb-dwc3 driver and adding the requested memory and
USB-DFU configurations.

feat(stm32mp2): add STM32MP_USB_PROGRAMMER support

Add STM32MP_USB_PROGRAMMER support for STM32MP2 platform by
compiling usb-dwc3 driver and adding the requested memory and
USB-DFU configurations.

The DFU stack is used in BL2 when STM32MP_USB_PROGRAMMER is activated
by the STMicroelectronics tools STM32Cubeprogrammer for serial boot mode
on USB.

Change-Id: I0dd74152ee6e0a3a3d1332d4fb2edbae7743fcc1
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

show more ...

feat(stm32mp2): generate FIP for DDR initialization

Generate a minimal FIP used for DDR initialization for serial boot
when STM32MP_DDR_FIP_IO_STORAGE is activated.

It is loaded in internal memory

feat(stm32mp2): generate FIP for DDR initialization

Generate a minimal FIP used for DDR initialization for serial boot
when STM32MP_DDR_FIP_IO_STORAGE is activated.

It is loaded in internal memory before to be used with support of
the FIP memmap.

To ease Trusted Boot porting for serial boot, we can use TOOL_ADD_IMG
with a DDR_ prefix. To avoid the overriding rule issue with the check
rule in TOOL_ADD_IMG, a copy of the STM32MP_DDR_FW variable is created.

Change-Id: I3a051ca2b258771e48c6e9fed9d77ab512c2416f
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

show more ...

feat(stm32mp2): add support for minimal FIP with only DDR FW

Load a minimal FIP used for DDR initialization for serial boot
when STM32MP_DDR_FIP_IO_STORAGE is activated.

This DDR FIP is loaded at t

feat(stm32mp2): add support for minimal FIP with only DDR FW

Load a minimal FIP used for DDR initialization for serial boot
when STM32MP_DDR_FIP_IO_STORAGE is activated.

This DDR FIP is loaded at the beginning of SYSRAM and used with
support of memmap features.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie413233de0e4d785b2d669087da34110df557ad3

show more ...

fix(st): allow several call of stm32cubeprog_uart_load

Update the function stm32cubeprog_uart_load() to skip the UART
initialization when the function is called a second time.

On STM32MP25, this fu

fix(st): allow several call of stm32cubeprog_uart_load

Update the function stm32cubeprog_uart_load() to skip the UART
initialization when the function is called a second time.

On STM32MP25, this function is called 2 times, first to load FIP DDR
in small internal memory and after DDR initialization, to load FIP in
this large external memory

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ibbb4ad44b89730d6c6101c89e56c59978d38cfed

show more ...

feat(st): update stm32cubeprogrammer API

Update the API stm32cubeprog_[uart/usb]_load() to provide the requested
phase; the phase is no more assumed to PHASE_SSBL.

Signed-off-by: Patrick Delaunay <

feat(st): update stm32cubeprogrammer API

Update the API stm32cubeprog_[uart/usb]_load() to provide the requested
phase; the phase is no more assumed to PHASE_SSBL.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3e14ce0bd5bfce59f141d672b0d66be04012820f

show more ...

feat(stm32mp1): add stm32_get_uid_otp

Add a generic function to get the unique device id (UID)
from the OTP.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id15dbb6668b4b

feat(stm32mp1): add stm32_get_uid_otp

Add a generic function to get the unique device id (UID)
from the OTP.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id15dbb6668b4bafe44e86c33e76ec64a3c982387

show more ...

fix(st): replace down counter by a timeout upon dfu detach

On stm32mp2, DFU detach sometimes makes subsequent usb start to fail.
The core doesn't have the time to properly finalize the last setup
ph

fix(st): replace down counter by a timeout upon dfu detach

On stm32mp2, DFU detach sometimes makes subsequent usb start to fail.
The core doesn't have the time to properly finalize the last setup
phase. This results in error logs seen:
ERROR: dwc3_handle_dev_event: 1688
ERROR: dwc3_handle_dev_event: 1692

Just enabling "DFU USB STOP" message hides the issue, sequentially:
usb_core_start()
...
usb_dfu_loop() // runs until DFU_DETACH command
--> while(it_count != 0U) {
usb_core_handle_it()
if (usb_dfu_detach_req)
it_count--; // down count from 100 to 0
}
...
INFO("DFU USB STOP...\n");
usb_core_stop()

The down-counter (it_count) value doesn't seem to be enough, and seems
not robust against CPU speed. So rather adopt a 100us timeout. It's
determined experimentally (above issue seems to be triggered around
20us to 30us, so keep some margin).

Change-Id: Iac37c346ad938cd917dfbd7e4622546d29ee7517
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>

show more ...

Merge changes from topic "ahmed-azeem/rdaspen-enhancements" into integration

* changes:
fix(dsu): dsu config for all cores in hot reset
docs(rdaspen): bl32 and GPT support
feat(rdaspen): suppo

Merge changes from topic "ahmed-azeem/rdaspen-enhancements" into integration

* changes:
fix(dsu): dsu config for all cores in hot reset
docs(rdaspen): bl32 and GPT support
feat(rdaspen): support BL32 (OP-TEE)

show more ...

Merge "fix(arm): derive RMM bank size from payload" into integration

Merge changes from topic "mb/lfa-rmm-test" into integration

* changes:
fix(rmmd): avoid race conditions in CPU finish
fix(arm): move lfa componet header to common and fix the helper
chore(lfa)

Merge changes from topic "mb/lfa-rmm-test" into integration

* changes:
fix(rmmd): avoid race conditions in CPU finish
fix(arm): move lfa componet header to common and fix the helper
chore(lfa): rename component_id to lfa_component_id

show more ...

fix(security): add clrbhb support

TF-A mitigates spectre-bhb(CVE-2022-23960) issue with loop
workaround based on - https://developer.arm.com/documentation/110280/latest/

On platforms that support `

fix(security): add clrbhb support

TF-A mitigates spectre-bhb(CVE-2022-23960) issue with loop
workaround based on - https://developer.arm.com/documentation/110280/latest/

On platforms that support `clrbhb` instruction it is recommended to
use `clrbhb` instruction instead of the loop workaround.

Ref- https://developer.arm.com/documentation/102898/0108/

Change-Id: Ie6e56e96378503456a1617d5e5d51bc64c2e0f0b
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

feat(cpus): add support for venom cpu

Add basic CPU library code to support Venom CPU

Change-Id: I84d4cb77b175812811a17e55b4b290585e05d216
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

feat(rdaspen): support BL32 (OP-TEE)

Configure SPMC constants and Secure memory partition to boot BL32
image.

This also fixes the build to automatically accommodate BL33 if
BL32 base is not specif

feat(rdaspen): support BL32 (OP-TEE)

Configure SPMC constants and Secure memory partition to boot BL32
image.

This also fixes the build to automatically accommodate BL33 if
BL32 base is not specified, and removes a redundant entry for BL31
in platform definitions for mmap entries aswell.

Change-Id: I6a3ec97c8f41d6bddc4f20b6edc088a46e2caa75
Signed-off-by: Archish Venkatesh <Archish.Venkatesh@arm.com>
Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>

show more ...

Merge "feat(cpus): add support for Dionysus cpu library" into integration