1 /*
2 * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <plat/arm/common/arm_config.h>
8 #include <plat/arm/common/plat_arm.h>
9 #include <platform_def.h>
10
11 /*
12 * We assume that all security programming is done by the primary core.
13 */
plat_arm_security_setup(void)14 void plat_arm_security_setup(void)
15 {
16 /*
17 * The Base FVP has a TrustZone address space controller.
18 *
19 * If the platform had additional peripheral specific security
20 * configurations, those would be configured here.
21 */
22
23 const arm_tzc_regions_info_t fvp_tzc_regions[] = {
24 ARM_TZC_REGIONS_DEF,
25 #if !ENABLE_RME
26 {FVP_DRAM3_BASE, FVP_DRAM3_END,
27 ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
28 {FVP_DRAM4_BASE, FVP_DRAM4_END,
29 ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
30 {FVP_DRAM5_BASE, FVP_DRAM5_END,
31 ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
32 {FVP_DRAM6_BASE, FVP_DRAM6_END,
33 ARM_TZC_NS_DRAM_S_ACCESS, PLAT_ARM_TZC_NS_DEV_ACCESS},
34 #endif
35 {0}
36 };
37
38 if ((get_arm_config()->flags & ARM_CONFIG_HAS_TZC) != 0U)
39 arm_tzc400_setup(PLAT_ARM_TZC_BASE, fvp_tzc_regions);
40 }
41