Merge pull request #1540 from MISL-EBU-System-SW/marvell-updates-18.09

Marvell updates 18.09

plat: marvell: Update Marvell base code version to 18.09.1

Change-Id: I908844364bf8080612aaa6d750d7d2441ecc2eb8
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

plat: svc: ap807: add SVC configuration for AP807

- add svc configuration according to values burnt
to the chip efuse

Change-Id: Icf5d7cc41bc09ac2244d0a126106e681afebb064
Signed-off-by: Christine

plat: svc: ap807: add SVC configuration for AP807

- add svc configuration according to values burnt
to the chip efuse

Change-Id: Icf5d7cc41bc09ac2244d0a126106e681afebb064
Signed-off-by: Christine Gharzuzi <chrisg@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

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fix: marvell: Check the required libraries before building doimage

Some customers are missing host libraries required for doimage
builds.
This patch requests for the library installation check for e

fix: marvell: Check the required libraries before building doimage

Some customers are missing host libraries required for doimage
builds.
This patch requests for the library installation check for every
doimage build and suggest the required installation steps in case
of missing headers.

Change-Id: Icde18c3d4d6045f65e50d2dc9e6514971f40033e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>

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plat: a8k: enable PMU overflow interrupt handler

This patch enables handling PMU overflow IRQ by GIC SPI's
directly in EL3. Also implement additional SMC routine,
which can disable the solution on d

plat: a8k: enable PMU overflow interrupt handler

This patch enables handling PMU overflow IRQ by GIC SPI's
directly in EL3. Also implement additional SMC routine,
which can disable the solution on demand in runtime.

Since it is possible to configure PMU interrupt trigger type
in the MADT ACPI table, it is enough to set it only once in EL3
during initialization.

Change-Id: Ie76aa62ccc4fd7cabfec9e3d5ed9970ada1c1b2a
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

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Merge pull request #1541 from rajanv-xilinx/integration-num-clocks

zynqmp: pm: Add API to get number of clocks

marvell: pm: do not panic by default in cpu_standby

Current default behavior of cpu_standby callback
is problematic during the SBSA test, which is
unable to run due to EL3 panic. Make it dependent o

marvell: pm: do not panic by default in cpu_standby

Current default behavior of cpu_standby callback
is problematic during the SBSA test, which is
unable to run due to EL3 panic. Make it dependent on
the PM firmware running.

Change-Id: I7a53de8c880bd23b157dd65ce14bb48b5a5c76c8
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

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plat: marvell: a80x0: reconfigure CP0 PCIE0 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SAT

plat: marvell: a80x0: reconfigure CP0 PCIE0 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SATA/USB cards, reconfigure the I/O windows so we can declare two
MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64
one at 0x8_0000_0000. In addition, this will leave ample room for an
ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB)

For compatibility with older kernels or firmware, leave the original
16 MB window in place as well.

Change-Id: Ia8177194e542078772f90941eced81b231c16887
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

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plat: marvell: a70x0: reconfigure CP0 PCIE2 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SAT

plat: marvell: a70x0: reconfigure CP0 PCIE2 windows

In order to allow the use of PCIe cards such as graphics cards, whose
demands for BAR space are typically much higher than those of network
or SATA/USB cards, reconfigure the I/O windows so we can declare two
MMIO PCI regions: a 512 MB MMIO32 one at 0xc000_0000 and a 4 GB MMIO64
one at 0x8_0000_0000. In addition, this will leave ample room for an
ECAM config space at 0xe000_0000 (up to the ECAM maximum of 256 MB)

For compatibility with older kernels or firmware, leave the original
16 MB window in place as well.

Change-Id: I80b00691ae8d0a3f3f7285b8e0bfc21c0a095e94
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

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a8k: use the memory controller feature to protect the RT service region

Define the RT service space as secure with use of memory controller
trustzone feature. Thanks to this protection, any NS-Bootl

a8k: use the memory controller feature to protect the RT service region

Define the RT service space as secure with use of memory controller
trustzone feature. Thanks to this protection, any NS-Bootloader nor NS-OS,
won't be able to access RT services (e.g. accidentally overwrite it,
which will at best result in RT services unavailability).

Change-Id: Ie5b6cbe9a1b77879d6d8f8eac5d4e41e468496ce
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>

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plat: marvell: rename common include file

Rename a8k_common.h to armada_common.h to keep the same header
name across all other Marvell Armada platforms.
This is especially useful since various Marve

plat: marvell: rename common include file

Rename a8k_common.h to armada_common.h to keep the same header
name across all other Marvell Armada platforms.
This is especially useful since various Marvell platforms may
use common platform files and share the driver modules.

Change-Id: I7262105201123d54ccddef9aad4097518f1e38ef
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

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ti: k3: common: Add basic PSCI core off support

Use TI-SCI messages to request core power down from system controller
firmware.

Signed-off-by: Andrew F. Davis <afd@ti.com>

Merge pull request #1550 from danielboulby-arm/db/weakdefs

Prevent two weak definitions of the same function

Prevent two weak definitions of the same function

Add another level of abstraction of weak defs for
arm_bl2_handle_post_image_load to prevent two weak definitions
of the same function

Change-Id: Ie

Prevent two weak definitions of the same function

Add another level of abstraction of weak defs for
arm_bl2_handle_post_image_load to prevent two weak definitions
of the same function

Change-Id: Ie953786f43b0f88257c82956ffaa5fe0d19603db
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

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Fix MISRA defects in log helpers

No functional changes.

Change-Id: I850f08718abb69d5d58856b0e3de036266d8c2f4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1542 from antonio-nino-diaz-arm/an/bl31-misra

Some MISRA fixes in BL31, cci and smmu

Merge pull request #1539 from antonio-nino-diaz-arm/an/gic-misra

MISRA fixes for the GIC driver

Fix MISRA defects in BL31 common code

Change-Id: I5993b425445ee794e6d2a792c244c0af53640655
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

plat/common: gic: MISRA fixes

Change-Id: I11509a3271d7608048d49e7dd5192be0c2a313f0
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1514 from glneo/for-upstream-psci

K3 PSCI Support

Merge pull request #1538 from jts-arm/typos

Remove unnecessary casts

Merge pull request #1531 from MISL-EBU-System-SW/marvell-plat-updates

plat: marvell: bl31: Update the early platform setup API

zynqmp: pm: Add API to get number of clocks

Currently in Linux maximum number of clocks is hard-coded and
so it needs to allocate static memory. It can get actual clock
number after querying all clo

zynqmp: pm: Add API to get number of clocks

Currently in Linux maximum number of clocks is hard-coded and
so it needs to allocate static memory. It can get actual clock
number after querying all clock names by special clock name
string. Add new query data parameter to get actual number of
clocks so Linux can get actual clock numbers in advance.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>

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Remove unnecessary casts

Small patch which removes some redundant casts to (void *).

Change-Id: If1cfd68f2989bac1d39dbb3d1c31d4119badbc21
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

ti: k3: common: Add basic PSCI reset support

Use TI-SCI messages to request reset from system controller firmware.

Signed-off-by: Andrew F. Davis <afd@ti.com>