Merge pull request #1864 from hadi-asyrafi/mailbox_fix

intel: Mailbox service un-accessible

Merge pull request #1862 from thloh85-intel/s10_bl2

plat: intel: Improve ECC scrubbing performance

stm32mp1: zeromem device_info struct

The change of the structure highlighted the fact that all fields are not
correctly initialized with zeroes.

Replace the other memset in the function with zerome

stm32mp1: zeromem device_info struct

The change of the structure highlighted the fact that all fields are not
correctly initialized with zeroes.

Replace the other memset in the function with zeromem, as it is faster.

Change-Id: I27f45a64e34637f79fa519f486bf5936721ef396
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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intel: Mailbox service un-accessible
Change map region for device 2 from non-secure to secure

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>

plat: intel: Improve ECC scrubbing performance

We should be using zeromem to scrub memory instead of memset. This would
improve the performance by 200x

Signed-off-by: Tien Hock, Loh <tien.hock.loh@

plat: intel: Improve ECC scrubbing performance

We should be using zeromem to scrub memory instead of memset. This would
improve the performance by 200x

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

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Merge pull request #1847 from jts-arm/mbedtls

Remove Mbed TLS dependency from plat_bl_common.c

Merge pull request #1853 from vwadekar/dummy_io_storage

Tegra: dummy support for the io_storage backend

rcar_gen3: Add M3-W 3.0 support

Add support for the M3W 3.0 SoC and synchronize the upstream ATF with
Renesas downstream ATF release v2.0.1.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.co

rcar_gen3: Add M3-W 3.0 support

Add support for the M3W 3.0 SoC and synchronize the upstream ATF with
Renesas downstream ATF release v2.0.1.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>

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Merge pull request #1844 from chandnich/rename_sgiclark

css/sgi: replace all uses of Clark with new product names

Merge pull request #1837 from spencercw/master

imx: Configure CAAM job rings master ID for i.MX8MQ

Tegra: dummy support for the io_storage backend

This patch provides dummy macros and platform files to compile
the io_storage driver backend. This patch is necessary to
remove the "--unresolved=el3_

Tegra: dummy support for the io_storage backend

This patch provides dummy macros and platform files to compile
the io_storage driver backend. This patch is necessary to
remove the "--unresolved=el3_panic" linker flag from Tegra's
makefiles and allow us to revert this workaround, previously
suggested by the ARM toolchain team.

The "--unresolved=el3_panic" flag actually was a big hammer that
allowed Tegra platforms to work with armlink previously but it
masks legit errors with the code as well.

Change-Id: I0421d35657823215229f84231896b84167f90548
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #1815 from Anson-Huang/gic

gic: make sure ProcessorSleep bit clear successfully

Merge pull request #1751 from vwadekar/tegra-scatter-file-support

Tegra scatter file support

Merge pull request #1845 from ambroise-arm/av/errata

Apply workarounds for errata of Cortex-A53, A55 and A57

imx: make sure GIC redistributor is awake before initialization

GICR_WAKER.ProcessorSleep can only be set to zero when:
— GICR_WAKER.Sleep bit[0] == 0.
— GICR_WAKER.Quiescent bit[31] == 0.

On some

imx: make sure GIC redistributor is awake before initialization

GICR_WAKER.ProcessorSleep can only be set to zero when:
— GICR_WAKER.Sleep bit[0] == 0.
— GICR_WAKER.Quiescent bit[31] == 0.

On some platforms, when system reboot with GIC in sleep
mode but with power ON, such as on NXP's i.MX8QM, Linux
kernel enters suspend but could be requested to reboot,
and GIC is in sleep mode and it is inside a power domain
which is ON in this scenario, when CPU reset, the GIC
driver trys to set CORE's redistributor interface to awake,
with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31]
both set, the ProcessorSleep bit[1] will never be clear
and cause system hang.

This patch makes sure GICR_WAKER.Sleep bit[0] and
GICR_WAKER.Quiescent bit[31] are both zeor before clearing
ProcessorSleep bit[1].

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

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Remove Mbed TLS dependency from plat_bl_common.c

Due to the shared Mbed TLS heap optimisation introduced in 6d01a463,
common code files were depending on Mbed TLS specific headers. This
dependency i

Remove Mbed TLS dependency from plat_bl_common.c

Due to the shared Mbed TLS heap optimisation introduced in 6d01a463,
common code files were depending on Mbed TLS specific headers. This
dependency is now removed by moving the default, unoptimised heap
implementation inside the Mbed TLS specific files.

Change-Id: I11ea3eb4474f0d9b6cb79a2afd73a51a4a9b8994
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

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Minor changes to documentation and comments

Fix some typos and clarify some sentences.

Change-Id: Id276d1ced9a991b4eddc5c47ad9a825e6b29ef74
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.co

Minor changes to documentation and comments

Fix some typos and clarify some sentences.

Change-Id: Id276d1ced9a991b4eddc5c47ad9a825e6b29ef74
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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juno: Enable CPU errata workarounds

Change-Id: I7593f5ed89b9ef13b510e2259c909838c64ec56c
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

css/sgi: replace all uses of Clark with new product names

Replace all uses of 'SGI_CLARK' with 'RD_N1E1_EDGE' and
'SGI_CLARK_HELIOS' with 'RD_E1_EDGE' as per the updated product
names

Change-Id: Ib

css/sgi: replace all uses of Clark with new product names

Replace all uses of 'SGI_CLARK' with 'RD_N1E1_EDGE' and
'SGI_CLARK_HELIOS' with 'RD_E1_EDGE' as per the updated product
names

Change-Id: Ib8136e421b1a46da1e5df58c6b1432d5c78d279b
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>

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Tegra: Support for scatterfile for the BL31 image

This patch provides support for using the scatterfile format as
the linker script with the 'armlink' linker for Tegra platforms.

In order to enable

Tegra: Support for scatterfile for the BL31 image

This patch provides support for using the scatterfile format as
the linker script with the 'armlink' linker for Tegra platforms.

In order to enable the scatterfile usage the following changes
have been made:

* provide mapping for ld.S symbols in bl_common.h
* include bl_common.h from all the affected files
* update the makefile rules to use the scatterfile and armlink
to compile BL31
* update pubsub.h to add sections to the scatterfile

NOTE: THIS CHANGE HAS BEEN VERIFIED WITH TEGRA PLATFORMS ONLY.

Change-Id: I7bb78b991c97d74a842e5635c74cb0b18e0fce67
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #1829 from antonio-nino-diaz-arm/an/pauth

Add Pointer Authentication (ARMv8.3-PAuth) support to the TF

Merge pull request #1840 from grandpaul/rpi3-sdhost-improve1

RaspberryPi3 sdhost driver improvement.

plat/arm: Implement ARMv8.3-PAuth interfaces

This feature is only supported on FVP.

Change-Id: I4e265610211d92a84bd2773c34acfbe02a1a1826
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

Merge pull request #1838 from chandnich/rename

Apply official names to SGI-Clark Platforms

Merge pull request #1834 from thloh85-intel/s10_bl31

plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform