| 568bfb7b | 24-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge changes from topic "k3-cleanups" into integration
* changes:
ti: k3: common: Align elements of map region table
ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default
ti: k3: common:
Merge changes from topic "k3-cleanups" into integration
* changes:
ti: k3: common: Align elements of map region table
ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default
ti: k3: common: Remove shared RAM space
ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other defines
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| c9ac30a5 | 24-Apr-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Console: Remove Arm console unregister on suspend
Change-Id: Ie649b3c367a93db057eeaee7e83fa3e43f8c2607
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> |
| 71a35273 | 10-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID
When we get a sequence ID that does not match what we expect then the we
are looking at is not the one we are expecting and so we er
ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID
When we get a sequence ID that does not match what we expect then the we
are looking at is not the one we are expecting and so we error out. We
can also assume this message is a stale message left in the queue, in
this case we can read in the next message and check again for our
message. Switch to doing that here. We only retry a set number of times
so we don't lock the system if our message is actually lost and will
never show up.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I6c8186ccc45e646d3ba9d431f7d4c451dcd70c5c
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| 7a469035 | 10-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Cleanup sequence ID usage
The sequence ID can be set with a message to identify it when it is
responded to in the response queue. We assign each message a number and
check f
ti: k3: drivers: ti_sci: Cleanup sequence ID usage
The sequence ID can be set with a message to identify it when it is
responded to in the response queue. We assign each message a number and
check for this same number to detect response mismatches.
Start this at 0 and increase it by one for each message sent, even ones
that do not request or wait for a response as one may still be delivered
in some cases and we want to detect this.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I72b4d1ef98bf1c1409d9db9db074af8dfbcd83ea
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| fb98ca5a | 10-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: sec_proxy: Use direction definitions
The direction of a thread should be explicitly compared to avoid
confusion. Also fixup message wording based on this direction.
Signed-off-by:
ti: k3: drivers: sec_proxy: Use direction definitions
The direction of a thread should be explicitly compared to avoid
confusion. Also fixup message wording based on this direction.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ia3cf9413cd23af476bb5d2e6d70bee15234cbd11
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| 6c30baee | 10-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: sec_proxy: Fix printf format specifiers
The ID of a thread is not used outside for printing it out when
something goes wrong. The specifier used is also not consistent.
Instead of s
ti: k3: drivers: sec_proxy: Fix printf format specifiers
The ID of a thread is not used outside for printing it out when
something goes wrong. The specifier used is also not consistent.
Instead of storing the thread ID, store its name and print that.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Id137c2f8dfdd5c599e220193344ece903f80af7b
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| 932d0296 | 23-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge changes from topic "yg/optee" into integration
* changes:
stm32mp1: add OP-TEE support
stm32mp1: fix TZC400 configuration against non-secure DDR
stm32mp1: remove useless define
stm32mp
Merge changes from topic "yg/optee" into integration
* changes:
stm32mp1: add OP-TEE support
stm32mp1: fix TZC400 configuration against non-secure DDR
stm32mp1: remove useless define
stm32mp: split stm32mp_io_setup function
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| 1989a19c | 19-Apr-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: add OP-TEE support
Support booting OP-TEE as BL32 boot stage and secure runtime
service.
OP-TEE executes in internal RAM and uses a secure DDR area to store
the pager pagestore. Memory ma
stm32mp1: add OP-TEE support
Support booting OP-TEE as BL32 boot stage and secure runtime
service.
OP-TEE executes in internal RAM and uses a secure DDR area to store
the pager pagestore. Memory mapping and TZC are configured accordingly
prior OP-TEE boot. OP-TEE image is expected in OP-TEE v2 format where
a header file describes the effective boot images. This change
post processes header file content to get OP-TEE load addresses
and set OP-TEE boot arguments.
Change-Id: I02ef8b915e4be3e95b27029357d799d70e01cd44
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| eb4519ef | 18-Apr-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: fix TZC400 configuration against non-secure DDR
This change disables secure accesses to non-secure DDR which are useless.
TF-A already maps non-secure memory with non-secure permissions th
stm32mp1: fix TZC400 configuration against non-secure DDR
This change disables secure accesses to non-secure DDR which are useless.
TF-A already maps non-secure memory with non-secure permissions thanks
to the MMU.
This change also corrects some inline comments.
Change-Id: Id4c20c9ee5c95a666dae6b7446ed80baf2d53fb0
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| 4d95beda | 15-Apr-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: remove useless define
Remove STM32MP_DDR_SPEED_DFLT that is not used in STM32MP1 TF-A code.
Change-Id: I780cdc4e93a8a9d997d50f67cfc582acd4a353d6
Signed-off-by: Yann Gautier <yann.gautier@
stm32mp1: remove useless define
Remove STM32MP_DDR_SPEED_DFLT that is not used in STM32MP1 TF-A code.
Change-Id: I780cdc4e93a8a9d997d50f67cfc582acd4a353d6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 0b1aa772 | 23-Apr-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp: split stm32mp_io_setup function
A new static function boot_mmc is created to simplify code maintenance
of stm32mp_io_setup.
Change-Id: I5c416e567e7e174fb1c2b435925a983c9c55fc40
Signed-off-
stm32mp: split stm32mp_io_setup function
A new static function boot_mmc is created to simplify code maintenance
of stm32mp_io_setup.
Change-Id: I5c416e567e7e174fb1c2b435925a983c9c55fc40
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 883eab2b | 22-Jan-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Align elements of map region table
This is only a formatting change but makes it instantly clear how each
region is set. This is over 80 chars and the MT_RO are not strictly
needed b
ti: k3: common: Align elements of map region table
This is only a formatting change but makes it instantly clear how each
region is set. This is over 80 chars and the MT_RO are not strictly
needed but this section very important to get right so make readability
the priority here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I2432deda05d4502b3478170296b5da43f26ad8e6
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| e2dc40a2 | 22-Jan-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default
This should be more secure and looks a bit cleaner.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ie5eaf0234b211ba02631cf5eab5faa
ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default
This should be more secure and looks a bit cleaner.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ie5eaf0234b211ba02631cf5eab5faa1402a34461
show more ...
|
| 32e29fcb | 22-Jan-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Remove shared RAM space
We don't use this for anything right now, remove it.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I11505d01834f7ff1fdba46fda0acbb3b56fc9b66 |
| a481f8b8 | 22-Jan-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other defines
This makes definitions more consistent, plus helps alignment.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I38fcdd7
ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other defines
This makes definitions more consistent, plus helps alignment.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I38fcdd76207586613d9934c9dc83d7a347e9e0fc
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| b0c97daf | 16-Apr-2019 |
Aditya Angadi <aditya.angadi@arm.com> |
plat/arm: introduce wrapper functions to setup secure watchdog
The BL1 stage setup code for ARM platforms sets up the SP805 watchdog
controller as the secure watchdog. But not all ARM platforms use
plat/arm: introduce wrapper functions to setup secure watchdog
The BL1 stage setup code for ARM platforms sets up the SP805 watchdog
controller as the secure watchdog. But not all ARM platforms use SP805
as the secure watchdog controller.
So introduce two new ARM platform code specific wrapper functions to
start and stop the secure watchdog. These functions then replace the
calls to SP805 driver in common BL1 setup code. All the ARM platforms
implement these wrapper functions by either calling into SP805 driver
or the SBSA watchdog driver.
Change-Id: I1a9a11b124cf3fac2a84f22ca40acd440a441257
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 5d149bdb | 16-Apr-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Temporarily disable shared Mbed TLS heap for SGM
There is a bug in the shared heap implementation for SGM. Until the bug
is solved, the default implementation is used.
Change-Id: I010911a3f00ed860f
Temporarily disable shared Mbed TLS heap for SGM
There is a bug in the shared heap implementation for SGM. Until the bug
is solved, the default implementation is used.
Change-Id: I010911a3f00ed860f742b14daad1d99b9e7ce711
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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| 72db70ca | 12-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge changes from topic "av/tls-heap" into integration
* changes:
Mbed TLS: Remove weak heap implementation
sgm: Fix bl2 sources |
| 5e2f1ce2 | 12-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge changes from topic "pb/tbbr-oid" into integration
* changes:
doc: Clarify cert_create build when USE_TBBR_DEFS=0
plat/sgm: Remove redundant platform_oid.h |
| 4b9d01d5 | 12-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge changes from topic "renesas-bsp203" into integration
* changes:
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3
rcar_gen3: drivers: Change to restore timer counter value at resume
Merge changes from topic "renesas-bsp203" into integration
* changes:
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3
rcar_gen3: drivers: Change to restore timer counter value at resume
rcar_gen3: drivers: pwrc: Add DBSC4 setting before self-refresh mode
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.2
rcar_gen3: drivers: ddr: Update DDR setting rev.0.35
rcar_gen3: drivers: qos: change subslot cycle
rcar_gen3: drivers: board: Add new board revision for H3ULCB
rcar_gen3: plat: Change periodic write DQ training option.
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| 5c92aeab | 12-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge "hikey960: Fix race condition between hotplug and idles" into integration |
| 2374ab17 | 10-Apr-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Mbed TLS: Remove weak heap implementation
The implementation of the heap function plat_get_mbedtls_heap() becomes
mandatory for platforms supporting TRUSTED_BOARD_BOOT.
The shared Mbed TLS heap def
Mbed TLS: Remove weak heap implementation
The implementation of the heap function plat_get_mbedtls_heap() becomes
mandatory for platforms supporting TRUSTED_BOARD_BOOT.
The shared Mbed TLS heap default weak function implementation is
converted to a helper function get_mbedtls_heap_helper() which can be
used by the platforms for their own function implementation.
Change-Id: Ic8f2994e25e3d9fcd371a21ac459fdcafe07433e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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| e5be1f95 | 11-Apr-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
sgm: Fix bl2 sources
The weak version of plat_get_mbedtls_heap() was being used.
Change-Id: I6da331a098dd1af5bb64729d5b914cfb74b8869e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com> |
| 551631aa | 11-Apr-2019 |
Paul Beesley <paul.beesley@arm.com> |
plat/sgm: Remove redundant platform_oid.h
This file is used when building the cert_create tool without using
the 'standard' set of Arm OID values as defined in the TBBR
specification (see tbbr_oid.h
plat/sgm: Remove redundant platform_oid.h
This file is used when building the cert_create tool without using
the 'standard' set of Arm OID values as defined in the TBBR
specification (see tbbr_oid.h). This configuration is enabled by
setting USE_TBBR_DEFS to 0 during build.
At the moment this will fail because the header file included by
this file was removed in commit bb41eb7a9dc3 ("cert: move
platform_oid.h to include/tools_share for all platforms"). For
the SGM platform this means that there is no current use for
this file.
Change-Id: I3c82983ada62330f1ab6be6d6c0cf489adabae7b
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
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| b028f2c5 | 22-Mar-2019 |
Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> |
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3
Update the revision number in the revision management file.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-of
rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3
Update the revision number in the revision management file.
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: If8918efad0fcbe6f91b66c0c7438406b1d4fb759
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