Merge pull request #1891 from soby-mathew/sm/increase_fvp_stack

fvp: Increase the size of the stack for FVP

rockchip: add an fdt parsing stub for platform param

The Rockchip ATF platform can be entered from both Coreboot and U-Boot.
While Coreboot does submit the list of linked parameter structs as
platfo

rockchip: add an fdt parsing stub for platform param

The Rockchip ATF platform can be entered from both Coreboot and U-Boot.
While Coreboot does submit the list of linked parameter structs as
platform param, upstream u-boot actually always provides a pointer
to a devicetree as parameter.
This results in current ATF not running at all when started from U-Boot.

To fix this, add a stub that checks if the parameter is a fdt so we
can at least boot and not get stuck. Later on we can extend this with
actual parsing of information from the devicetree.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

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fvp: Increase the size of the stack for FVP

When RECLAIM_INIT_CODE is 1, the stack is used to contain the .text.init
section. This is by default enable on FVP. Due to the size increase of
the .text.

fvp: Increase the size of the stack for FVP

When RECLAIM_INIT_CODE is 1, the stack is used to contain the .text.init
section. This is by default enable on FVP. Due to the size increase of
the .text.init section, the stack had to be adjusted contain it.

Change-Id: Ia392341970fb86c0426cf2229b1a7295453e2e32
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>

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Put Pointer Authentication key value in BSS section

The dummy implementation of the plat_init_apiakey() platform API uses
an internal 128-bit buffer to store the initial key value used for
Pointer A

Put Pointer Authentication key value in BSS section

The dummy implementation of the plat_init_apiakey() platform API uses
an internal 128-bit buffer to store the initial key value used for
Pointer Authentication support.

The intent - as stated in the file comments - was for this buffer to
be write-protected by the MMU. Initialization of the buffer would be
performed before enabling the MMU, thus bypassing write protection
checks.

However, the key buffer ended up into its own read-write section by
mistake due to a typo on the section name ('rodata.apiakey' instead of
'.rodata.apiakey', note the leading dot). As a result, the linker
script was not pulling it into the .rodata output section.

One way to address this issue could have been to fix the section
name. However, this approach does not work well for BL1. Being the
first image in the boot flow, it typically is sitting in real ROM
so we don't have the capacity to update the key buffer at any time.

The dummy implementation of plat_init_apiakey() provided at the moment
is just there to demonstrate the Pointer Authentication feature in
action. Proper key management and key generation would have to be a
lot more careful on a production system.

Therefore, the approach chosen here to leave the key buffer in
writable memory but move it to the BSS section. This does mean that
the key buffer could be maliciously updated for intalling unintended
keys on the warm boot path but at the feature is only at an
experimental stage right now, this is deemed acceptable.

Change-Id: I121ccf35fe7bc86c73275a4586b32d4bc14698d6
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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Introduce preliminary support for Neoverse Zeus

Change-Id: If56d1e200a31bd716726d7fdc1cc0ae8a63ba3ee
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>

Merge pull request #1859 from JackyBai/master

refact the imx8m common code and add the imx8mm support

Merge pull request #1874 from hadi-asyrafi/qspi_boot

intel: QSPI boot enablement

Merge pull request #1873 from hadi-asyrafi/driver_qspi

intel: Add driver for QSPI

intel: QSPI boot enablement
Manages QSPI initialization, configuration and IO handling as boot device

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>

plat: imx8m: Add the basic support for imx8mm

The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-a

plat: imx8m: Add the basic support for imx8mm

The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-art media-specific
features with high-performance processing while optimized
for lowest power consumption. The i.MX 8M Mini Media Applications
Processor is 14nm FinFET product of the growing i.MX8M family
targeting the consumer & industrial market. It is built in 14LPP
to achieve both high performance and low power consumption
and relies on a powerful fully coherent core complex based on
a quad Cortex-A53 cluster with video and graphics accelerators

this patch add the basic support for i.MX8MM.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>

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intel: Add driver for QSPI
To support the enablement of QSPI booting

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>

plat/arm: mhu: make mhu driver generic

MHU doorbell driver requires arm platform specific
macro "PLAT_CSS_MHU_BASE".
Rename it to "PLAT_MHUV2_BASE", so that platforms other than arm
can use generic

plat/arm: mhu: make mhu driver generic

MHU doorbell driver requires arm platform specific
macro "PLAT_CSS_MHU_BASE".
Rename it to "PLAT_MHUV2_BASE", so that platforms other than arm
can use generic MHU doorbell driver.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>

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plat/synquacer: enable SCMI support

Enable the SCMI protocol support in SynQuacer platform.
Aside from power domain, system power and apcore management protocol,
this commit adds the vendor specific

plat/synquacer: enable SCMI support

Enable the SCMI protocol support in SynQuacer platform.
Aside from power domain, system power and apcore management protocol,
this commit adds the vendor specific protocol(0x80).
This vendor specific protocol is used to get the dram mapping information
from SCP.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>

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plat: imx8m: refactor the code to make it reusable

for the i.MX8M SOCs, part of the code for gpc
and PSCI implementation can be reused and make it
common for all these SoCs. this patch extracts
the

plat: imx8m: refactor the code to make it reusable

for the i.MX8M SOCs, part of the code for gpc
and PSCI implementation can be reused and make it
common for all these SoCs. this patch extracts
the common part for reuse.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>

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allwinner: regulators: pick correct DT subnode

So far the DT node describing the AXP803 PMIC used in many Allwinner A64
boards had only one subnode, so our code just entering the first subnode
to fi

allwinner: regulators: pick correct DT subnode

So far the DT node describing the AXP803 PMIC used in many Allwinner A64
boards had only one subnode, so our code just entering the first subnode
to find all regulators worked fine.

However recent DT updates in the Linux kernel add more subnodes *before*
that, so we need to make sure to explicitly enter the "regulators"
subnode to find the information we are after.

Improve some DT node parsing error handling on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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zynqmp: pm: Add support for setting PMU configuration object

Allow EL2 (e.g. U-Boot) to load the configuration object at runtime
into the Xilinx ZynqMP PMU firmware. This allows booting with U-Boot

zynqmp: pm: Add support for setting PMU configuration object

Allow EL2 (e.g. U-Boot) to load the configuration object at runtime
into the Xilinx ZynqMP PMU firmware. This allows booting with U-Boot
and U-Boot SPL with PMU FW without hard-coding the configuration
object.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>

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Merge pull request #1863 from thloh85-intel/mmc_fixes

drivers: mmc: Fix some issues with MMC stack

plat: intel: Add MMC OCR voltage information for initialization

MMC stack needs OCR voltage information for the platform to initialize
MMC controller correctly.

Signed-off-by: Tien Hock, Loh <tien.

plat: intel: Add MMC OCR voltage information for initialization

MMC stack needs OCR voltage information for the platform to initialize
MMC controller correctly.

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

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Merge pull request #1864 from hadi-asyrafi/mailbox_fix

intel: Mailbox service un-accessible

Merge pull request #1862 from thloh85-intel/s10_bl2

plat: intel: Improve ECC scrubbing performance

stm32mp1: zeromem device_info struct

The change of the structure highlighted the fact that all fields are not
correctly initialized with zeroes.

Replace the other memset in the function with zerome

stm32mp1: zeromem device_info struct

The change of the structure highlighted the fact that all fields are not
correctly initialized with zeroes.

Replace the other memset in the function with zeromem, as it is faster.

Change-Id: I27f45a64e34637f79fa519f486bf5936721ef396
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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intel: Mailbox service un-accessible
Change map region for device 2 from non-secure to secure

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>

plat: intel: Improve ECC scrubbing performance

We should be using zeromem to scrub memory instead of memset. This would
improve the performance by 200x

Signed-off-by: Tien Hock, Loh <tien.hock.loh@

plat: intel: Improve ECC scrubbing performance

We should be using zeromem to scrub memory instead of memset. This would
improve the performance by 200x

Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>

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Merge pull request #1847 from jts-arm/mbedtls

Remove Mbed TLS dependency from plat_bl_common.c

Merge pull request #1853 from vwadekar/dummy_io_storage

Tegra: dummy support for the io_storage backend