| 43c733b1 | 08-Apr-2019 |
Jacky Bai <ping.bai@nxp.com> |
plat: imx8m: remove deprecated code include
The 'drivers/console/aarch64/console.S' is not needed,
so remove it from build to fix the build error when
'ERROR_DEPRECATED'set.
Change-Id: Id047a355f82
plat: imx8m: remove deprecated code include
The 'drivers/console/aarch64/console.S' is not needed,
so remove it from build to fix the build error when
'ERROR_DEPRECATED'set.
Change-Id: Id047a355f82fd33298b7e2b49eff289d28eb5b56
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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|
| f7cdf872 | 04-Apr-2019 |
Grzegorz Jaszczyk <jaz@semihalf.com> |
plat: marvell: do not rely on argument passed via smc
There is no need to rely on x1 argument.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Change-Id: Ie7766e801e724801b42b66331ba252ede5744a
plat: marvell: do not rely on argument passed via smc
There is no need to rely on x1 argument.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Change-Id: Ie7766e801e724801b42b66331ba252ede5744a2c
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|
| b143fa74 | 04-Apr-2019 |
Grzegorz Jaszczyk <jaz@semihalf.com> |
plat: marvell: sip: make sure that comphy init will use correct address
The argument passed via x1 is used as a base address for comphy related
routines. Nevertheless validation of this address wasn
plat: marvell: sip: make sure that comphy init will use correct address
The argument passed via x1 is used as a base address for comphy related
routines. Nevertheless validation of this address wasn't good enough and
allowed some non comphy related addresses to slip over.
To overcome this issue make sure that the address passed via SMC points
to valid CP range and allow to proceed comphy initializations only with
correct comphy offset.
This could be fixed in a different way e.g. by passing CP id from the
caller, but since this API is already used with various Linux, U-Boot
and UEFI versions it can't be changed.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Change-Id: Ia74dbc36efcfbefc4a102d31191e6af5808c4a82
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|
| 6e756f6d | 28-Mar-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Makefile: remove extra include paths in INCLUDES
Now it is needed to use the full path of the common header files.
Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more
informatio
Makefile: remove extra include paths in INCLUDES
Now it is needed to use the full path of the common header files.
Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more
information.
Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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|
| be3991c0 | 27-Mar-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Console: remove deprecated finish_console_register
The old version of the macro is deprecated.
Commit cc5859ca19ff ("Multi-console: Deprecate the
`finish_console_register` macro") provides more det
Console: remove deprecated finish_console_register
The old version of the macro is deprecated.
Commit cc5859ca19ff ("Multi-console: Deprecate the
`finish_console_register` macro") provides more details.
Change-Id: I3d1cdf6496db7d8e6cfbb5804f508ff46ae7e67e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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|
| 2cc97771 | 27-Mar-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Remove deprecated plat_crash_console_*
The default implementations are defined in crash_console_helpers.S. The
platforms have to define plat_crash_console_*.
Implemented placeholders for platforms
Remove deprecated plat_crash_console_*
The default implementations are defined in crash_console_helpers.S. The
platforms have to define plat_crash_console_*.
Implemented placeholders for platforms that were missing helpers.
Change-Id: Iea60b6f851956916e421dfd8c34a62d96eb9148e
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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|
| 682c307d | 03-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1917 from marex/arm/master/v3meagle-v2.0.1
rcar_gen3: plat: Add R-Car V3M support |
| 9f52e886 | 30-Mar-2019 |
Remi Pommarel <repk@triplefau.lt> |
meson/gxl: Add tool to create bl31 bootable images
GXL platforms need to have a specific header at the beginning of bl31
image to be able to boot. This adds a tool to create that and calls it at
bui
meson/gxl: Add tool to create bl31 bootable images
GXL platforms need to have a specific header at the beginning of bl31
image to be able to boot. This adds a tool to create that and calls it at
build time.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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|
| 327ad299 | 28-Mar-2019 |
Remi Pommarel <repk@triplefau.lt> |
meson/gxl: Configure and boot SCP
On Amlogic gxl (s905x) SOC, in order to use SCP, bl31 has to send bl30
and bl301 firmware along with their SHA256 hash over scpi.
Signed-off-by: Remi Pommarel <rep
meson/gxl: Configure and boot SCP
On Amlogic gxl (s905x) SOC, in order to use SCP, bl31 has to send bl30
and bl301 firmware along with their SHA256 hash over scpi.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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|
| b99f9224 | 28-Mar-2019 |
Remi Pommarel <repk@triplefau.lt> |
meson/gxl: Add support for SHA256 DMA engine
In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility th
meson/gxl: Add support for SHA256 DMA engine
In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility that could be used to offload SHA-256
computations. This adds basic support of this hardware SHA-256
engine.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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|
| 95d0d13c | 05-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
meson/gxl: Initial port of Amlogic Meson S905x (GXL)
The Amlogic Meson S905x is a SoC with a quad core Arm Cortex-A53 running
at 1.5Ghz. It also contains a Cortex-M3 used as SCP.
This port is a min
meson/gxl: Initial port of Amlogic Meson S905x (GXL)
The Amlogic Meson S905x is a SoC with a quad core Arm Cortex-A53 running
at 1.5Ghz. It also contains a Cortex-M3 used as SCP.
This port is a minimal implementation of BL31 capable of booting
mainline U-Boot and Linux:
- Partial SCPI support.
- Basic PSCI support (CPU_ON, SYSTEM_RESET, SYSTEM_OFF).
- GICv2 driver set up.
- Basic SIP services (read efuse data, enable/disable JTAG).
This port has been tested on a lepotato.
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
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|
| b709fe9c | 29-Oct-2018 |
Valentine Barshak <valentine.barshak@cogentembedded.com> |
rcar_gen3: plat: Add R-Car V3M support
Add R-Car V3M support. This is based on the original
V3M support patch for Yocto v2.23.1 by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barino
rcar_gen3: plat: Add R-Car V3M support
Add R-Car V3M support. This is based on the original
V3M support patch for Yocto v2.23.1 by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
Marek: Update on top of mainline ATF/master
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|
| bfbf5df4 | 05-Jan-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: plat: Add initial D3 support
Add R-Car D3 SoC platform specifics. Driver, PFC, QoS, DDR init code
will be added separately.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> |
| 5b4f022b | 30-Mar-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: plat: Print DRAM bank size in MiB if below 1 GiB
Print the DRAM bank size in MiB instead of GiB in case the bank size
is smaller than 1 GiB. This prevents printing zeroes on systems with
rcar_gen3: plat: Print DRAM bank size in MiB if below 1 GiB
Print the DRAM bank size in MiB instead of GiB in case the bank size
is smaller than 1 GiB. This prevents printing zeroes on systems with
small DRAM sizes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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|
| 18ff0b61 | 01-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1886 from ambroise-arm/av/static-checks
Fix extra compilation warnings |
| 9cadccdf | 01-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1913 from marex/arm/master/m3wulcb-v2.0.1
rcar_gen3: plat: Set M3W ULCB DRAM size to 2 GiB |
| d037bec9 | 01-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1898 from hadi-asyrafi/watchdog
intel: Enable watchdog timer on Intel S10 platform |
| bde2836f | 14-Feb-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Remove several warnings reported with W=2
Improved support for W=2 compilation flag by solving some nested-extern
and sign-compare warnings.
The libraries are compiling with warnings (which turn in
Remove several warnings reported with W=2
Improved support for W=2 compilation flag by solving some nested-extern
and sign-compare warnings.
The libraries are compiling with warnings (which turn into errors with
the Werror flag).
Outside of libraries, some warnings cannot be fixed.
Change-Id: I06b1923857f2a6a50e93d62d0274915b268cef05
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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|
| 609e053c | 13-Feb-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Remove several warnings reported with W=1
Improved support for W=1 compilation flag by solving missing-prototypes
and old-style-definition warnings.
The libraries are compiling with warnings (which
Remove several warnings reported with W=1
Improved support for W=1 compilation flag by solving missing-prototypes
and old-style-definition warnings.
The libraries are compiling with warnings (which turn into errors with
the Werror flag).
Outside of libraries, some warnings cannot be fixed without heavy
structural changes.
Change-Id: I1668cf99123ac4195c2a6a1d48945f7a64c67f16
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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|
| 5a21f313 | 09-Mar-2019 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
rcar_gen3: plat: Set M3W ULCB DRAM size to 2 GiB
The M3W ULCB board has 2 GiB of DRAM, set it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> |
| ae2e01b8 | 08-Mar-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
ROMLIB bug fixes
Fixed the below bugs:
1) Bug related to build flag V=1: if the flag was V=0, building with
ROMLIB would fail.
2) Due to a syntax bug in genwrappers.sh, index file entries marked as
ROMLIB bug fixes
Fixed the below bugs:
1) Bug related to build flag V=1: if the flag was V=0, building with
ROMLIB would fail.
2) Due to a syntax bug in genwrappers.sh, index file entries marked as
"patch" or "reserved" were ignored.
3) Added a prepending hash to constants that genwrappers is generating.
4) Due to broken dependencies, currently the inclusion functionality is
intentionally not utilised. This is why the contents of romlib/jmptbl.i
have been copied to platform specific jmptbl.i files. As a result of the
broken dependencies, when changing the index files, e.g. patching
functions, a clean build is always required. This is a known issue that
will be fixed in the future.
Change-Id: I9d92aa9724e86d8f90fcd3e9f66a27aa3cab7aaa
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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|
| 10e70f87 | 19-Mar-2019 |
Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Enable watchdog timer on Intel S10 platform
Watchdog driver support & enablement during platform setup
Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@inte
intel: Enable watchdog timer on Intel S10 platform
Watchdog driver support & enablement during platform setup
Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
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|
| cc686492 | 18-Mar-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1892 from sandrine-bailleux-arm/sb/pauth
Pointer authentication fixes |
| 73050e69 | 15-Mar-2019 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1866 from mmind/rockchip-fdt-param
rockchip: add an fdt parsing stub for platform param |
| 1fbb682a | 15-Mar-2019 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1888 from jts-arm/zeus
Introduce preliminary support for Neoverse Zeus |