Merge "mediatek: mt8183: add Vmodem/Vcore DVS init level" into integration

Merge "allwinner: Remove unused include path" into integration

Merge "rockchip: rk3328: Enable workaround for erratum 855873" into integration

plat: rpi4: Skip UART initialisation

So far we have seen two different clock setups for the Raspberry Pi 4
board, with the VPU clock divider being different. This was handled by
reading the divider

plat: rpi4: Skip UART initialisation

So far we have seen two different clock setups for the Raspberry Pi 4
board, with the VPU clock divider being different. This was handled by
reading the divider register and adjusting the base clock rate
accordingly.
Recently a new GPU firmware version appeared that changed the clock rate
*again*, though this time at a higher level, so the VPU rate (and the
apparent PLLC parent clock) did not seem to change, judging by reading
the clock registers.
So rather than playing cat and mouse with the GPU firmware or going
further down the rabbit hole of exploring the whole clock tree, let's
just skip the baud rate programming altogether. This works because the
GPU firmware actually sets up and programs the debug UART already, so
we can just use it.

Pass 0 as the base clock rate to let the console driver skip the setup,
also remove the no longer needed clock code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ica88a3f3c9c11059357c1e6dd8f7a4d9b1f98fd7

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intel: Fix memory calibration

Increase calibration delay to cater for HPS 1st mode and
reduce clear emif delay which takes too long

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@in

intel: Fix memory calibration

Increase calibration delay to cater for HPS 1st mode and
reduce clear emif delay which takes too long

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I1a50a5d8a6518ba085d853cb636efa07326552b4

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intel: Implement platform specific system reset 2

Add support for platform specific warm-reset through psci system reset 2.

- system_reset2 implementation that calls for l2 cache reset
- Check for

intel: Implement platform specific system reset 2

Add support for platform specific warm-reset through psci system reset 2.

- system_reset2 implementation that calls for l2 cache reset
- Check for magic number and request for warm reset in bl2
- Create a shared reset manager header file for Agilex and Stratix 10
- Clean up parameter info in plat_get_next_bl_params

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I3fdd9a2711c80d9bd3dc05b81527781d840bd726

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intel: Enable SiP SMC secure register access

Enable access to secure registers by non-secure world through secure
monitor calls

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.

intel: Enable SiP SMC secure register access

Enable access to secure registers by non-secure world through secure
monitor calls

Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I80610e08c7cf31f17f47a7597c269131a8de2491

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allwinner: Remove unused include path

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: Ia2f69e26e34462e113bc2cad4dcb923e20b8fb95

allwinner: Move the NOBITS region to SRAM A1

This frees up space in SRAM A2 that will be used by the SCP firmware and
SCPI shared memory.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-

allwinner: Move the NOBITS region to SRAM A1

This frees up space in SRAM A2 that will be used by the SCP firmware and
SCPI shared memory.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I8ce035257451e2d142666fe0cd045e59d4d57b35

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uniphier: run BL33 at EL2

All the SoCs in 64-bit UniPhier SoC family support EL2.

Just hard-code MODE_EL2 instead of using el_implemented() helper.

Change-Id: I7ab48002c5205bc8c013e1b46313b57d6c43

uniphier: run BL33 at EL2

All the SoCs in 64-bit UniPhier SoC family support EL2.

Just hard-code MODE_EL2 instead of using el_implemented() helper.

Change-Id: I7ab48002c5205bc8c013e1b46313b57d6c431db0
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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mediatek: mt8183: add Vmodem/Vcore DVS init level

spm resume will restore Vmodem/Vcore voltages
back based on the SPM_DVS_LEVEL.

Change-Id: I37ff7ce4ba62219c1858acea816c5bc9ce6c493e
Signed-off-by:

mediatek: mt8183: add Vmodem/Vcore DVS init level

spm resume will restore Vmodem/Vcore voltages
back based on the SPM_DVS_LEVEL.

Change-Id: I37ff7ce4ba62219c1858acea816c5bc9ce6c493e
Signed-off-by: Roger Lu <roger.lu@mediatek.com>

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uniphier: call uniphier_scp_is_running() only when on-chip STM is supported

uniphier_scp_is_running() reads the UNIPHIER_STMBE2COM register,
but it does not exist on all SoCs.

Do not call this func

uniphier: call uniphier_scp_is_running() only when on-chip STM is supported

uniphier_scp_is_running() reads the UNIPHIER_STMBE2COM register,
but it does not exist on all SoCs.

Do not call this function if the on-chip SCP is not supported.

Change-Id: I7c71ca0735e3a8e095c3f22ba6165f82a2986362
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge "debugfs: add SMC channel" into integration

spm-mm: Remove mm_svc.h header

The contents of this header have been merged into the spm_mm_svc.h
header file.

Change-Id: I01530b2e4ec1b4c091ce339758025e2216e740a4
Signed-off-by: Paul Beesley <paul

spm-mm: Remove mm_svc.h header

The contents of this header have been merged into the spm_mm_svc.h
header file.

Change-Id: I01530b2e4ec1b4c091ce339758025e2216e740a4
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

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spm-mm: Refactor spm_svc.h and its contents

Change-Id: I91c192924433226b54d33e57d56d146c1c6df81b
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

spm-mm: Refactor secure_partition.h and its contents

Before adding any new SPM-related components we should first do
some cleanup around the existing SPM-MM implementation. The aim
is to make sure t

spm-mm: Refactor secure_partition.h and its contents

Before adding any new SPM-related components we should first do
some cleanup around the existing SPM-MM implementation. The aim
is to make sure that any SPM-MM components have names that clearly
indicate that they are MM-related. Otherwise, when adding new SPM
code, it could quickly become confusing as it would be unclear to
which component the code belongs.

The secure_partition.h header is a clear example of this, as the
name is generic so it could easily apply to any SPM-related code,
when it is in fact SPM-MM specific.

This patch renames the file and the two structures defined within
it, and then modifies any references in files that use the header.

Change-Id: I44bd95fab774c358178b3e81262a16da500fda26
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

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spm: Remove SPM Alpha 1 prototype and support files

The Secure Partition Manager (SPM) prototype implementation is
being removed. This is preparatory work for putting in place a
dispatcher component

spm: Remove SPM Alpha 1 prototype and support files

The Secure Partition Manager (SPM) prototype implementation is
being removed. This is preparatory work for putting in place a
dispatcher component that, in turn, enables partition managers
at S-EL2 / S-EL1.

This patch removes:

- The core service files (std_svc/spm)
- The Resource Descriptor headers (include/services)
- SPRT protocol support and service definitions
- SPCI protocol support and service definitions

Change-Id: Iaade6f6422eaf9a71187b1e2a4dffd7fb8766426
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>

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Remove dependency between SPM_MM and ENABLE_SPM build flags

There are two different implementations of Secure Partition
management in TF-A. One is based on the "Management Mode" (MM)
design, the oth

Remove dependency between SPM_MM and ENABLE_SPM build flags

There are two different implementations of Secure Partition
management in TF-A. One is based on the "Management Mode" (MM)
design, the other is based on the Secure Partition Client Interface
(SPCI) specification. Currently there is a dependency between their
build flags that shouldn't exist, making further development
harder than it should be. This patch removes that
dependency, making the two flags function independently.

Before: ENABLE_SPM=1 is required for using either implementation.
By default, the SPCI-based implementation is enabled and
this is overridden if SPM_MM=1.

After: ENABLE_SPM=1 enables the SPCI-based implementation.
SPM_MM=1 enables the MM-based implementation.
The two build flags are mutually exclusive.

Note that the name of the ENABLE_SPM flag remains a bit
ambiguous - this will be improved in a subsequent patch. For this
patch the intention was to leave the name as-is so that it is
easier to track the changes that were made.

Change-Id: I8e64ee545d811c7000f27e8dc8ebb977d670608a
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

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Merge changes from topic "bs/pmf32" into integration

* changes:
pmf: Make the runtime instrumentation work on AArch32
SiP: Don't validate entrypoint if state switch is impossible

Merge changes from topic "tegra-boot-fixes-121719" into integration

* changes:
Tegra: prepare boot parameters for Trusty
Tegra: per-CPU GIC CPU interface init

Merge changes from topic "mailbox-fixes" into integration

* changes:
intel: Fix SMC SIP service
intel: Introduce mailbox response length handling
intel: Fix mailbox config return status
inte

Merge changes from topic "mailbox-fixes" into integration

* changes:
intel: Fix SMC SIP service
intel: Introduce mailbox response length handling
intel: Fix mailbox config return status
intel: Mailbox driver logic fixes
plat: intel: Fix FPGA manager on reconfiguration
plat: intel: Fix mailbox send_cmd issue
intel: Modify mailbox's get_config_status

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Merge "TF-A: Fix BL2 bug in dynamic configuration initialisation" into integration

TF-A: Fix BL2 bug in dynamic configuration initialisation

This patch fixes the bug in BL2 dynamic configuration initialisation
which prevents loading NT_FW_CONFIG image (ref. GENFW-3471).
It also ad

TF-A: Fix BL2 bug in dynamic configuration initialisation

This patch fixes the bug in BL2 dynamic configuration initialisation
which prevents loading NT_FW_CONFIG image (ref. GENFW-3471).
It also adds parentheses around 'if' statement conditions to fix
Coverity defect.

Change-Id: I353566c29b84341887e13bf8098a4fedfc4e00ff
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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Merge "intel: Create SiP service header file" into integration

Tegra: prepare boot parameters for Trusty

This patch saves the boot parameters provided by the previous bootloader
during cold boot and passes them to Trusty. Commit 06ff251ec introduced
the plat_tr

Tegra: prepare boot parameters for Trusty

This patch saves the boot parameters provided by the previous bootloader
during cold boot and passes them to Trusty. Commit 06ff251ec introduced
the plat_trusty_set_boot_args() handler, but did not consider the boot
parameters passed by the previous bootloader. This patch fixes that
anomaly.

Change-Id: Ib40dcd02b67c94cea5cefce09edb0be4a998db37
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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