feat(st): add RNG minor version

Some specific configurations (NIST/HTCR) can depend on the RNG IP minor
version used.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I3608

feat(st): add RNG minor version

Some specific configurations (NIST/HTCR) can depend on the RNG IP minor
version used.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I3608bd5cad77616bf0c031c66a8312b65d3e68c5

show more ...

feat(stm32mp2): add HASH and RNG compilation

Add the drivers compilation in STM32MP2 platform.mk.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I9916d1c3da3f9f68ea4d52ca15ea7892

feat(stm32mp2): add HASH and RNG compilation

Add the drivers compilation in STM32MP2 platform.mk.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I9916d1c3da3f9f68ea4d52ca15ea7892eff66c99

show more ...

refactor(build): use a standard rule to run the preprocessor

There are a few, functionally identical, ways to call the preprocessor
on a non-C file, depending on the file. They differ in subtle, not

refactor(build): use a standard rule to run the preprocessor

There are a few, functionally identical, ways to call the preprocessor
on a non-C file, depending on the file. They differ in subtle, not
entirely correct, ways - one is missing a dependency to the makefiles,
another generates its .d inline, and the prints are different. That has
resulted in platforms reimplementing this functionality, making the
build brittle - a change to the overall build system doesn't propagate.
So add a MAKE_PRE macro that will make a rule with all the bells and
whistles to run the preprocessor on an arbitrary file.

This patch converts the arm platforms' cot_descriptors DTS rules. The
files are renamed to fit with the build rule and all extra flags are
dropped. Those flags are only necessary for building BL2 c files, which
will be passed to the output C file. Only the DTS flags are needed for
the preprocessing step, which will be passed automatically.

Change-Id: I3c1cc0ecf93b87d828f868214928c1bc9bcb5758
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

feat(mt8189): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I8bdf79e81f2fa1920d02af904d53eb610825d5e2
Signed-off-by: Gavin Liu <gavin.liu@m

feat(mt8189): add reset and poweroff function for PSCI call

Add reset and poweroff function for PSCI call.

Change-Id: I8bdf79e81f2fa1920d02af904d53eb610825d5e2
Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>

show more ...

feat(mt8189): link prebuilt library

If MTKLIB_PATH is provided, the build will use the library provided
by MTKLIB_PATH. Otherwise, it will use stub implementation.

Signed-off-by: Gavin Liu <gavin.l

feat(mt8189): link prebuilt library

If MTKLIB_PATH is provided, the build will use the library provided
by MTKLIB_PATH. Otherwise, it will use stub implementation.

Signed-off-by: Gavin Liu <gavin.liu@mediatek.corp-partner.google.com>
Change-Id: I0eebfdf69ab1d4f7788b3cc6de26e47587f6b906

show more ...

Merge "feat(st): use and override default MBedTLS config" into integration

fix(xilinx): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a d

fix(xilinx): typecast operands to match data type

This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I1640a5f40f9471abf4023234ebdbc47018473c56
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

show more ...

Merge "feat(cpufeat): add support for FEAT_FGWTE3" into integration

Merge "fix(qti): allow secure r/w to the EUD enable register" into integration

feat(cpufeat): add support for FEAT_FGWTE3

Enable write traps for key EL3 system registers as per FEAT_FGWTE3,
ensuring their values remain unchanged after boot.

Excluded Registers:
MDCR_EL3 and MP

feat(cpufeat): add support for FEAT_FGWTE3

Enable write traps for key EL3 system registers as per FEAT_FGWTE3,
ensuring their values remain unchanged after boot.

Excluded Registers:
MDCR_EL3 and MPAM3_EL3: Not trapped as they are part of the EL3 context.
SCTLR_EL3: Not trapped since it is overwritten during
powerdown sequence(Included when HW_ASSISTED_COHERENCY=1)

TPIDR_EL3: Excluded due to its use in crash reporting(It is included
when CRASH_REPORTING=0)

Reference:
https://developer.arm.com/documentation/ddi0601/2025-06/AArch64-Registers/FGWTE3-EL3--Fine-Grained-Write-Traps-EL3

Change-Id: Idcb32aaac7d65a0b0e5c90571af00e01a4e9edb1
Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>

show more ...

feat(st): use and override default MBedTLS config

Each time MbedTLS is updated, the default config may be updated. As
STM32MP platforms have their own config file, this needs to be aligned.
To avoid

feat(st): use and override default MBedTLS config

Each time MbedTLS is updated, the default config may be updated. As
STM32MP platforms have their own config file, this needs to be aligned.
To avoid this alignment, directly include the default config and
override some values for ST platforms, mainly heap size.
MBEDTLS_MPI_WINDOW_SIZE is also kept to avoid behavior change.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6a9c3141451ab7b11906a7139549d31cfff0581a

show more ...

Merge "feat(st): put stm32image tool in build directory" into integration

Merge "feat(mt8189): add hotplug driver" into integration

fix(qti): allow secure r/w to the EUD enable register

The EUD (Embedded USB Debugger) is an IP block that can only be toggled
from the secure world. Allow accessing its enable register through the
S

fix(qti): allow secure r/w to the EUD enable register

The EUD (Embedded USB Debugger) is an IP block that can only be toggled
from the secure world. Allow accessing its enable register through the
SCM MMIO R/W calls.

The remaining (non-qtiseclib) platforms don't feature this hardware.

Compile-tested only, but should be simple enough.

Change-Id: I2763fd89f2a9d068ec2b4662dc2de91d1d466666
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

show more ...

feat(st): put stm32image tool in build directory

Following the series moving common tools compilation to the build
directory[1], do the same for stm32image tool.

[1]: cbd6cec3c3 feat(build): put fi

feat(st): put stm32image tool in build directory

Following the series moving common tools compilation to the build
directory[1], do the same for stm32image tool.

[1]: cbd6cec3c3 feat(build): put fiptool in the build directory

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If33556e98c4788350a29c8ad96dc574584b67abd

show more ...

fix(lx2160a): put cert_create_tbbr.mk in the standard location

The cert_create_tbbr.mk file is generally looked for in the platform
directory. The lx2160a breaks from this convention and stores the

fix(lx2160a): put cert_create_tbbr.mk in the standard location

The cert_create_tbbr.mk file is generally looked for in the platform
directory. The lx2160a breaks from this convention and stores the file
elsewhere, requiring a cludgy `cp` mid way through the make process. The
result is an untracked file when building the platform, which is
undesirable.

Fix this by putting the cert_create_tbbr.mk (and associated source
files) in the plat/ directory, just like we do for juno and stm32mp1.

Change-Id: Ifa8bb07dba4f55da4f0e230efa7beccf30bd1de7
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

feat(build): put crttool in the build directory

Same as fiptool. Move all artefacts to the platform build directory and
convert to the standard build macro to make things more generic. Leave
a symli

feat(build): put crttool in the build directory

Same as fiptool. Move all artefacts to the platform build directory and
convert to the standard build macro to make things more generic. Leave
a symlink for the final binary in case someone depends on it.

Change-Id: I82ef846a95474ba385377032fb185e548827bf5c
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

build(marvell): avoid using recursive expansion for BLE_INCLUDES

Commit 559ab2df4 specifies that there should be a PLAT_INCLUDES
specifically for the BLE image. This is done with a quirky rule that

build(marvell): avoid using recursive expansion for BLE_INCLUDES

Commit 559ab2df4 specifies that there should be a PLAT_INCLUDES
specifically for the BLE image. This is done with a quirky rule that
triggers only on the BLE files and relies on PLAT_INCLUDES expanding
recursively to work correctly.

Recursively expanded variables are a brittle part of the build system,
so this patch removes that aspect but keeps the BLE_INCLUDES principle
via the BLE_INCLUDE_DIRS variable that MAKE_C will correctly pick up.

Change-Id: Ibd10904f6a005fef9ed242b65e96662ce002eb18
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

Merge changes I9bc7b609,Ie56dc965,Ic57d46bf,I3f2ab549,I3ad715fa, ... into integration

* changes:
refactor(build): initialise `arch-features` closer to where it is needed
refactor(build): define

Merge changes I9bc7b609,Ie56dc965,Ic57d46bf,I3f2ab549,I3ad715fa, ... into integration

* changes:
refactor(build): initialise `arch-features` closer to where it is needed
refactor(build): define the W and DEBUG flags in the standard way
refactor(build): put the cross referencing of options together
fix: use LDLIBS instead of LDFLAGS for library search paths
fix(build): remove redundant variables
fix(intel): fix variable may be used uninitialized error

show more ...

fix: use LDLIBS instead of LDFLAGS for library search paths

The LDLIBS is quite convenient for both the -l and -L flags as both ld
and gcc will accept them identically when linking. So use LDLIBS an

fix: use LDLIBS instead of LDFLAGS for library search paths

The LDLIBS is quite convenient for both the -l and -L flags as both ld
and gcc will accept them identically when linking. So use LDLIBS and
leave LDFLAGS alone for flags that have some difference (eg needing a
-Wl prefix).

Change-Id: I3f2ab54931eff4e796dc4757950ed797ab3344a8
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

fix(build): remove redundant variables

The PLAT_BL_* family of variables were intended as the platform
interface to the build system. Unfortunately, only
PLAT_BL_COMMON_SOURCES has caught on and the

fix(build): remove redundant variables

The PLAT_BL_* family of variables were intended as the platform
interface to the build system. Unfortunately, only
PLAT_BL_COMMON_SOURCES has caught on and the rest remain totally
unused. As there is no ongoing effort to change that, those flags are
only noise in the makefiles. Remove them to simplify.

Change-Id: I3ad715fa7859a28cf92d3897421f7b88cdea23cc
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

fix(intel): fix variable may be used uninitialized error

When building with LTO, the compiler can correctly see that there are
code paths that can lead to a variable used without it being written to

fix(intel): fix variable may be used uninitialized error

When building with LTO, the compiler can correctly see that there are
code paths that can lead to a variable used without it being written to.
Give these variables a starting value of 0 as a reasonable default
if/when this happens and to make the compiler happy.

Change-Id: I1d1efdbc59945d15a18fb3cfd498061eb681e5f9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

show more ...

feat(versal2): validate non-secure entry addr

Added validate_ns_entrypoint to get reserved-memory entries from
the Flattened Device Tree (FDT). Identifies secure and non-secure
memory regions and ch

feat(versal2): validate non-secure entry addr

Added validate_ns_entrypoint to get reserved-memory entries from
the Flattened Device Tree (FDT). Identifies secure and non-secure
memory regions and checks if entry point lies within a valid
non-secure region.

Change-Id: Iff998fe855f5de8fbd96f0d7d4b0d7c33c904d34
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

feat(versal2): parse reserve memory subnodes

In Versal Gen 2, TF-A parses the device tree to identify secure and
non-secure memory regions, which are then used to validate the
non-secure entry point

feat(versal2): parse reserve memory subnodes

In Versal Gen 2, TF-A parses the device tree to identify secure and
non-secure memory regions, which are then used to validate the
non-secure entry point address during a hot plug event

Change-Id: I8cdb098509bd3b06f0df5ea647220bdbb8a4bf35
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

show more ...

Merge "fix(lx2160): set snoop-delayed exclusive handling on A72 cores" into integration