| d6546575 | 21-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "rddaniel_rotpk" into integration
* changes: plat/arm/rddanielxlr: add platform function to return ROTPK plat/arm/rddaniel: add platform function to return ROTPK |
| 0ae9bc27 | 14-Jul-2020 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
plat/arm/rddanielxlr: add platform function to return ROTPK
TBBR authentication framework depends on the plat_get_rotpk_info() function to return the pointer to the Root of Trust Public Key (ROTPK)
plat/arm/rddanielxlr: add platform function to return ROTPK
TBBR authentication framework depends on the plat_get_rotpk_info() function to return the pointer to the Root of Trust Public Key (ROTPK) stored in the platform along with its length. Add this function for RD-Daniel Config-XLR platform to support Trusted Board Boot. The function makes use of the wrapper function provided by the arm common trusted board boot function to get the ROTPK hash.
Change-Id: I509e2f7e88cc2167e1732a971d71dc131d3d4b01 Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
show more ...
|
| 98e9dcf5 | 14-Jul-2020 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
plat/arm/rddaniel: add platform function to return ROTPK
TBBR authentication framework depends on the plat_get_rotpk_info() function to return the pointer to the Root of Trust Public Key (ROTPK) sto
plat/arm/rddaniel: add platform function to return ROTPK
TBBR authentication framework depends on the plat_get_rotpk_info() function to return the pointer to the Root of Trust Public Key (ROTPK) stored in the platform along with its length. Add this function for RD-Daniel platform to support Trusted Board Boot. The function makes use of the wrapper function provided by the arm common trusted board boot function to get the ROTPK hash.
Change-Id: I6c2826a7898664afea19fd62432684cfddd9319a Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
show more ...
|
| 1322dc94 | 14-Jul-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
TF-A GICv2 driver: Introduce makefile
This patch moves all GICv2 driver files into new added 'gicv2.mk' makefile for the benefit of the generic driver which can evolve in the future without affectin
TF-A GICv2 driver: Introduce makefile
This patch moves all GICv2 driver files into new added 'gicv2.mk' makefile for the benefit of the generic driver which can evolve in the future without affecting platforms.
NOTE: Usage of 'drivers/arm/gic/common/gic_common.c' file is now deprecated and platforms with GICv2 driver need to be modified to include 'drivers/arm/gic/v2/gicv2.mk' in their makefiles.
Change-Id: Ib10e71bdda0e5c7e80a049ddce2de1dd839602d1 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
show more ...
|
| a53fad35 | 17-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "rpi4/fdt: Move dtb_size() function to fdt_wrappers.h" into integration |
| c82a2bcd | 17-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "brcm_rng_driver" into integration
* changes: driver: brcm: add RNG driver plat/brcm: Define RNG base address |
| 5a430c02 | 09-Jul-2020 |
Andre Przywara <andre.przywara@arm.com> |
rpi4/fdt: Move dtb_size() function to fdt_wrappers.h
Getting the actual size of a DTB blob is useful beyond the Raspberry Pi port, so let's move this helper to a common header.
Change-Id: Ia5be46e9
rpi4/fdt: Move dtb_size() function to fdt_wrappers.h
Getting the actual size of a DTB blob is useful beyond the Raspberry Pi port, so let's move this helper to a common header.
Change-Id: Ia5be46e9353ca859a1e5ad9e3c057a322dfe22e2 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
show more ...
|
| 2bdb4611 | 16-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "imx8mp_basic_support" into integration
* changes: plat: imx8mp: Add the basic support for i.MX8MP plat: imx8m: Move the gpc hw reg to a separate header file |
| 496ea77a | 16-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "uniphier: increase BL33 max size and GZIP temporary buffer size" into integration |
| fdaaaeb4 | 16-Jul-2020 |
Etienne Carriere <etienne.carriere@st.com> |
stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock and reset controllers over SCMI clock and reset domain protocols in sp_min firm
stm32mp1: SCMI clock and reset service in SP_MIN
This change implements platform services for stm32mp1 to expose clock and reset controllers over SCMI clock and reset domain protocols in sp_min firmware.
Requests execution use a fastcall SMC context using a SiP function ID. The setup allows the create SCMI channels by assigning a specific SiP SMC function ID for each channel/agent identifier defined. In this change, stm32mp1 exposes a single channel and hence expects single agent at a time.
The input payload in copied in secure memory before the message in passed through the SCMI server drivers. BL32/sp_min is invoked for a single SCMI message processing and always returns with a synchronous response message passed back to the caller agent.
This change fixes and updates STM32_COMMON_SIP_NUM_CALLS that was previously wrongly set 4 whereas only 1 SiP SMC function ID was to be counted. STM32_COMMON_SIP_NUM_CALLS is now set to 3 since the 2 added SiP SMC function IDs for SCMI services.
Change-Id: Icb428775856b9aec00538172aea4cf11e609b033 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
show more ...
|
| 88b88228 | 16-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "stm32mp1: register shared resource per GPIO bank/pin" into integration |
| 62cd4a19 | 16-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "stm32mp1: register shared resource per IOMEM address" into integration |
| 9eed56e8 | 16-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "stm32mp1: allow non-secure access to reset upon periph registration" into integration |
| d88e485f | 16-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "stm32mp1: allow non-secure access to clocks upon periph registration" into integration |
| ac6b3b28 | 16-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "stm32mp1: shared resources: peripheral registering" into integration |
| 936cf5fd | 16-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "stm32mp1: shared resources: add trace messages" into integration |
| 9d8028e9 | 15-Jul-2020 |
André Przywara <andre.przywara@arm.com> |
Merge changes from topic "fpga_cmdline" into integration
* changes: arm_fpga: Predefine DTB and BL33 load addresses arm_fpga: Add Klein and Matterhorn support arm_fpga: Support more CPU cluste
Merge changes from topic "fpga_cmdline" into integration
* changes: arm_fpga: Predefine DTB and BL33 load addresses arm_fpga: Add Klein and Matterhorn support arm_fpga: Support more CPU clusters
show more ...
|
| 3aa2abbb | 14-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "SPMD: fix boundary check if manifest is page aligned" into integration |
| fdd5f9e6 | 08-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
SPMD: fix boundary check if manifest is page aligned
while mapping SPMC manifest page in the SPMD translation regime the mapped size was resolved to zero if SPMC manifest base address is PAGE aligne
SPMD: fix boundary check if manifest is page aligned
while mapping SPMC manifest page in the SPMD translation regime the mapped size was resolved to zero if SPMC manifest base address is PAGE aligned, causing SPMD to abort.
To fix the problem change mapped size to PAGE_SIZE if manifest base is PAGE aligned.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: I06cd39dbefaf492682d9bbb0c82b950dd31fb416
show more ...
|
| 86fba7dc | 13-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "plat/arm: Fix build failure due to increase in BL2 size" into integration |
| c10563ba | 13-Jul-2020 |
Bharat Gooty <bharat.gooty@broadcom.com> |
driver: brcm: add RNG driver
Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Change-Id: I490d7e4d49bd9f5a62d343a264a1e14c2066ceca |
| cefde213 | 06-Jul-2020 |
Roman Bacik <roman.bacik@broadcom.com> |
plat/brcm: Define RNG base address
Change-Id: I4f5efcd7638a25c317382b51f05e6b9aa283d068 Signed-off-by: Roman Bacik <roman.bacik@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> |
| fdf50a25 | 10-Jul-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
plat/arm: Fix build failure due to increase in BL2 size
BL2 size gets increased due to the libfdt library update and that eventually cause no-optimization build failure for BL2 as below: aarch64-no
plat/arm: Fix build failure due to increase in BL2 size
BL2 size gets increased due to the libfdt library update and that eventually cause no-optimization build failure for BL2 as below: aarch64-none-elf-ld.bfd: BL2 image has exceeded its limit. aarch64-none-elf-ld.bfd: region `RAM' overflowed by 4096 bytes Makefile:1070: recipe for target 'build/fvp/debug/bl2/bl2.elf' failed make: *** [build/fvp/debug/bl2/bl2.elf] Error 1
Fixed build failure by increasing BL2 image size limit by 4Kb.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I92a57eb4db601561a98e254b64994bb921a88db3
show more ...
|
| a5de4319 | 10-Jun-2019 |
Grzegorz Jaszczyk <jaz@semihalf.com> |
plat: marvell: armada: mcbin: squash several IO windows into one
There is no need to open tree different IO window when there is possibility of having one covering required range.
Change-Id: I9feae
plat: marvell: armada: mcbin: squash several IO windows into one
There is no need to open tree different IO window when there is possibility of having one covering required range.
Change-Id: I9feae1fc583df1f7d97d28161cf7601f43513856 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
show more ...
|
| 41e8c6fc | 13-Nov-2019 |
Marcin Wojtas <mw@semihalf.com> |
plat: marvell: armada: fix BL32 extra parameters usage
Update missing code releated to the BL32 payload.
Change-Id: I5cbe71921467c53c45be5510f950cefdacc110e1 Signed-off-by: Marcin Wojtas <mw@semiha
plat: marvell: armada: fix BL32 extra parameters usage
Update missing code releated to the BL32 payload.
Change-Id: I5cbe71921467c53c45be5510f950cefdacc110e1 Signed-off-by: Marcin Wojtas <mw@semihalf.com>
show more ...
|