1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2020, Linaro Limited and Contributors. All rights reserved. 4 */ 5 6 #include <bl31/ehf.h> 7 #include <lib/xlat_tables/xlat_tables_compat.h> 8 #include <services/spm_mm_partition.h> 9 10 #include <platform_def.h> 11 12 /* Region equivalent to MAP_DEVICE1 suitable for mapping at EL0 */ 13 #define MAP_DEVICE1_EL0 MAP_REGION_FLAT(DEVICE1_BASE, \ 14 DEVICE1_SIZE, \ 15 MT_DEVICE | MT_RW | MT_SECURE | MT_USER) 16 17 const mmap_region_t plat_qemu_secure_partition_mmap[] = { 18 MAP_DEVICE1_EL0, /* for the UART */ 19 QEMU_SP_IMAGE_MMAP, 20 QEMU_SPM_BUF_EL0_MMAP, 21 QEMU_SP_IMAGE_NS_BUF_MMAP, 22 QEMU_SP_IMAGE_RW_MMAP, 23 {0} 24 }; 25 26 /* 27 * Boot information passed to a secure partition during initialisation. 28 * Linear indices in MP information will be filled at runtime. 29 */ 30 static spm_mm_mp_info_t sp_mp_info[] = { 31 [0] = {0x80000000, 0}, 32 [1] = {0x80000001, 0}, 33 [2] = {0x80000002, 0}, 34 [3] = {0x80000003, 0}, 35 [4] = {0x80000004, 0}, 36 [5] = {0x80000005, 0}, 37 [6] = {0x80000006, 0}, 38 [7] = {0x80000007, 0} 39 }; 40 41 const spm_mm_boot_info_t plat_qemu_secure_partition_boot_info = { 42 .h.type = PARAM_SP_IMAGE_BOOT_INFO, 43 .h.version = VERSION_1, 44 .h.size = sizeof(spm_mm_boot_info_t), 45 .h.attr = 0, 46 .sp_mem_base = PLAT_QEMU_SP_IMAGE_BASE, 47 .sp_mem_limit = BL32_LIMIT, 48 .sp_image_base = PLAT_QEMU_SP_IMAGE_BASE, 49 .sp_stack_base = PLAT_SP_IMAGE_STACK_BASE, 50 .sp_heap_base = PLAT_QEMU_SP_IMAGE_HEAP_BASE, 51 .sp_ns_comm_buf_base = PLAT_QEMU_SP_IMAGE_NS_BUF_BASE, 52 .sp_shared_buf_base = PLAT_SPM_BUF_BASE, 53 .sp_image_size = PLAT_QEMU_SP_IMAGE_SIZE, 54 .sp_pcpu_stack_size = PLAT_SP_IMAGE_STACK_PCPU_SIZE, 55 .sp_heap_size = PLAT_QEMU_SP_IMAGE_HEAP_SIZE, 56 .sp_ns_comm_buf_size = PLAT_QEMU_SP_IMAGE_NS_BUF_SIZE, 57 .sp_shared_buf_size = PLAT_SPM_BUF_SIZE, 58 .num_sp_mem_regions = PLAT_QEMU_SP_IMAGE_NUM_MEM_REGIONS, 59 .num_cpus = PLATFORM_CORE_COUNT, 60 .mp_info = sp_mp_info 61 }; 62 63 /* Enumeration of priority levels on QEMU platforms. */ 64 ehf_pri_desc_t qemu_exceptions[] = { 65 EHF_PRI_DESC(QEMU_PRI_BITS, PLAT_SP_PRI) 66 }; 67 68 /* Plug in QEMU exceptions to Exception Handling Framework. */ 69 EHF_REGISTER_PRIORITIES(qemu_exceptions, ARRAY_SIZE(qemu_exceptions), 70 QEMU_PRI_BITS); 71 72 const mmap_region_t *plat_get_secure_partition_mmap(void *cookie) 73 { 74 return plat_qemu_secure_partition_mmap; 75 } 76 77 const spm_mm_boot_info_t * 78 plat_get_secure_partition_boot_info(void *cookie) 79 { 80 return &plat_qemu_secure_partition_boot_info; 81 } 82