| 377846b6 | 12-Dec-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): include utils.h to solve compilation error
If compiling with STM32MP13 with DECRYPTION_SUPPORT != none, there is a compilation error: plat/st/common/stm32mp_crypto_lib.c: In function 'plat
fix(st): include utils.h to solve compilation error
If compiling with STM32MP13 with DECRYPTION_SUPPORT != none, there is a compilation error: plat/st/common/stm32mp_crypto_lib.c: In function 'plat_get_enc_key_info': plat/st/common/stm32mp_crypto_lib.c:532:25: error: implicit declaration of function 'zeromem' [-Werror=implicit-function-declaration] 532 | zeromem(key, *key_len); | ^~~~~~~
Adding #include <lib/utils.h> solves the error.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I0a20c5632f0379612149333e69875369d4cfca15
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| 0ee07d79 | 12-Dec-2022 |
Akshay Belsare <Akshay.Belsare@amd.com> |
fix(xilinx): use lib/smccc.h macros instead of trusty spd
There is no reason to use macros from trusty spd header and creating dependency on it. Use directly macros from lib/smccc.h
Co-developed-by
fix(xilinx): use lib/smccc.h macros instead of trusty spd
There is no reason to use macros from trusty spd header and creating dependency on it. Use directly macros from lib/smccc.h
Co-developed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Change-Id: I7cf1f76a5358ffc297c914f41c437469f5a42411
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| 5f899286 | 28-Oct-2022 |
laurenw-arm <lauren.wehrmeister@arm.com> |
feat(arm): add ARM_ROTPK_LOCATION variant full key
Add support for ARM_ROTPK_LOCATION=devel_full_dev_rsa_key, which implements the scenario where the platform provides the full ROTPK, as opposed to
feat(arm): add ARM_ROTPK_LOCATION variant full key
Add support for ARM_ROTPK_LOCATION=devel_full_dev_rsa_key, which implements the scenario where the platform provides the full ROTPK, as opposed to the hash of it. This returns a 2kB development RSA key embedded into the firmware.
The motivation for this patch is to extend our test coverage in the CI. Right now, the authentication framework allows platforms to return either the full ROTPK or a hash of it (*). However, the FVP platform only supports returning a hash currently so we cannot easily exercise the full key scenario. This patch adds that capability.
(*) Or even no key at all if it's not deployed on the platform yet, as is typically the case on pre-production/developement platforms.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Ie869cca1082410e63894e2b7dea2d31155684105
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| d6ce9907 | 09-Dec-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "fix_misra_st_platform" into integration
* changes: fix(stm32mp1): rework DWL buffer cache invalidation fix(stm32mp1): add const for strings in stm32mp_get_soc_name()
Merge changes from topic "fix_misra_st_platform" into integration
* changes: fix(stm32mp1): rework DWL buffer cache invalidation fix(stm32mp1): add const for strings in stm32mp_get_soc_name() fix(st): use Boolean type for tests fix(st): rework secure-status check in fdt_get_status() fix(st): use indices when counting GPIOs in DT fix(st): add U suffix for unsigned numbers fix(st): explicitly check operators precedence
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| 557bc9dc | 09-Dec-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "tonnad01/gcc_warn_fix" into integration
* changes: fix(scmi): change function prototype to fix gcc error fix(rdn1edge): change variable type to fix gcc sign conversion
Merge changes from topic "tonnad01/gcc_warn_fix" into integration
* changes: fix(scmi): change function prototype to fix gcc error fix(rdn1edge): change variable type to fix gcc sign conversion error
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| 302f0535 | 17-Jan-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
feat(qemu): support el3 spmc
Introduce additional defines needed when compiling the QEMU platform with SPMC at EL3.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Change-Id: If6dbe41fa87
feat(qemu): support el3 spmc
Introduce additional defines needed when compiling the QEMU platform with SPMC at EL3.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Change-Id: If6dbe41fa8761637e39579a1f6818dabc769c139
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| 36802e2c | 22-Nov-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
feat(qemu): support s-el2 spmc
Supports S-EL2 SPMC + S-EL1 SP on qemu. S-EL1 SPs packaged in .pkg files are added to the FIP as blob with an UUID. BL2 parses TB_FW_CONFIG to know which SP blobs to l
feat(qemu): support s-el2 spmc
Supports S-EL2 SPMC + S-EL1 SP on qemu. S-EL1 SPs packaged in .pkg files are added to the FIP as blob with an UUID. BL2 parses TB_FW_CONFIG to know which SP blobs to load into memory.
Co-developed-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Change-Id: I4b61c4c048f31540d4f1ef9e05f0b12deb341e06
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| 25ae7ad1 | 18-Nov-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
feat(qemu): update abi between spmd and spmc
Updates the ABI between SPMD and the SPMC at S-EL1 so that the hard coded SPMC manifest can be replaced by a proper manifest via TOS FW Config. TOS FW Co
feat(qemu): update abi between spmd and spmc
Updates the ABI between SPMD and the SPMC at S-EL1 so that the hard coded SPMC manifest can be replaced by a proper manifest via TOS FW Config. TOS FW Config is provided via QEMU_TOS_FW_CONFIG_DTS as a DTS file when building. The DTS is turned into a DTB which is added to the FIP.
Note that this is an incompatible change and requires corresponding change in OP-TEE ("core: sel1 spmc: boot abi update").
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Change-Id: Ibabe78ef50a24f775492854ce5ac54e4d471e369
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| a0f256b0 | 08-Dec-2022 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "fix(rmmd): add missing padding to RMM Boot Manifest and initialize it" into integration |
| f0f2c903 | 07-Dec-2022 |
Tony K Nadackal <tony.nadackal@arm.com> |
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC sign conversion error "comparison between signed and unsigned integer expre
fix(scmi): change function prototype to fix gcc error
Change function prototype of plat_css_get_scmi_info() to fix the GCC sign conversion error "comparison between signed and unsigned integer expressions". Changing channel_id type to unsigned int since it can never be a negative value.
Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com> Change-Id: I579b21497329db40897c10d86c8fc68e4877f3db
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| 3a3e0e53 | 07-Dec-2022 |
Tony K Nadackal <tony.nadackal@arm.com> |
fix(rdn1edge): change variable type to fix gcc sign conversion error
Change variable type in function bl31_platform_setup() to fix the GCC sign conversion error "comparison between signed and unsign
fix(rdn1edge): change variable type to fix gcc sign conversion error
Change variable type in function bl31_platform_setup() to fix the GCC sign conversion error "comparison between signed and unsigned integer expressions".
Signed-off-by: Tony K Nadackal <tony.nadackal@arm.com> Change-Id: Iff914bd7ad521883723c8fb34dd893412cce7fc5
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| dc0ca64e | 01-Dec-2022 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
fix(rmmd): add missing padding to RMM Boot Manifest and initialize it
This patch also: * Enforces the check of RES0 fields on EL3-RMM boot interface and manifest * Fixes a couple of
fix(rmmd): add missing padding to RMM Boot Manifest and initialize it
This patch also: * Enforces the check of RES0 fields on EL3-RMM boot interface and manifest * Fixes a couple of nits on the EL3-RMM Boot Interface documentation.
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: Idb9e38f9fcda2ba0655646a1e2c4fdbabd5cdc40
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| 127ed000 | 25-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1): rework DWL buffer cache invalidation
As the default part do nothing, all the code managing DWL buffer cache invalidation can be under programmer flags. This avoids running unneeded co
fix(stm32mp1): rework DWL buffer cache invalidation
As the default part do nothing, all the code managing DWL buffer cache invalidation can be under programmer flags. This avoids running unneeded code if the flags are not enabled, and corrects MISRA C2012-16.6: Every switch statement shall have at least two switch-clauses.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I90d2951f9518509b3380295fb1a6ad6b9c5e551e
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| d7f5bed9 | 24-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1): add const for strings in stm32mp_get_soc_name()
This corrects MISRA C2012-7.4: A string literal shall not be assigned to an object unless the object's type is "pointer to const-qualif
fix(stm32mp1): add const for strings in stm32mp_get_soc_name()
This corrects MISRA C2012-7.4: A string literal shall not be assigned to an object unless the object's type is "pointer to const-qualified char".
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I0c9f483dce9abd32647d5f5e2df72047cdd376dd
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| 45d2d495 | 21-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): use Boolean type for tests
This corrects MISRA C2012-14.4 The controlling expression of an if statement and the controlling expression of an iteration-statement shall have essentially Boole
fix(st): use Boolean type for tests
This corrects MISRA C2012-14.4 The controlling expression of an if statement and the controlling expression of an iteration-statement shall have essentially Boolean type.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Ibed7b87b50959f03dc5550dfaffacafd1d79feee
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| 0ebaf222 | 24-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): rework secure-status check in fdt_get_status()
This corrects MISRA C2012-15.7: All if...else if constructs shall be terminated with an else statement.
Signed-off-by: Yann Gautier <yann.gau
fix(st): rework secure-status check in fdt_get_status()
This corrects MISRA C2012-15.7: All if...else if constructs shall be terminated with an else statement.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I3d893d0db0a448323270086923563147008c59b9
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| e7d75448 | 21-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): use indices when counting GPIOs in DT
Fix MISRA C2012-18.4: The +, -, += and -= operators should not be applied to an expression of pointer type. While at it, avoid computing twice the same
fix(st): use indices when counting GPIOs in DT
Fix MISRA C2012-18.4: The +, -, += and -= operators should not be applied to an expression of pointer type. While at it, avoid computing twice the same value, by removing the initial value computation outside the loop.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Iabfe587bf72535541c94bfa341de10148aa58030
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| 9c1aa125 | 18-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): add U suffix for unsigned numbers
This corrects MISRA c2012-7.2 violation: A "u" or "U" suffix shall be applied to all integer constants that are represented in an unsigned type.
Signed-of
fix(st): add U suffix for unsigned numbers
This corrects MISRA c2012-7.2 violation: A "u" or "U" suffix shall be applied to all integer constants that are represented in an unsigned type.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I92b394572528e7179a314bbad4a032fd65053861
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| 56048fe2 | 18-Nov-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): explicitly check operators precedence
This corrects the MISRA violation C2012-12.1: The precedence of operators within expressions should be made explicit. This is done either by adding par
fix(st): explicitly check operators precedence
This corrects the MISRA violation C2012-12.1: The precedence of operators within expressions should be made explicit. This is done either by adding parentheses, or by creating dedicated variables to ease readability.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I5e3f191ee38eca7ef634bd7542e615ab625271f6
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| b8dbfacc | 07-Dec-2022 |
Soby Mathew <soby.mathew@arm.com> |
Merge "feat(rmm): add support for the 2nd DRAM bank" into integration |
| cd3a7794 | 06-Dec-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "feat(intel): extending to support SMMU in FCS" into integration |
| 9ccdfc44 | 06-Dec-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix(intel): fix fcs_client crashed when increased param size" into integration |
| 34ffe4aa | 06-Dec-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes Ia8f1471a,I6b95c19d into integration
* changes: fix(intel): agilex bitstream pre-authenticate fix(intel): mailbox store QSPI ref clk in scratch reg |
| 0ca1d8fb | 01-Nov-2022 |
Howard Lu <howard.lu@nxp.com> |
fix(layerscape): unlock write access SMMU_CBn_ACTLR
This patch is to fix Errata #841119 and #826419 failed apply in linux because of SMMU_CBn_ACTLR register can't be modified in non-secure states.
fix(layerscape): unlock write access SMMU_CBn_ACTLR
This patch is to fix Errata #841119 and #826419 failed apply in linux because of SMMU_CBn_ACTLR register can't be modified in non-secure states.
Signed-off-by: Howard Lu <howard.lu@nxp.com> Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: I2b23e7c8baa809f385917eb45b10ec6b26a9ada8
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| e8faff3d | 11-Oct-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(lx2): enable OCRAM ECC
Fix OCRAM ECC for lx2 platform.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> Change-Id: Ic46de7a40c611764a6f24400663da50e6b477ae5 |