fix(ti): remove check for zero value in BL31 boot args

The commit 3e14df6f6330 removed clearing of argument registers even when
BL31 is the first stage. In that case the registers are left in a rand

fix(ti): remove check for zero value in BL31 boot args

The commit 3e14df6f6330 removed clearing of argument registers even when
BL31 is the first stage. In that case the registers are left in a random
state. TI platforms check that the arguments have been zero'd in early
setup and so all TI platforms are not broken. Not sure why this check was
here at all, so simply remove it to fix boot.

Fixes: 3e14df6f6330 ("fix(bl31): avoid clearing of argument registers in RESET_TO_BL31 case")
Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: I02bdd16b67fb5facc4c47ec596a42f110a663377

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feat(xilinx): fix IPI calculation for Versal/NET

Fix buffer calculation logic for Versal and Versal NET to use
LOCAL/REMOTE_ID.

Change-Id: Icf6985a19183cc8e51f3a536130695e00c32c736
Signed-off-by: M

feat(xilinx): fix IPI calculation for Versal/NET

Fix buffer calculation logic for Versal and Versal NET to use
LOCAL/REMOTE_ID.

Change-Id: Icf6985a19183cc8e51f3a536130695e00c32c736
Signed-off-by: Michal Simek <michal.simek@amd.com>

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feat(xilinx): setup local/remote id in header

Use new macros IPI_LOCAL_ID/IPI_REMOTE_ID to specify source and
destination channels.

Change-Id: I558eebb4d4a83ae0ca9316824f9dba7426adbe3f
Signed-off-b

feat(xilinx): setup local/remote id in header

Use new macros IPI_LOCAL_ID/IPI_REMOTE_ID to specify source and
destination channels.

Change-Id: I558eebb4d4a83ae0ca9316824f9dba7426adbe3f
Signed-off-by: Michal Simek <michal.simek@amd.com>

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feat(xilinx): clean macro names

This is preparation for cleaning up IPI local and remote side
communication. As of today macros are aligned to communication
channel but there is missing calculation

feat(xilinx): clean macro names

This is preparation for cleaning up IPI local and remote side
communication. As of today macros are aligned to communication
channel but there is missing calculation based on channel
selection.

Change-Id: Iac7daf832ff372ea2fece72a15afdfe988b4b7db
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(zynqmp): do not export apu_ipi

apu_ipi structure is not used anywhere externally that's why make it
static.

Change-Id: Icfa99e16ae36fcbcc83b0891aa3527993d49c7ed
Signed-off-by: Michal Simek <mic

fix(zynqmp): do not export apu_ipi

apu_ipi structure is not used anywhere externally that's why make it
static.

Change-Id: Icfa99e16ae36fcbcc83b0891aa3527993d49c7ed
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(zynqmp): remove unused headers

There is no need to include all headers. Enough to have only needed one.

Change-Id: I4813156404969df36f66c1102cd627fdc1e3e9dc
Signed-off-by: Michal Simek <michal.

fix(zynqmp): remove unused headers

There is no need to include all headers. Enough to have only needed one.

Change-Id: I4813156404969df36f66c1102cd627fdc1e3e9dc
Signed-off-by: Michal Simek <michal.simek@amd.com>

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feat(xilinx): move IPI related macros to plat_ipi.h

The reason is to have all IPI related macros in the same file.

Change-Id: I88ddaa3a5dd1f10114371fc5405f8daf148ca3b8
Signed-off-by: Michal Simek <

feat(xilinx): move IPI related macros to plat_ipi.h

The reason is to have all IPI related macros in the same file.

Change-Id: I88ddaa3a5dd1f10114371fc5405f8daf148ca3b8
Signed-off-by: Michal Simek <michal.simek@amd.com>

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fix(fiptool): move juno plat_fiptool.mk

plat_fiptool.mk files now need to be in tools/fiptool/plat_fiptool/, so
this file has been moved to the new location so that it is picked up
correctly by the

fix(fiptool): move juno plat_fiptool.mk

plat_fiptool.mk files now need to be in tools/fiptool/plat_fiptool/, so
this file has been moved to the new location so that it is picked up
correctly by the build system.

Change-Id: Id3596b08bc856362e300f3dfefcaab5d75b4c400
Signed-off-by: Rob Hughes <robert.hughes@arm.com>

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feat(versal-net): add the IPI CRC checksum macro support

Add support for CRC checksum for IPI data when the macro
IPI_CRC_CHECK is enabled.

Change-Id: I14dee4729f88c407bafdf1d6b46106459d8e22c4
Sign

feat(versal-net): add the IPI CRC checksum macro support

Add support for CRC checksum for IPI data when the macro
IPI_CRC_CHECK is enabled.

Change-Id: I14dee4729f88c407bafdf1d6b46106459d8e22c4
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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Merge "fix(tegra210): mark bits [23:17] as zero for Fast SMCs" into integration

Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration

* changes:
test(tc): unify platform tests traces
test(tc): return test failures count for tfm-testsuite

Merge changes from topics "plat_tests_scalability", "sb/tc-plat-tests" into integration

* changes:
test(tc): unify platform tests traces
test(tc): return test failures count for tfm-testsuite
test(tc): move platform tests in their own function
test(tc): centralize platform error handling
refactor(tc): define PLATFORM_TESTS for scale

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fix(brcm): fix misspelled header inclusion guard

The header inclusion guard for some header for the Broadcom Stingray
board was misspelled.

Make the preprocessor symbol for the #ifndef and #define

fix(brcm): fix misspelled header inclusion guard

The header inclusion guard for some header for the Broadcom Stingray
board was misspelled.

Make the preprocessor symbol for the #ifndef and #define lines the
same, so that the double inclusion protection works as expected.

Change-Id: I19d73c854cd0689a248ce914ef35ae87c39ebf39
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat: define memory ranges for tc platform

In [1] we missed to update the SPMC manifest for the
TC platform, managing OPTEE as an SP.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-

feat: define memory ranges for tc platform

In [1] we missed to update the SPMC manifest for the
TC platform, managing OPTEE as an SP.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/20107

Signed-off-by: J-Alves <joao.alves@arm.com>
Change-Id: I68c2e0da6e63216c827f77b5b86afe9f5813e62f

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test(tc): unify platform tests traces

Add some traces at the start and end of platform tests. These traces
are the same regardless of the set of platform tests we run (NV
counter tests / TF-M testsu

test(tc): unify platform tests traces

Add some traces at the start and end of platform tests. These traces
are the same regardless of the set of platform tests we run (NV
counter tests / TF-M testsuite / future set of tests).

This makes it easier to integrate these tests in the CI because we can
now have a unified "expect" script for all platform tests, instead of
having one dedicated "expect" script for each possible set of tests.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I5ec30a7a25d8a9a4a90e3338a9789acff7ad4843

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test(tc): return test failures count for tfm-testsuite

When running the "tfm-testsuite" set of platform tests, we now count
the number of failed tests (in addition to printing a test summary)
and re

test(tc): return test failures count for tfm-testsuite

When running the "tfm-testsuite" set of platform tests, we now count
the number of failed tests (in addition to printing a test summary)
and report that back to the caller,
i.e. tc_bl31_common_platform_setup().

This will be useful to consolidate the tests failure reporting code in
a subsequent patch.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I8e51f03869f3b2f264b6581b3bd2a53be0198057

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test(tc): move platform tests in their own function

This is a bit cleaner, as it avoids cluttering the normal boot execution
path. It also gives us the opportunity to mark the tests function with
th

test(tc): move platform tests in their own function

This is a bit cleaner, as it avoids cluttering the normal boot execution
path. It also gives us the opportunity to mark the tests function with
the __dead2 attribute, which inform both the compiler and the developer
that the test function never returns (since it suspends booting).

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I082a34a840ef791a2ac4c1f59b19b32aeb0a9ec7

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test(tc): centralize platform error handling

Note that this change only affects the platform tests execution
path. It has no impact on the normal boot flow.

Make individual test functions propagate

test(tc): centralize platform error handling

Note that this change only affects the platform tests execution
path. It has no impact on the normal boot flow.

Make individual test functions propagate an error code, instead of
calling the platform error handler at the point of failure. The latter
is now the responsibility of the caller - in this case
tc_bl31_common_platform_setup().

Note that right now, tc_bl31_common_platform_setup() does not look at
the said error code but this initial change opens up an opportunity to
centralize any error handling in tc_bl31_common_platform_setup(),
which we will seize in subsequent patches.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: Ib282b64039e0b1ec6e6d29476fbaa2bcd33cb0c7

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fix(tegra210): mark bits [23:17] as zero for Fast SMCs

Per SMCCC documentation, bits [23:17] must be zero for Fast
SMCs. Other values are reserved for future use. Ensure that
these bits are zeroes f

fix(tegra210): mark bits [23:17] as zero for Fast SMCs

Per SMCCC documentation, bits [23:17] must be zero for Fast
SMCs. Other values are reserved for future use. Ensure that
these bits are zeroes for TEGRA_SIP_PMC_COMMANDS.

Commit f8a35797 introduced a check to return error if these
bits are not zero, thus breaking Tegra210 platforms. This
patch fixes the anomaly.

Change-Id: I19edc3b33c999a6fee6b86184233fba146316466
Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge "fix(n1sdp): add platform-specific power domain functions" into integration

Merge "fix(morello): add platform-specific power domain functions" into integration

Merge "fix(spmd): fix build error with spmd" into integration

fix(spmd): fix build error with spmd

Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0'
options, this causes a build failure as
'plat_spmd_handle_group0_interrupt' is called irrespective of

fix(spmd): fix build error with spmd

Currently when we build with 'SPD=spmd SPMD_SPM_AT_SEL2=0'
options, this causes a build failure as
'plat_spmd_handle_group0_interrupt' is called irrespective of
'SPMD_SPM_AT_SEL2' usage in 'spmd_group0_interrupt_handler_nwd'

So make 'plat_spmd_handle_group0_interrupt' dummy implementation
available just when spmd is enabled and SPMC_AT_EL3 is disabled.

Change-Id: Iaccd38faab81671c98f9165f318145187dca9bc2
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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build(fpga): reduce cpu_libs to tc and neoverse

Change-Id: I20e88d5e712dafa7364b7932b8b4aaa9051bea55
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>

Merge changes I5bb43cb0,I6aebe2ca,Ib59df16a,I9d037ab2,I9df5a465, ... into integration

* changes:
fix(msm8916): add timeout for crash console TX flush
style(msm8916): use size macros
feat(msm89

Merge changes I5bb43cb0,I6aebe2ca,Ib59df16a,I9d037ab2,I9df5a465, ... into integration

* changes:
fix(msm8916): add timeout for crash console TX flush
style(msm8916): use size macros
feat(msm8916): expose more timer frames
fix(msm8916): drop unneeded initialization of CNTACR
build(msm8916): disable unneeded workarounds
fix(msm8916): flush dcache after writing msm8916_entry_point
fix(msm8916): print \r before \n on UART console

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Merge changes I1bfa797e,I0ec7a70e into integration

* changes:
fix(tree): correct some typos
fix(rockchip): use semicolon instead of comma