| c669f653 | 03-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
refactor(sgi): move from "sgi" to "neoverse_rd"
Currently, reference design platforms such as RD-N2, RD-N1-Edge, RD-V1-MC, RD-V1 and SGI-575 utilize "css/sgi" as the common source directory. The "sg
refactor(sgi): move from "sgi" to "neoverse_rd"
Currently, reference design platforms such as RD-N2, RD-N1-Edge, RD-V1-MC, RD-V1 and SGI-575 utilize "css/sgi" as the common source directory. The "sgi" prefix originated from the System Guidance for Infrastructure (SGI) and was initially associated with the SGI-575 platform. However, subsequent platforms released were under the Neoverse Reference Design product name.
To align with the Neoverse Reference Design nomenclature, rename the common source directory from "css/sgi" to "css/neoverse_rd" and update all file prefixes from "sgi" to "nrd."
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I3dcbb31b9ab202e82caf25218ba33c520dcea4e4
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| 2d32517c | 20-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
feat(sgi): remove unused SGI_PLAT build-option
Currently, the common makefile has reference to "SGI_PLAT" build-option. This however is not set by any of the platforms that makes use of the common m
feat(sgi): remove unused SGI_PLAT build-option
Currently, the common makefile has reference to "SGI_PLAT" build-option. This however is not set by any of the platforms that makes use of the common makefile. Therefore, remove the unused SGI_PLAT build-option.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I6cc0b8d87222c7b3aef998774cee964a920cceb6
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| cacee060 | 06-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
fix(sgi): align to misra rule for braces
Misra rule states that braces have to be used with every 'if', 'else', 'for', 'do', and 'while' statement. In order to align with the said rule, add braces f
fix(sgi): align to misra rule for braces
Misra rule states that braces have to be used with every 'if', 'else', 'for', 'do', and 'while' statement. In order to align with the said rule, add braces for the statements within plat_css_get_scmi_info.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I826685e92926d90734b11d870dd624b11c9d1c30
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| c69253cc | 11-Jan-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
feat(rde1edge): remove support for RD-E1-Edge
As RD-E1_Edge is no longer actively supported and has been in the deprecated list for a while, remove its support.
Signed-off-by: Rohit Mathew <Rohit.M
feat(rde1edge): remove support for RD-E1-Edge
As RD-E1_Edge is no longer actively supported and has been in the deprecated list for a while, remove its support.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: Iff66ad498dd99e44e2e6b79251ba2cbefbd5f3eb
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| 10dcffed | 12-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
fix(rdn2): populate TOS_CONFIG only when SPMC_AT_EL3 is enabled
As of now, TOS_FW_CONFIG (trusted OS config) gets populated by default for RD-N2. However, TOS_FW_CONFIG is required only when SPMC_AT
fix(rdn2): populate TOS_CONFIG only when SPMC_AT_EL3 is enabled
As of now, TOS_FW_CONFIG (trusted OS config) gets populated by default for RD-N2. However, TOS_FW_CONFIG is required only when SPMC_AT_EL3 is enabled. As the platform should support SPMC_AT_EL3 disabled mode as well, populate TOS_CONFIG only when SPMC_AT_EL3 is enabled. Additionally, building of rdn2_stmm_sel0_manifest.dtb is made conditional to align with this configuration.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: I9077d44b21d32ba7bf6b3b1c539662c14785ca6b
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| 89d85778 | 10-Feb-2024 |
Rohit Mathew <Rohit.Mathew@arm.com> |
fix(board): update spi_id max for sgi multichip platforms
According to GIC-600 TRM, 960 SPIs could be supported on a platform. However, with the current configuration, platforms such as RD-V1-MC and
fix(board): update spi_id max for sgi multichip platforms
According to GIC-600 TRM, 960 SPIs could be supported on a platform. However, with the current configuration, platforms such as RD-V1-MC and RD-N1-Edge Dual-Chip utilize a much smaller range. With commit 'a02a45dfe' gic600 driver is updated to get the max SPI id from the GIC-600 and probe for the corresponding GIC instance for each SPI id. Since RD-V1-MC and RD-N1-Edge Dual-Chip supports wider range, increase SPI range for the chip 0 to max SPI range supported.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com> Change-Id: Ia8c02c6d999033af33d8e7a0bedc7b73c6552ab4
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| 87799772 | 14-Feb-2024 |
Harsimran Singh Tungal <harsimransingh.tungal@arm.com> |
build(corstone1000): add CORSTONE1000_WITH_BL32 preprocessor flag
This change includes adding new CORSTONE1000_WITH_BL32 preprocessor flag on the basis of NEED_BL32 flag. This flag allows us to run
build(corstone1000): add CORSTONE1000_WITH_BL32 preprocessor flag
This change includes adding new CORSTONE1000_WITH_BL32 preprocessor flag on the basis of NEED_BL32 flag. This flag allows us to run the TF-A with or without loading BL32 image. This feature is required to add the support of Corstone-1000 FVP in TF-A open CI. After this, we can run the TF-A tftf tests with or without executing BL32 image, which is optee in case of Corstone-1000.
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com> Change-Id: Idacbd3883473473841481a2032314db8c9715b1f
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| ef685219 | 20-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: use toolchain identifiers in conditions" into integration |
| 60dd8069 | 20-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: use new toolchain variables for tools" into integration |
| 084c9d3c | 20-Feb-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "build: refactor toolchain detection" into integration |
| e2c79340 | 20-Feb-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(imx8mp): uncondtionally enable only the USB power domain" into integration |
| a23710b4 | 21-Dec-2023 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
feat(smmu): separate out smmuv3_security_init from smmuv3_init
Split the smmuv3_init() to separate smmuv3_security_init() from it in order to allow skipping the default deny policy on reset for cert
feat(smmu): separate out smmuv3_security_init from smmuv3_init
Split the smmuv3_init() to separate smmuv3_security_init() from it in order to allow skipping the default deny policy on reset for certain SMMUv3 implementations. Additionally, fix a couple of MISRA warnings.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> Signed-off-by: Vivek Gautam <vivek.gautam@arm.com> Change-Id: I2127943e709dd1ded34145bd022c930e351bbb4a
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| 50cd7484 | 19-Feb-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(bl2): make BL2 SRAM footprint flexible" into integration |
| 02088b64 | 15-Feb-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mb/tc-model-update" into integration
* changes: docs: update FVP TC2 model version and build (11.23/17) fix(tc): increase BL2 maximum size limit refactor(tc): update
Merge changes from topic "mb/tc-model-update" into integration
* changes: docs: update FVP TC2 model version and build (11.23/17) fix(tc): increase BL2 maximum size limit refactor(tc): update platform tests feat(rss): add defines for 'type' range and use them in psa_call() feat(rss): adjust parameter packing to match TF-M changes refactor(tc): remap console logs
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| e0e03a8d | 06-Feb-2024 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(bl2): make BL2 SRAM footprint flexible
On FVP's the default SRAM size is severly restrictive. However, more recent models support larger SRAM configurations (> 256 Kb). We introduced the flag FV
fix(bl2): make BL2 SRAM footprint flexible
On FVP's the default SRAM size is severly restrictive. However, more recent models support larger SRAM configurations (> 256 Kb). We introduced the flag FVP_TRUSTED_SRAM_SIZE to allow for TF to handle different configurations.
BL31 automatically benefits from this optimisation since it starts from the bottom of shared memory, and runs up to the end of SRAM. Increase the size of all BL2 builds in proportion to FVP_TRUSTED_SRAM_SIZE so that BL2 covers around a third of SRAM.
Change-Id: Idf37e8cb86507ea44b97ac8b3b90fffefe13f57a Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 19258a58 | 21-Dec-2023 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(tc): increase BL2 maximum size limit
Increase the size of BL2 to build TC2 with GPT support enabled and a config modification of mbedTLS.
Change-Id: I6d2f466144f2bbffd3387bc40bc86ab733febce1 Si
fix(tc): increase BL2 maximum size limit
Increase the size of BL2 to build TC2 with GPT support enabled and a config modification of mbedTLS.
Change-Id: I6d2f466144f2bbffd3387bc40bc86ab733febce1 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| a93bf0aa | 22-Dec-2023 |
David Vincze <david.vincze@arm.com> |
refactor(tc): update platform tests
Update the TC's platform test Makefile and related common definitions to correspond to newer TF-M code (commit hash: 4ab7a20).
Change-Id: I6ef3effe194a780a0533f9
refactor(tc): update platform tests
Update the TC's platform test Makefile and related common definitions to correspond to newer TF-M code (commit hash: 4ab7a20).
Change-Id: I6ef3effe194a780a0533f9c0c2eab9d0f4efc1fc Signed-off-by: David Vincze <david.vincze@arm.com>
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| 77241043 | 20-Feb-2023 |
annsai01 <annam.saimanisha@arm.com> |
refactor(tc): remap console logs
Remap TF-A console logs from SoC UART2 (S1 terminal) to CSS secure (UART1_AP terminal) and Linux logs from SoC UART2 (S1 terminal) to CSS non-secure (UART_AP termina
refactor(tc): remap console logs
Remap TF-A console logs from SoC UART2 (S1 terminal) to CSS secure (UART1_AP terminal) and Linux logs from SoC UART2 (S1 terminal) to CSS non-secure (UART_AP terminal) to align with the latest FVP TC2 model (version 11.23/17).
Change-Id: I7206e64b65346bfdcc48d6acd3792b436041e45f Signed-off-by: Annam Sai Manisha <annam.saimanisha@arm.com>
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| 6f503e0e | 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
feat(tc): add RSS SDS region right after SCMI payload
Add a second SDS region on the TC platform for communication with RSS. RSS needs to share data with AP during early boot over shared memory to s
feat(tc): add RSS SDS region right after SCMI payload
Add a second SDS region on the TC platform for communication with RSS. RSS needs to share data with AP during early boot over shared memory to support DPE. Reserve a memory region right after the SCMI secure payload areas from unused memory.
Change-Id: I3a3a6ea5ce76531595c88754418602133a283c42 Signed-off-by: David Vincze <david.vincze@arm.com>
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| 0f37ae13 | 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(n1sdp): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. -
refactor(n1sdp): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. - Implement plat_sds_get_regions() platform function which is used by the driver to get SDS region information per platform.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24609/
Change-Id: I3447855fbe7427376d5f7aa0ba7356fe2f14d567 Signed-off-by: Tamas Ban <tamas.ban@arm.com> Signed-off-by: David Vincze <david.vincze@arm.com>
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| 48d42ed5 | 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on.
refactor(morello): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. - Implement plat_sds_get_regions() platform function which is used by the driver to get SDS region information per platform.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24609/
Change-Id: I942599edb4d9734c0455f67c6b5673aace62e444 Signed-off-by: Tamas Ban <tamas.ban@arm.com> Signed-off-by: David Vincze <david.vincze@arm.com>
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| fdcd5413 | 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(juno): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. -
refactor(juno): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. - Implement plat_sds_get_regions() platform function which is used by the driver to get SDS region information per platform.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24609/
Change-Id: I67aebfe0e2a82d1f5fc2d26653698a552350b387 Signed-off-by: Tamas Ban <tamas.ban@arm.com> Signed-off-by: David Vincze <david.vincze@arm.com>
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| 21b35eee | 08-May-2023 |
Tamas Ban <tamas.ban@arm.com> |
refactor(sgi): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. - I
refactor(sgi): update SDS driver calls
Update SDS driver calls to align with recent changes [1] of the SDS driver.
- The driver now requires us to explicitly pass the SDS region id to act on. - Implement plat_sds_get_regions() platform function which is used by the driver to get SDS region information per platform.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/24609/
Change-Id: Ifa4595278e094849bea2796ead58e85de98baaf9 Signed-off-by: Tamas Ban <tamas.ban@arm.com> Signed-off-by: David Vincze <david.vincze@arm.com>
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| 17da49bb | 12-Feb-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(qemu): disable FEAT_SB" into integration |
| 00f1ec6b | 09-Feb-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "revert-ti-dm-workaround" into integration
* changes: Revert "fix(ti): do not take system power reference in bl31_platform_setup()" refactor(ti): remove ti_sci_init func
Merge changes from topic "revert-ti-dm-workaround" into integration
* changes: Revert "fix(ti): do not take system power reference in bl31_platform_setup()" refactor(ti): remove ti_sci_init function fix(k3): increment while reading trail bytes
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