xref: /rk3399_ARM-atf/plat/arm/board/fvp/fvp_cpu_errata.mk (revision c9f2634387b4ea29f61234c4fe0fc0515ad32f2b)
1#
2# Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Flags to enable the cpu structures in the Errata ABI file
8# file: services/std_svc/errata_abi/errata_abi_main.c. This is specifically
9# for platforms that need to enable errata based on non-arm interconnect IP.
10
11ifeq (${ERRATA_ABI_SUPPORT}, 1)
12ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
13CORTEX_A78_H_INC	:= 1
14NEOVERSE_N2_H_INC	:= 1
15NEOVERSE_V1_H_INC	:= 1
16CORTEX_A78_AE_H_INC	:= 1
17CORTEX_A710_H_INC	:= 1
18CORTEX_A715_H_INC 	:= 1
19CORTEX_A78C_H_INC	:= 1
20CORTEX_X2_H_INC		:= 1
21$(eval $(call add_define, CORTEX_A78_H_INC))
22$(eval $(call add_define, NEOVERSE_N1_H_INC))
23$(eval $(call add_define, NEOVERSE_N2_H_INC))
24$(eval $(call add_define, NEOVERSE_V1_H_INC))
25$(eval $(call add_define, CORTEX_A78_AE_H_INC))
26$(eval $(call add_define, CORTEX_A710_H_INC))
27$(eval $(call add_define, CORTEX_A715_H_INC))
28$(eval $(call add_define, CORTEX_A78C_H_INC))
29$(eval $(call add_define, CORTEX_X2_H_INC))
30endif
31endif
32