| 69c4bf9a | 08-May-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "tc_refactor_dt_binding" into integration
* changes: refactor(tc): move SCMI nodes into the 'firmware' node refactor(tc): move MHUv2 property to tc2.dts refactor(tc):
Merge changes from topic "tc_refactor_dt_binding" into integration
* changes: refactor(tc): move SCMI nodes into the 'firmware' node refactor(tc): move MHUv2 property to tc2.dts refactor(tc): drop the 'mhu-protocol' property in DT binding refactor(tc): append properties in DT bindings refactor(tc): move SCMI clock DT binding into tc-base.dtsi refactor(tc): introduce a new file tc-fpga.dtsi refactor(tc): move out platform specific DT binding from tc-base.dtsi refactor(tc): move out platform specific code from tc_vers.dtsi refactor(tc): add platform specific DT files refactor(tc): rename 'tc_fvp.dtsi' to 'tc-fvp.dtsi' refactor(tc): introduce a new macro ADDRESSIFY()
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| 4bd1e7bd | 08-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "add_s32g274ardb2_support" into integration
* changes: feat(s32g274a): enable BL31 stage feat(s32g274a): add S32G274ARDB2 board support feat(nxp-drivers): add Linflex
Merge changes from topic "add_s32g274ardb2_support" into integration
* changes: feat(s32g274a): enable BL31 stage feat(s32g274a): add S32G274ARDB2 board support feat(nxp-drivers): add Linflex driver
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| af3e8e63 | 21-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(console): consolidate console runtime switch
Refactor console_flush() and console_switch_state(CONSOLE_FLAG_RUNTIME) to bl31_main(). This has been done per the recommendation in TF-A mailin
refactor(console): consolidate console runtime switch
Refactor console_flush() and console_switch_state(CONSOLE_FLAG_RUNTIME) to bl31_main(). This has been done per the recommendation in TF-A mailing list. These calls need to be the last calls, after any runtime initialization has been done, before BL31 exits.
All platforms that override the generic implementation of bl31_plat_runtime_setup() have been refactored. The console_flush() and console_switch_state() calls have been removed as they become part of bl31_main() function.
Any platform that don't need to make any change to the generic (weak) implementation of bl31_plat_runtime_setup() don't need to override it in their platforms.
Change-Id: I6d04d6daa9353daeaa7e3df9e9adf6f322a917b8 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| 92752355 | 21-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(synquacer): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now w
refactor(synquacer): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now we are mimicking the generic implementation by calling flush and changing the console state to runtime at the end of bl31_plat_runtime_setup() for each platform. This is so that each platform can test it prior to moving flush and switch to bl31_main().
This patch affects the synquacer SoC of the socionext platform.
Change-Id: I85a251e3d9732c5fb5010c3c8bb7323c4f57fa96 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| 3e6fb872 | 21-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(nxp): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now we are
refactor(nxp): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now we are mimicking the generic implementation by calling flush and changing the console state to runtime at the end of bl31_plat_runtime_setup() for each platform. This is so that each platform can test it prior to moving flush and switch to bl31_main().
This patch affects the nxp platform only.
Change-Id: Ic55334a4a69b57f3c18799da12f4f521ce9de423 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| c1fd8f9d | 21-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(nvidia): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now we a
refactor(nvidia): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now we are mimicking the generic implementation by calling flush and changing the console state to runtime at the end of bl31_plat_runtime_setup() for each platform. This is so that each platform can test it prior to moving flush and switch to bl31_main().
This patch affects Nvidia platform only.
Change-Id: I78c148f50e8ee881e1816cab6eeea3765dc469e5 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| d51a6326 | 21-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(hisilicon): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now w
refactor(hisilicon): console runtime switch on bl31 exit
TF-A plans to move the console_flush() and console_switch_state(CONOSLE_FLAG_RUNTIME) calls to bl31_main() just before BL31 exits.
For now we are mimicking the generic implementation by calling flush and changing the console state to runtime at the end of bl31_plat_runtime_setup() for each platform. This is so that each platform can test it prior to moving flush and switch to bl31_main().
This patch affects the Hisilicon SoCs (poplar, hikey, hikey960).
Change-Id: I0cbb0644377f663e880310362abb4308e24f0cef Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| 48932c3c | 19-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(xilinx): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A
refactor(xilinx): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME) and console_flush() calls and make them the last calls in bl31_main() (before BL31 exits). Until then they are being left as the last calls in bl31_plat_runtime_setup() for testing before refactoring.
This patch affects Xilinx SoCs only.
Change-Id: Iea4cf920934bbde4312f40c8c7b3e0f56a316e86 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| 9edf08b1 | 19-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(mediatek): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-
refactor(mediatek): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME) and console_flush() calls and make them the last calls in bl31_main() (before BL31 exits). Until then they are being left as the last calls in bl31_plat_runtime_setup() for testing before refactoring.
This patch affects the Mediatek platform only.
Change-Id: I83beee28ed856bc9b2f3131aa577be9bfa529028 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| 88ab2261 | 19-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(armada): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A
refactor(armada): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME) and console_flush() calls and make them the last calls in bl31_main() (before BL31 exits). Until then they are being left as the last calls in bl31_plat_runtime_setup() for testing before refactoring.
This patch only affects the Armada SoC of Marvell's platform.
Change-Id: I7082fdb8c5507cd1ce5915d67e61e638605982e0 Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| d3c643c2 | 19-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(imx): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A pla
refactor(imx): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME) and console_flush() calls and make them the last calls in bl31_main() (before BL31 exits). Until then they are being left as the last calls in bl31_plat_runtime_setup() for testing before refactoring.
This patch affects the Freescale/NXP SoCs imx93, imx8qm and imx8qx.
Change-Id: Iece74579e1d15eeeb8279db0c53d74bce45545bd Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| 46163ddd | 19-Feb-2024 |
Salman Nabi <salman.nabi@arm.com> |
refactor(brcm): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A pl
refactor(brcm): console runtime switch on bl31 exit
Flush the FIFO before switching to runtime. This is so that there are no lingering chars in the FIFO when we move to the runtime console.
TF-A plans to refactor the console_Switch_state(CONSOLE_FLAG_RUNTIME) and console_flush() calls and make them the last calls in bl31_main() (before BL31 exits). Until then they are being left as the last calls in bl31_plat_runtime_setup() for testing before refactoring.
This patch affects the Broadcom platform only.
Change-Id: I693f749bbf56911638b03e069659e86b95b1050e Signed-off-by: Salman Nabi <salman.nabi@arm.com>
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| dd038061 | 08-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "fix_psci_osi" into integration
* changes: fix(psci): fix parent_idx in psci_validate_state_coordination fix(psci): mask the Last in Level nibble in StateId |
| 655e62aa | 08-May-2024 |
Ronak Jain <ronak.jain@amd.com> |
fix(xilinx): follow MISRA-C standards for condition check
As per the MISRA-C standards, there should be proc == NULL not just !proc.
Fix the same.
Change-Id: I0e7650c09b045882a0235869d7ef9fca27f96
fix(xilinx): follow MISRA-C standards for condition check
As per the MISRA-C standards, there should be proc == NULL not just !proc.
Fix the same.
Change-Id: I0e7650c09b045882a0235869d7ef9fca27f96d9a Signed-off-by: Ronak Jain <ronak.jain@amd.com>
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| 20fa9fc8 | 08-May-2024 |
Ronak Jain <ronak.jain@amd.com> |
fix(zynqmp): resolve null pointer dereferencing
The upstream coverity tool has reported the null pointer dereferences (NULL_RETURNS) warning.
The coverity warning, Dereferencing a pointer that migh
fix(zynqmp): resolve null pointer dereferencing
The upstream coverity tool has reported the null pointer dereferences (NULL_RETURNS) warning.
The coverity warning, Dereferencing a pointer that might be "NULL" "proc" when calling "pm_client_suspend".
Fix the same by checking the NULL before processing further.
Change-Id: I33acead9250bab0ed24b94aa1c1bdc31e80de771 Signed-off-by: Ronak Jain <ronak.jain@amd.com>
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| 2b67ee6d | 08-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "chore: rename hermes to neoverse-n3" into integration |
| 0a9c244b | 29-Jan-2024 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
fix(psci): mask the Last in Level nibble in StateId
In the ARM recommended StateID Encoding, the index for the power level where the calling core is last to go idle use the last niblle of the StateI
fix(psci): mask the Last in Level nibble in StateId
In the ARM recommended StateID Encoding, the index for the power level where the calling core is last to go idle use the last niblle of the StateId.
Even if this nibble is necessary for OS-initiated mode, it can be used by caller even when this OSI mode is not used.
In arm_validate_power_state() function, the StateId is compared with content of arm_pm_idle_states[] build with the arm_make_pwrstate_lvl2 macro, without Last in Level information. So it is safe to mask this nibble for ARM platform in all the cases, and that avoids issues with caller with use the same StateId encoding with OSI mode activated or not (in tftf tests for example, the input(power state) parameter = (0x40001022) and the associated power state is 0x40000022).
Change-Id: I45e8e2b8f526fb61b94cf134d7d4aa3bac4c215d Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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| ee9cfacc | 07-May-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "makefile-cleanup" into integration
* changes: build: improve diagnostics for unrecognized toolchain tools build(rzg): separate BL2 and BL31 SREC generation build(rcar
Merge changes from topic "makefile-cleanup" into integration
* changes: build: improve diagnostics for unrecognized toolchain tools build(rzg): separate BL2 and BL31 SREC generation build(rcar): separate BL2 and BL31 SREC generation build: separate preprocessing from DTB compilation build: remove `MAKE_BUILD_STRINGS` function
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| ba6b6949 | 06-May-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
chore: rename hermes to neoverse-n3
Rename hermes cpu to Neoverse-N3
Change-Id: I912d4c824c5004a8c1909c68fef77f1f5e202b8a Signed-off-by: Govindraj Raja <govindraj.raja@arm.com> |
| 531d923b | 07-May-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(tc): enable FEAT_MTE2" into integration |
| 2a0ca84f | 07-May-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "sm/feat_detect" into integration
* changes: refactor(cpufeat): restore functions in detect_arch_features refactor(cpufeat): add macro to simplify is_feat_xx_present c
Merge changes from topic "sm/feat_detect" into integration
* changes: refactor(cpufeat): restore functions in detect_arch_features refactor(cpufeat): add macro to simplify is_feat_xx_present chore: simplify the macro names in ENABLE_FEAT mechanism
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| f7679d43 | 15-Apr-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(smccc): move pmf to vendor el3 calls
Move pmf support to vendor-specific EL3 Monitor Service Calls. Remove pmf call count as it's not supported in vendor-specific el3 as per SMCCC Documenta
refactor(smccc): move pmf to vendor el3 calls
Move pmf support to vendor-specific EL3 Monitor Service Calls. Remove pmf call count as it's not supported in vendor-specific el3 as per SMCCC Documentation 1.5: https://developer.arm.com/documentation/den0028/latest
Add a deprecation notice to inform PMF is moved from arm-sip range to vendor-specific EL3 range. PMF support from arm-sip range will be removed and will not available after TF-A 2.12 release.
Change-Id: Ie1e14aa601d4fc3db352cd5621d842017a18e9ec Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 273b8983 | 07-Mar-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subrange
refactor(smccc): move debugfs to vendor el3 calls
Move debugfs to Vendor-Specific EL3 Monitor Service Calls. Function Identifier for Vendor-Specific EL3 Monitor Service is '7' and allocated subranges of Function identifiers to different services are:
0x87000000-0x8700FFFF-SMC32: Vendor-Specific EL3 Monitor Service Calls 0xC7000000-0xC700FFFF-SMC64: Vendor-Specific EL3 Monitor Service Calls
Amend Debugfs FID's to use this range and id.
Add a deprecation notice to inform debugfs moved from arm-sip range to Vendor-Specific EL3 range. Debugfs support from arm-sip range will be removed and will not be available after TF-A 2.12 release.
Reference to debugfs component level documentation: https://trustedfirmware-a.readthedocs.io/en/latest/components/debugfs-design.html#overview
Change-Id: I97a50170178f361f70c95ed0049bc4e278de59d7 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| 5af143f2 | 03-May-2024 |
Govindraj Raja <govindraj.raja@arm.com> |
refactor(fvp): move cpus with nomodel
Move CPUs which are not tested in CI under a new build option. We have added some CPUs for which there is no FVP models available yet to test. Move those CPUs u
refactor(fvp): move cpus with nomodel
Move CPUs which are not tested in CI under a new build option. We have added some CPUs for which there is no FVP models available yet to test. Move those CPUs under a new FVP build option.
Change-Id: I3da12d2f8d9c246b435b31adfac61c79dc1ab0cb Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
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| af58f6d4 | 03-May-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "build(fvp): make all builds unconditional" into integration |