| a542b9c1 | 07-Mar-2024 |
Prasad Kummari <prasad.kummari@amd.com> |
chore(xilinx): rename console variables
Updates variable names to follow a more consistent and descriptive naming.
These changes improve code readability and maintainability, making the codebase mo
chore(xilinx): rename console variables
Updates variable names to follow a more consistent and descriptive naming.
These changes improve code readability and maintainability, making the codebase more understandable and maintainable for future development.
Change-Id: I3fff8fe371f9d4d3489ffe62cbf721381403fef5 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| 00a68427 | 07-Mar-2024 |
Prasad Kummari <prasad.kummari@amd.com> |
chore(xilinx): rename runtime console to DT console
Renames the runtime_console_init() function to dt_console_init() for better naming clarity.
Change-Id: I7f6d80ce23307d57e09c613be48482d49d6ad45b
chore(xilinx): rename runtime console to DT console
Renames the runtime_console_init() function to dt_console_init() for better naming clarity.
Change-Id: I7f6d80ce23307d57e09c613be48482d49d6ad45b Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| 569a03c7 | 07-May-2024 |
Jit Loon Lim <jit.loon.lim@intel.com> |
fix(intel): update mailbox SDM printout message
The printout message is misleading. Update the message content and mask out the return code.
Change-Id: I08acb73894f8504b2773a19dbb10b42a65fcda5d Sig
fix(intel): update mailbox SDM printout message
The printout message is misleading. Update the message content and mask out the return code.
Change-Id: I08acb73894f8504b2773a19dbb10b42a65fcda5d Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
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| 5d38dc09 | 02-Oct-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(intel): update CCU configuration for Agilex5 platform" into integration |
| 87cd847c | 24-Nov-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(st): add stm32mp_is_wakeup_from_standby()
This function is used to know if this is a return from Standby mode, and the DDR was in self-refresh, allowing a correct return to OS. They just return
feat(st): add stm32mp_is_wakeup_from_standby()
This function is used to know if this is a return from Standby mode, and the DDR was in self-refresh, allowing a correct return to OS. They just return false for the moment.
Change-Id: Ie7de9a9f6477f8158e144f6626070a77fdc53ceb Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| 52f530d3 | 19-Sep-2024 |
Maxime Méré <maxime.mere@foss.st.com> |
feat(stm32mp2): add RETRAM map/unmap capability
Add RETRAM base address and size definition at platform level. RETRAM is used by the DDR driver to store retention registers (DDR training results) in
feat(stm32mp2): add RETRAM map/unmap capability
Add RETRAM base address and size definition at platform level. RETRAM is used by the DDR driver to store retention registers (DDR training results) in order to restore them in standby exit sequence. Add map/unmap services at platform level and configure dedicated RISAB5.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I460b36fccce62e83c1fbff298f96b23530aaa4f3
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| 2fd7b230 | 21-Sep-2021 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp2): add helper to get DDRDBG base address
Add a function to get DDRDBG peripheral IO memory base address.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I20d14fca4
feat(stm32mp2): add helper to get DDRDBG base address
Add a function to get DDRDBG peripheral IO memory base address.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I20d14fca49528c296c1f7d49a66129d932f44e49
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| e2d6e5e2 | 18-Jan-2023 |
Pascal Paillet <p.paillet@st.com> |
feat(stm32mp2): handle DDR power supplies
Modify platform driver to handle the DDR power supplies when a PMIC is present.
Signed-off-by: Pascal Paillet <p.paillet@st.com> Change-Id: I98df132a63c2ad
feat(stm32mp2): handle DDR power supplies
Modify platform driver to handle the DDR power supplies when a PMIC is present.
Signed-off-by: Pascal Paillet <p.paillet@st.com> Change-Id: I98df132a63c2ad351d4dae949f5dbb831cc40637
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| 47e62314 | 16-Feb-2023 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
feat(stm32mp1): handle DDR power supplies
Modify the DDR driver to handle the DDR power supplies when a PMIC is present in the function stm32mp_board_ddr_power_init(), define in the platform file.
feat(stm32mp1): handle DDR power supplies
Modify the DDR driver to handle the DDR power supplies when a PMIC is present in the function stm32mp_board_ddr_power_init(), define in the platform file.
This patch allows to easily modify the used DDR power supplies for customer boards, when they don't use STPMIC1 PMU or when the regulators are not connected as on the STMicroelectronics boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Change-Id: I93ee6295ef7032ac20f03608d22cd460f7d87ef5
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| cc3d73cc | 01-Oct-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes I1df23bfa,Ibc85e30c into integration
* changes: fix(st): support device tree DDR sizes higher than 16Gbits for aarch64 feat(fdt-wrappers): add function to read uint64 with default
Merge changes I1df23bfa,Ibc85e30c into integration
* changes: fix(st): support device tree DDR sizes higher than 16Gbits for aarch64 feat(fdt-wrappers): add function to read uint64 with default value
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| 26467bf3 | 01-Oct-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "rd1ae-upstream" into integration
* changes: docs(rd1ae): add RD-1 AE documentation feat(rd1ae): enabling Trusted Board Boot(TBB) for RD-1 AE feat(rd1ae): introduce BL
Merge changes from topic "rd1ae-upstream" into integration
* changes: docs(rd1ae): add RD-1 AE documentation feat(rd1ae): enabling Trusted Board Boot(TBB) for RD-1 AE feat(rd1ae): introduce BL31 for RD-1 AE platform feat(rd1ae): add device tree files feat(rd1ae): introduce Arm RD-1 AE platform build(bl2): enable check for bl2 base overflow assert feat(arm): add support for loading CONFIG from BL2
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| 851df3c8 | 01-Oct-2024 |
Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com> |
fix(versal2): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-I
fix(versal2): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id: Iee222595962273913a570786ff1df5dc3ad328df Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| 06f63f4b | 26-Sep-2024 |
Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com> |
fix(versal-net): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Chang
fix(versal-net): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id: I20ef3be35f88649979d577ec8be4357813d4c1b7 Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| ab9aab38 | 26-Sep-2024 |
Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com> |
fix(versal): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id
fix(versal): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id: If3507f812ed4cfa518e6f5c5de977a76713fafd8 Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| d3bb350c | 26-Sep-2024 |
Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com> |
fix(xilinx): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id
fix(xilinx): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id: I1d369d977e0f2749024736d53fbb5c7d5555f6cb Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| 1c43e36a | 18-Apr-2024 |
Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com> |
fix(zynqmp): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id
fix(zynqmp): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id: I435dbcbe1c4aad7c69eb49599cd0dbca0677150d Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| ba790730 | 30-Sep-2024 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "build: make Poetry optional" into integration |
| bccc2275 | 27-Sep-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "nxp-s32g274a/err051700" into integration
* changes: feat(s32g274a): enable workaround for ERR051700 fix(s32g274a): workaround for ERR051700 erratum |
| 26384969 | 29-Jul-2024 |
Divin Raj <divin.raj@arm.com> |
feat(rd1ae): enabling Trusted Board Boot(TBB) for RD-1 AE
In this commit, Trusted Board Boot has been enabled for the RD-1 AE platform, and the non-volatile counter remains at the default values sin
feat(rd1ae): enabling Trusted Board Boot(TBB) for RD-1 AE
In this commit, Trusted Board Boot has been enabled for the RD-1 AE platform, and the non-volatile counter remains at the default values since the non-volatile counter is read-only for Arm development platforms.
Signed-off-by: Divin Raj <divin.raj@arm.com> Change-Id: I2e1072101e56da0e474d2a3e9802e5d65a77fd55
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| daf934ca | 20-Feb-2023 |
Peter Hoyes <Peter.Hoyes@arm.com> |
feat(rd1ae): introduce BL31 for RD-1 AE platform
This commit introduces BL31 to the RD-1 AE platform. The RD-1 AE platform incorporates an SCP for CPU power control.
Additinaly introducing the memo
feat(rd1ae): introduce BL31 for RD-1 AE platform
This commit introduces BL31 to the RD-1 AE platform. The RD-1 AE platform incorporates an SCP for CPU power control.
Additinaly introducing the memory descriptor provides BL image information that gets used by BL2 to load the images
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Signed-off-by: Divin Raj <divin.raj@arm.com> Change-Id: I035cbfd09f254aa47483ad35676f1cb3ffb661bd
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| bb7c7e71 | 04-Apr-2024 |
Divin Raj <divin.raj@arm.com> |
feat(rd1ae): add device tree files
This commit Add FW_CONFIG and HW_CONFIG device trees
Signed-off-by: Divin Raj <divin.raj@arm.com> Change-Id: Ia6cbf06def8ec9b74ef9040bab801278a3117899 |
| f661c74b | 20-Feb-2023 |
Peter Hoyes <Peter.Hoyes@arm.com> |
feat(rd1ae): introduce Arm RD-1 AE platform
Create a new platform for the RD-1 AE automotive FVP. This platform contains: * Neoverse-V3AE, Arm9.2-A application processor * A GICv4-compatible GIC-7
feat(rd1ae): introduce Arm RD-1 AE platform
Create a new platform for the RD-1 AE automotive FVP. This platform contains: * Neoverse-V3AE, Arm9.2-A application processor * A GICv4-compatible GIC-720AE * 128 MB of SRAM, of which 1 MB is reserved for TF-A
and BL2 runs at ELmax (EL3).
Additionally, this commit updates the maintainers.rst file and the changelog.yaml to add scope for RD-1 AE variants.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Signed-off-by: Divin Raj <divin.raj@arm.com> Signed-off-by: Rahul Singh <rahul.singh@arm.com> Change-Id: I9ae64b3f05a52653ebd1d334b15b7f21821264e2
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| 8d5c7627 | 16-Apr-2024 |
Divin Raj <divin.raj@arm.com> |
build(bl2): enable check for bl2 base overflow assert
Currently, the BL2 base overflow check asserts for all cases, but this check is only necessary if not reset to BL2 case. Therefore, adding a con
build(bl2): enable check for bl2 base overflow assert
Currently, the BL2 base overflow check asserts for all cases, but this check is only necessary if not reset to BL2 case. Therefore, adding a condition for this check.
Signed-off-by: Divin Raj <divin.raj@arm.com> Change-Id: Ia129921d76bcd32058ea0767db0319e6724be8ab
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| 973e0b7f | 04-Apr-2024 |
Divin Raj <divin.raj@arm.com> |
feat(arm): add support for loading CONFIG from BL2
This commit introduces a new ARM platform-specific build option called `ARM_FW_CONFIG_LOAD_ENABLE`. This option enables the loading of the `fw_conf
feat(arm): add support for loading CONFIG from BL2
This commit introduces a new ARM platform-specific build option called `ARM_FW_CONFIG_LOAD_ENABLE`. This option enables the loading of the `fw_config` device tree when resetting to the BL2 scenario.
Additionally, the FW_CONFIG image reference has been added to the fdts/tbbr_cot_descriptors.dtsi file in order to use in the scenario of RESET_TO_BL2.
Signed-off-by: Divin Raj <divin.raj@arm.com> Change-Id: I11de497b7dbb1386ed84d939d6fd2a11856e9e1b
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| bcce173d | 26-Sep-2024 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "rd-v3-reset-to-bl31" into integration
* changes: feat(neoverse-rd): allow RESET_TO_BL31 for third gen platforms feat(arm): setup GPT in BL31 in RESET_TO_BL31 boot flow
Merge changes from topic "rd-v3-reset-to-bl31" into integration
* changes: feat(neoverse-rd): allow RESET_TO_BL31 for third gen platforms feat(arm): setup GPT in BL31 in RESET_TO_BL31 boot flow feat(neoverse-rd): enable RESET_TO_BL31 for RD-V3 feat(neoverse-rd): add a routine to update NT_FW_CONFIG in BL31
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