Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-

Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal2): typecast expressions to match data type
fix(versal-net): typecast expressions to match data type
fix(versal): typecast expressions to match data type
fix(xilinx): typecast expressions to match data type
fix(zynqmp): typecast expressions to match data type
fix(zynqmp): align essential type categories
fix(zynqmp): typecast expression to match data type
fix(xilinx): typecast expression to match data type

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fix(zynqmp): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic conversions
are performed shall have the

fix(zynqmp): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic conversions
are performed shall have the same essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I847af07f5e4f139384c1ed50bee765b892a6e9cd
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console t

Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console to platform.mk
feat(versal-net): dedicate console for boot and runtime
feat(versal): add DTB console to platform.mk
feat(versal): dedicate console for boot and runtime
refactor(xilinx): register runtime console directly
refactor(xilinx): console registration through console holder structure
feat(zynqmp): add DTB console to platform.mk
feat(zynqmp): dedicate console for boot and runtime
fix(xilinx): dcc to support runtime console scope
refactor(xilinx): create generic function for DT console
refactor(xilinx): rename setup_runtime_console to generic
chore(xilinx): rename console variables
chore(xilinx): rename runtime console to DT console

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feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: M

feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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refactor(xilinx): console registration through console holder structure

Refactored register_console using console holder structure as
input. Structure holds console scope and console type as additio

refactor(xilinx): console registration through console holder structure

Refactored register_console using console holder structure as
input. Structure holds console scope and console type as additional
members. These modifications enhance code readability and
maintainability, contributing to a clearer and more sustainable
codebase for future development.

Change-Id: I7fcc1accfdecdacc205d427a80031536c456638e
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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feat(zynqmp): add DTB console to platform.mk

In the platform.mk file, new console types named dtb are to be created
a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console.
Users will

feat(zynqmp): add DTB console to platform.mk

In the platform.mk file, new console types named dtb are to be created
a macro, ZYNQMP_CONSOLE_ID_dtb, will be introduced to check DT console.
Users will have the option to select ZYNQMP_CONSOLE to dtb, which will
run from the DDR address. The address XILINX_OF_BOARD_DTB_ADDR needs
to be provided. This configuration will register the DT console in TF-A.
Flags for the ZynqMP platform and other AMD-Xilinx platforms will be
updated to utilize common code.

Change-Id: If74da4a80196575335c9d5562e6d8cd12d99561c
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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feat(zynqmp): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and

feat(zynqmp): dedicate console for boot and runtime

Introduce a build-time parameter (CONSOLE_RUNTIME) to select
separate runtime console options. For boot-time console, remove
the runtime flag and add a boot/crash flag. Additionally,
introduce an RT_CONSOLE_IS macro to check different UART types.

Implement a common function, console_runtime_init(), to initialize
the runtime console. Ensure that all platforms have access to
this feature.

The current implementation utilizes a single console for boot,
crash, and runtime. Make sure that the dedicated console integrates
into runtime and crash scenarios.

Change-Id: I32913dede3d87109e54d179e7d99f45c33b9097b
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge "feat(zynqmp): remove pm_ioctl_set_sgmii_mode api" into integration

feat(zynqmp): remove pm_ioctl_set_sgmii_mode api

There are no existing users of pm_ioctl_set_sgmii_mode() API so
cleanup the dead code.

Change-Id: I1088d2f5c944bf54fc5fdd554360bdd321ad798a
Signed-o

feat(zynqmp): remove pm_ioctl_set_sgmii_mode api

There are no existing users of pm_ioctl_set_sgmii_mode() API so
cleanup the dead code.

Change-Id: I1088d2f5c944bf54fc5fdd554360bdd321ad798a
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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Merge changes from topic "xilinx-console-sync" into integration

* changes:
fix(xilinx): remove console error message
feat(xilinx): sync macro names
feat(xilinx): remove crash console unused ma

Merge changes from topic "xilinx-console-sync" into integration

* changes:
fix(xilinx): remove console error message
feat(xilinx): sync macro names
feat(xilinx): remove crash console unused macros

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feat(xilinx): sync macro names

There is no reason to have platform specific macros where generic
macros can be used. This is pretty much preparation step for moving
console code to single location w

feat(xilinx): sync macro names

There is no reason to have platform specific macros where generic
macros can be used. This is pretty much preparation step for moving
console code to single location where multiple combinations can be
easier to handle.

Change-Id: I4d85ddef29f5870a9ea9590d4d1564469c6eb87e
Signed-off-by: Michal Simek <michal.simek@amd.com>

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feat(xilinx): remove crash console unused macros

Macros are not used that's why remove them.

Change-Id: I4519ea0b9e30b757ab8a6ee3bb56af45dddc0d96
Signed-off-by: Michal Simek <michal.simek@amd.com>

Merge "fix(zynqmp): handling of type el3 interrrupts" into integration

fix(zynqmp): handling of type el3 interrrupts

The array type_el3_interrupt_table is defined for MAX_INTR_EL3(128)
elements and only two interrupts - ARM_IRQ_SEC_SGI_7(15), IRQ_TTC3_1(77)
are being h

fix(zynqmp): handling of type el3 interrrupts

The array type_el3_interrupt_table is defined for MAX_INTR_EL3(128)
elements and only two interrupts - ARM_IRQ_SEC_SGI_7(15), IRQ_TTC3_1(77)
are being handled. Current implementation is consuming 1024 bytes which
can be optimized for the number of interrupts to be handled.
The current array is replaced with the array of struct
zynmp_intr_info_type_el3_t (id and handler as member) and with
maximum number of interrupts to be handled as the size of array
(MAX_INTR_EL3 = 2). User is expected to adjust MAX_INTR_EL3 based on
how many interrupts are handled in TF-A.
With the updated implementation, a reduction of 960 bytes is observed.
Versal and Versal NET are using similar implementation introduced by
commit e497421d7f1e ("feat(versal): add infrastructure to handle
multiple interrupts") and commit 0654ab7f7544 ("feat(versal-net): add
support for platform management").

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I07aa388d38ac3ff3c0d25decbe0719087b27ee18

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Merge "style(xilinx): replace ARM by Arm in copyrights" into integration

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.

Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "xilinx-misc-changes" into integration

* changes:
chore(zynqmp): fix comment style in zynqmp_def.h
chore(versal): add missing dot at the end of sentence
fix(zynqmp): r

Merge changes from topic "xilinx-misc-changes" into integration

* changes:
chore(zynqmp): fix comment style in zynqmp_def.h
chore(versal): add missing dot at the end of sentence
fix(zynqmp): remove additional 0x in %p print
fix(versal): fix Misra-C violations in bl31_setup and pm_svc_main

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chore(zynqmp): fix comment style in zynqmp_def.h

Add missing space in one line comment to follow common coding style.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: Idebf8f34bf48444e

chore(zynqmp): fix comment style in zynqmp_def.h

Add missing space in one line comment to follow common coding style.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: Idebf8f34bf48444ee20a68ac3e6fd7f5a41bf8b0

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Merge "feat(zynqmp): resolve the misra 10.1 warnings" into integration

feat(zynqmp): resolve the misra 10.1 warnings

MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The op

feat(zynqmp): resolve the misra 10.1 warnings

MISRA Violation: MISRA-C:2012 R.10.1
1) The expression of non-boolean essential type is being interpreted as a
boolean value for the operator.
2) The operand to the operator does not have an essentially unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I97bbc056f4fee167742429e144144ba793bf77b3

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Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 wa

Merge changes from topic "xlnx_zynqmp_misra" into integration

* changes:
fix(zynqmp): resolve misra R14.4 warnings
fix(zynqmp): resolve misra R16.3 warnings
fix(zynqmp): resolve misra R15.7 warnings
fix(zynqmp): resolve misra R15.6 warnings
fix(zynqmp): resolve misra 7.2 warnings
fix(zynqmp): resolve misra R10.3

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fix(zynqmp): resolve misra 7.2 warnings

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.

Signed-off-by:

fix(zynqmp): resolve misra 7.2 warnings

MISRA Violation: MISRA-C:2012 R.7.2
- A "u" or "U" suffix shall be applied to all integer constants that are
represented in an unsigned type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ieeff81ed42155c03aebca75b2f33f311279b9ed4

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Merge "plat: xilinx: zynqmp: Configure counter frequency during initialization" into integration

plat: xilinx: zynqmp: Configure counter frequency during initialization

Counter frequency for generic timer of Arm-A53 based Application
Processing Unit(APU) is not configuring in case if First Stag

plat: xilinx: zynqmp: Configure counter frequency during initialization

Counter frequency for generic timer of Arm-A53 based Application
Processing Unit(APU) is not configuring in case if First Stage Boot
Loader(FSBL) does not initialize counter frequency. This happens
when FSBL is running from Arm-R5 based Real-time Processing Unit(RPU).
Because of that generic timer driver functionality is not working.
So configure counter frequency during initialization.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Icfccd59d7d2340fba25ebfb2ef6a813af4290896

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Merge "zynqmp: pm: Add support for PS and system reset on WDT restart" into integration