| 0ec6c313 | 23-Dec-2022 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
feat(versal): replace irq array with switch case
Replaced array of interrupt to PM node index map with switch-case for Versal. As a result, the size of code got reduced by 527 bytes. In case of erro
feat(versal): replace irq array with switch case
Replaced array of interrupt to PM node index map with switch-case for Versal. As a result, the size of code got reduced by 527 bytes. In case of error return invalid node index i.e. XPM_NODEIDX_DEV_MIN.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Ifb17366362e2d1757d8933e1ce29083f7ad86b8f
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| 31b68489 | 28-Feb-2023 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
refactor(xilinx): rename gic macros to make common
Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE, PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to PLAT_GICD_BASE_VALUE and PLA
refactor(xilinx): rename gic macros to make common
Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE, PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to PLAT_GICD_BASE_VALUE and PLAT_GICR_BASE_VALUE to make common for both Versal and Versal NET platforms.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: Ibcebfb8e741e828ef272b32cbedfb4dcbf8629b6
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| 6173d914 | 07-Mar-2023 |
Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com> |
fix(xilinx): handle CRC failure in IPI callback
Currently, if CRC validation fails during IPI communication, pm_ipi_buff_read_callb() logs error message but don't return error code to upper layers.
fix(xilinx): handle CRC failure in IPI callback
Currently, if CRC validation fails during IPI communication, pm_ipi_buff_read_callb() logs error message but don't return error code to upper layers.
Added CRC failure specific error code which will be returned by pm_ipi_buff_read_callb() if CRC validation fails.
Signed-off-by: Naman Trivedi Manojbhai <naman.trivedimanojbhai@amd.com> Change-Id: I2eaca073e2bf325a8c86b1820bdd7cca487b783e
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| cd73d62b | 16-Nov-2022 |
Naman Patel <naman.patel@amd.com> |
fix(versal): initialize the variable with value 0 in pm code
Remove zeromem function as the array is already initialized with value 0.
MISRA Violation: MISRA C-2012 Rule 9.1 - Initialize the array/
fix(versal): initialize the variable with value 0 in pm code
Remove zeromem function as the array is already initialized with value 0.
MISRA Violation: MISRA C-2012 Rule 9.1 - Initialize the array/variable with a value 0 to resolve the misra warnings in pm_service component.
Signed-off-by: Naman Patel <naman.patel@amd.com> Change-Id: I1a3d44a7ae4088a3034eb0119d82b99cd4617ccd
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| 04cc91b4 | 13-Sep-2022 |
Tanmay Shah <tanmay.shah@amd.com> |
fix(versal): route GIC IPI interrupts during setup
If primary core is down, then IPI interrupt should be routed to another core for processing.
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Chan
fix(versal): route GIC IPI interrupts during setup
If primary core is down, then IPI interrupt should be routed to another core for processing.
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Change-Id: I01d7c4232a18c0c3b3f3f9ddadfa6ff5bd2f2471
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