| 54007c37 | 05-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
Add a security check to enforce the usage of TRUSTED_BOARD_BOOT
on closed device. It will guarantee the secure bootchain.
Change-I
feat(stm32mp1): add a check on TRUSTED_BOARD_BOOT with secure chip
Add a security check to enforce the usage of TRUSTED_BOARD_BOOT
on closed device. It will guarantee the secure bootchain.
Change-Id: Id6120d0e5041e8f2d3866e5710876ec96b6d0216
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| cd791164 | 05-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1): add the decryption support
Add the decryption support for STM32MP1 binaries.
Decryption is limited to the BL32 loaded images.
Limitation: STM32MP15 doesn't support the feature.
Cha
feat(stm32mp1): add the decryption support
Add the decryption support for STM32MP1 binaries.
Decryption is limited to the BL32 loaded images.
Limitation: STM32MP15 doesn't support the feature.
Change-Id: I96800bac7b22109f8471eb2953fc0dc269fc4fd1
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| beb625f9 | 05-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
Add the support of the TRUSTED_BOARD_BOOT to authenticate the loaded
FIP using platform CoT management.
It adds TBB platform definition, redefining
feat(stm32mp1): add the TRUSTED_BOARD_BOOT support
Add the support of the TRUSTED_BOARD_BOOT to authenticate the loaded
FIP using platform CoT management.
It adds TBB platform definition, redefining the standard image ID in
order to decrease requested size in BL2 binary.
Authentication will use mbedTLS library for parsing certificate
configured with a platform configuration.
Change-Id: I9da66b915c5e9e9293fccfce92bef2434da1e430
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| 89c07747 | 05-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1): update ROM code API for header v2 management
Add the new definition field for authentication used in header V2
on STM32MP13.
Change-Id: Id8f0c2584ca9b74b0d21d82c9a98d286500548c4
Sig
feat(stm32mp1): update ROM code API for header v2 management
Add the new definition field for authentication used in header V2
on STM32MP13.
Change-Id: Id8f0c2584ca9b74b0d21d82c9a98d286500548c4
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| f30034a2 | 05-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1): remove unused function from boot API
Remove old library access from ROM library that is no more
used.
Change-Id: I9b91f1efd6ff9d311b69ca36f60474f01268c221
Signed-off-by: Lionel Debi
feat(stm32mp1): remove unused function from boot API
Remove old library access from ROM library that is no more
used.
Change-Id: I9b91f1efd6ff9d311b69ca36f60474f01268c221
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| 87dfbd71 | 05-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
refactor(stm32mp1): remove authentication using STM32 image mode
Remove deprecated authentication mode to use the FIP authentication
based on TBBR requirements. It will use the new crypto library.
refactor(stm32mp1): remove authentication using STM32 image mode
Remove deprecated authentication mode to use the FIP authentication
based on TBBR requirements. It will use the new crypto library.
Change-Id: I95c7baa64ba42c370ae136f59781f2a7a4c7f507
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| 27423744 | 02-Dec-2020 |
Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> |
feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
Initialize RNG driver at platform level for STM32MP13.
Change-Id: I64832de43e5f6559a12e26680142db54c88f0b9e
Signed-off-by: Nicolas Le Bay
feat(stm32mp1): add RNG initialization in BL2 for STM32MP13
Initialize RNG driver at platform level for STM32MP13.
Change-Id: I64832de43e5f6559a12e26680142db54c88f0b9e
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
show more ...
|
| ad3e46a3 | 05-Oct-2022 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1): add a stm32mp crypto library
Add the crypto library for STM32MP1 to use STM32 hardware
accelerators.
Change-Id: I0bbb941001242a6fdc47514ab3efe07b12249285
Signed-off-by: Nicolas Toro
feat(stm32mp1): add a stm32mp crypto library
Add the crypto library for STM32MP1 to use STM32 hardware
accelerators.
Change-Id: I0bbb941001242a6fdc47514ab3efe07b12249285
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| 68039f2d | 22-Dec-2020 |
Nicolas Toromanoff <nicolas.toromanoff@st.com> |
feat(st-crypto): update HASH for new hardware version used in STM32MP13
Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_
feat(st-crypto): update HASH for new hardware version used in STM32MP13
Introduce new flag to manage hardware version.
STM32MP15 currently uses the HASH_V2 and STM32MP13 uses the HASH_V4.
For STM32_HASH_V4: remove MD5 algorithm (no more supported) and
add SHA384 and SHA512.
For STM32_HASH_V2: no change.
Change-Id: I3a9ae9e38249a2421c657232cb0877004d04dae1
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
show more ...
|
| 04238683 | 29-Aug-2019 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add plat_report_*_abort functions
The new helpers are created in STM32MP1 platform for prefetch and data
aborts.
While at it, put plat_report_exception() under DEBUG flag. If DEBUG i
feat(stm32mp1): add plat_report_*_abort functions
The new helpers are created in STM32MP1 platform for prefetch and data
aborts.
While at it, put plat_report_exception() under DEBUG flag. If DEBUG is
not set, the weak function which does the same will be used.
This plat_report_exception() function can also be simplified, as it will
no more be used to report aborts.
Change-Id: Ibe989b28e236693f317cffb0545ea0611b7bdde4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
show more ...
|
| e8f4ec1a | 03-Oct-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_uart_updates" into integration
* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFI
Merge changes from topic "st_uart_updates" into integration
* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE
docs(st): introduce STM32MP_RECONFIGURE_CONSOLE
feat(st): add trace for early console
fix(stm32mp1): enable crash console in FIQ handler
feat(st-uart): add initialization with the device tree
refactor(stm32mp1): move DT_UART_COMPAT in include file
feat(stm32mp1): configure the serial boot load address
fix(stm32mp1): update the FIP load address for serial boot
refactor(st): configure baudrate for UART programmer
refactor(st-uart): compute the over sampling dynamically
show more ...
|
| 0d33d383 | 03-Oct-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st): add missing string.h include
Since patch on libc refactoring, there is a compilation error with
STM32MP_USB_PROGRAMMER=1:
plat/st/common/stm32cubeprogrammer_usb.c:81:35: error:
implicit de
fix(st): add missing string.h include
Since patch on libc refactoring, there is a compilation error with
STM32MP_USB_PROGRAMMER=1:
plat/st/common/stm32cubeprogrammer_usb.c:81:35: error:
implicit declaration of function 'strnlen'
[-Werror=implicit-function-declaration]
length += strnlen((char *)&dfu->buffer[GET_PHASE_LEN],
The string.h header file should be included.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I1fbb2d9714cbc0d0640cb5e3c5ae8201dbfbe14e
show more ...
|
| 14a07040 | 15-Oct-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(stm32mp1): add early console in SP_min
Allow early console to be used at the beginning of SP_min, before
the clocks and UART have been reconfigured.
Signed-off-by: Yann Gautier <yann.gautier@f
feat(stm32mp1): add early console in SP_min
Allow early console to be used at the beginning of SP_min, before
the clocks and UART have been reconfigured.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I53d66938d42fcec830d9b81e5ef62b3790d0c3b3
show more ...
|
| 5223d880 | 13-Sep-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st): properly manage early console
The new flag STM32MP_RECONFIGURE_CONSOLE is managed in platform.mk.
It is used in stm32mp_setup_early_console() when calling
plat_crash_console_init(). This c
feat(st): properly manage early console
The new flag STM32MP_RECONFIGURE_CONSOLE is managed in platform.mk.
It is used in stm32mp_setup_early_console() when calling
plat_crash_console_init(). This call is also under:
"#if defined(IMAGE_BL2)"
as this crash console init shouldn't be done by default in BL32.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib6b89db83d80095b662a2016e18ceb3fa8668435
show more ...
|
| 00606df0 | 09-Jun-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st): add trace for early console
When the early console is configured with STM32MP_EARLY_CONSOLE,
display a message indicating it is enabled.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.
feat(st): add trace for early console
When the early console is configured with STM32MP_EARLY_CONSOLE,
display a message indicating it is enabled.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Iafdfa5afef27eba823d707841853a8a46de0b42d
show more ...
|
| 484e846a | 07-Mar-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp1): enable crash console in FIQ handler
When a FIQ occurs and is trapped by SP_min, it is an unrecoverable
error. As kernel may have switched the UART console off, we should
re-enable it
fix(stm32mp1): enable crash console in FIQ handler
When a FIQ occurs and is trapped by SP_min, it is an unrecoverable
error. As kernel may have switched the UART console off, we should
re-enable it with plat_crash_console_init() for those failing states.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ib02e1271b6213f8e383a062b74494abf8826188f
show more ...
|
| 7d197d62 | 14-Apr-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(stm32mp1): move DT_UART_COMPAT in include file
Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.
Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Sig
refactor(stm32mp1): move DT_UART_COMPAT in include file
Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.
Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
show more ...
|
| 4b2f23e5 | 15-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
feat(stm32mp1): configure the serial boot load address
For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it ove
feat(stm32mp1): configure the serial boot load address
For product with 128MB DDR size, the OP-TEE is located at the end
of the DDR and the FIP can't be loaded at the default location
because it overlap the OP-TEE final location. So the default value
for DWL_BUFFER_BASE is invalid.
To avoid this conflict the serial boot load address = DWL_BUFFER_BASE
can be modified with a configuration flags.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ie27b87c10c57fea5d4c6200ce4f624e775b9a080
show more ...
|
| 32f2ca04 | 28-Feb-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
fix(stm32mp1): update the FIP load address for serial boot
Update the FIP load address and size for serial boot to support
product with a DDR size = 128MB
1/ Move the FIP location at the end of the
fix(stm32mp1): update the FIP load address for serial boot
Update the FIP load address and size for serial boot to support
product with a DDR size = 128MB
1/ Move the FIP location at the end of the first 128MB
2/ Reduce the DWL_BUFFER_SIZE to 16MB, to be coherent with the value
indicated in USB enumeration
- for STM32MP13x: "@SSBL /0x03/1*16Me"
- for STM32MP15x: "@Partition3 /0x03/1*16Me"
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Id93bf00c64832c17426bfd78e060861275677ecc
show more ...
|
| e7705e9a | 02-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(st): configure baudrate for UART programmer
Add the possibility to configure the UART baudrate; reused the
console configuration, defined in STM32MP_UART_BAUDRATE.
The default value remain
refactor(st): configure baudrate for UART programmer
Add the possibility to configure the UART baudrate; reused the
console configuration, defined in STM32MP_UART_BAUDRATE.
The default value remains 115200.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ifcf2b36e8ac929265405bc88e824ee78be3b5bbb
show more ...
|
| 12581895 | 02-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(st-uart): compute the over sampling dynamically
The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and t
refactor(st-uart): compute the over sampling dynamically
The parameter over_sampling of stm32_uart_init_s is not required
as it can be computed dynamically from clock rate of the serial
device and the requested baudrate.
Oversampling by 8 is allowed only for higher speed
(up to clock_rate / 8) to reduce the maximum receiver tolerance
to clock deviation.
This patch update the driver, the serial init struct and the
only user, the stm32cubeprogrammer over uart support.
Change-Id: I422731089730a288defeb7fa49886db65d0902b2
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
show more ...
|
| dcb31ff7 | 08-Sep-2021 |
Florian Lugou <florian.lugou@provenrun.com> |
feat(gic): add APIs to raise NS and S-EL1 SGIs
This patch adds two helper functions:
- plat_ic_raise_ns_sgi to raise a NS SGI
- plat_ic_raise_s_el1_sgi to raise a S-EL1 SGI
Signed-off-by: Florian
feat(gic): add APIs to raise NS and S-EL1 SGIs
This patch adds two helper functions:
- plat_ic_raise_ns_sgi to raise a NS SGI
- plat_ic_raise_s_el1_sgi to raise a S-EL1 SGI
Signed-off-by: Florian Lugou <florian.lugou@provenrun.com>
Change-Id: I6f262dd1da1d77fec3f850eb74189e726b8e24da
show more ...
|
| e7cb4a86 | 02-Sep-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(st): add max size for FIP in eMMC boot part
When putting FIP binary in eMMC boot partition (with STM32MP_EMMC_BOOT),
the FIP max size should be precised. If it is not, an assert fails in
io_bloc
fix(st): add max size for FIP in eMMC boot part
When putting FIP binary in eMMC boot partition (with STM32MP_EMMC_BOOT),
the FIP max size should be precised. If it is not, an assert fails in
io_block driver, as cur->size will be zero.
For this length, we then use the size of the eMMC boot partition minus
STM32MP_EMMC_BOOT_FIP_OFFSET.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I48b7635cff64f52d4b337a4c8c3becd9a0be72e8
show more ...
|
| e0bbc190 | 13-Jan-2021 |
Lionel Debieve <lionel.debieve@st.com> |
feat(stm32mp1): allow to override MTD base offset
Add an external parameter STM32MP_FORCE_MTD_START_OFFSET that allows to
override the default FIP offset used to read the first programmed image.
It
feat(stm32mp1): allow to override MTD base offset
Add an external parameter STM32MP_FORCE_MTD_START_OFFSET that allows to
override the default FIP offset used to read the first programmed image.
It can be used for NOR, RAW_NAND or SPI_NAND boot device.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ibe664aae0e5ee90dd6629e544c9e034d751fffed
show more ...
|
| d3434dca | 18-Aug-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(stm32mp1): manage second NAND OTP on STM32MP13
On STM32MP13, 2 OTP fuses can be used to configure NAND devices.
By default OTP CFG9 is used for sNAND. A new OTP (CFG10) is used
to configure raw
feat(stm32mp1): manage second NAND OTP on STM32MP13
On STM32MP13, 2 OTP fuses can be used to configure NAND devices.
By default OTP CFG9 is used for sNAND. A new OTP (CFG10) is used
to configure raw NAND. Thanks to bit 0 of CFG10 OTP, this default
configuration can be switched.
For sNAND on STM32MP13, the NAND_PARAM_STORED_IN_OTP is not used.
The sNAND parameters have to be taken from OTP bits.
Change-Id: Ib95e0f9b9e66179a58b07f723ea01dce68b96475
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
show more ...
|