| e772a6d1 | 29-Jan-2020 |
Ahmad Fatoum <a.fatoum@pengutronix.de> |
stm32mp1: platform.mk: support generating multiple images in one build
Board Support for the stm32mp1 platform is contained in the device tree, so if we remove hardcoding of board name from the Make
stm32mp1: platform.mk: support generating multiple images in one build
Board Support for the stm32mp1 platform is contained in the device tree, so if we remove hardcoding of board name from the Makefile, we can build the intermediary objects once and generate one new tf-a-*.stm32 binary for every device tree specified. All in one go.
With implicit rules implemented, we only need to change the top level target to support multi-image builds on the stm32mp1.
Change-Id: I4cae7d32a4c03a3c29c559dc5332e002223902c1 Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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| a3db33fd | 29-Jan-2020 |
Ahmad Fatoum <a.fatoum@pengutronix.de> |
stm32mp1: platform.mk: migrate to implicit rules
Board Support for the stm32mp1 platform is contained in the device tree, so if we remove hardcoding of board name from the Makefile, we can build the
stm32mp1: platform.mk: migrate to implicit rules
Board Support for the stm32mp1 platform is contained in the device tree, so if we remove hardcoding of board name from the Makefile, we can build the intermediary objects once and generate one new tf-a-*.stm32 binary for every device tree specified. All in one go.
Prepare for this by employing implicit rules.
Change-Id: I5a022a89eb12696cd8cee7bf28ac6be54849901f Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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| 1a0b5a57 | 29-Jan-2020 |
Ahmad Fatoum <a.fatoum@pengutronix.de> |
stm32mp1: platform.mk: derive map file name from target name
Doing this allows us in the next commit to use implicit rules (%-patterns) to cover all the images we generate during a stm32mp1 build.
stm32mp1: platform.mk: derive map file name from target name
Doing this allows us in the next commit to use implicit rules (%-patterns) to cover all the images we generate during a stm32mp1 build.
Change-Id: Ibde59d10ccce42566f82820117d7fd0d77345e6c Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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| fc4fdf71 | 29-Jan-2020 |
Ahmad Fatoum <a.fatoum@pengutronix.de> |
stm32mp1: platform.mk: generate linker script with fixed name
The linker script has no board-specific information that necessitates it having a name derived from the board name. Give it a fixed name
stm32mp1: platform.mk: generate linker script with fixed name
The linker script has no board-specific information that necessitates it having a name derived from the board name. Give it a fixed name, so we can later reuse the same linker script for multiple boards.
Change-Id: Ie6650f00389f4ab8577ae82a36c620af9c64101e Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
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| e98f594a | 27-Sep-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
stm32mp1: Reduce MAX_XLAT_TABLES to 4
For STM32MP1, the address space is 4GB, which can be first divided in 4 parts of 1GB. This LVL1 table is already mapped regardless of MAX_XLAT_TABLES. Fixing ty
stm32mp1: Reduce MAX_XLAT_TABLES to 4
For STM32MP1, the address space is 4GB, which can be first divided in 4 parts of 1GB. This LVL1 table is already mapped regardless of MAX_XLAT_TABLES. Fixing typo: Replace Ko to KB.
BL2/sp_min for platform STM32MP1 requires 4 MMU translation tables: - a level2 table and a level3 table for identity mapped SYSRAM - a level2 table mapping 2MB of BootROM runtime resources - a level2 table mapping 2MB of secure DDR (case BL32 is OP-TEE)
Change-Id: If80cbd4fccc7689b39dd540d6649b1313557f326 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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| 02f5d820 | 11-Jul-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: sp_min: initialize MMU and cache earlier
This change enhances performance and security in BL32 stage.
Change-Id: I64df5995fc6b04f6cf42d6a00a6d3d0f602b5407 Signed-off-by: Yann Gautier <yan
stm32mp1: sp_min: initialize MMU and cache earlier
This change enhances performance and security in BL32 stage.
Change-Id: I64df5995fc6b04f6cf42d6a00a6d3d0f602b5407 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| b2182cde | 04-Jun-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: check if the SoC is single core
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip. A function is added to check the part number of the SoC. If it corresponds to STM3
stm32mp1: check if the SoC is single core
Among the variants of STM32MP, the STM32MP151 is a single Cortex-A7 chip. A function is added to check the part number of the SoC. If it corresponds to STM32MP151A or STM32MP151C, then the chip has a single Cortex-A7.
Change-Id: Icac2015c5d03ce0bcb8e99bbaf1ec8ada34be49c Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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| 10e7a9e9 | 13-May-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: print information about board
On STMicroelectronics boards, the board information is stored in OTP. This OTP is described in device tree, in BSEC board_id node.
Change-Id: Ieccbdcb0483436
stm32mp1: print information about board
On STMicroelectronics boards, the board information is stored in OTP. This OTP is described in device tree, in BSEC board_id node.
Change-Id: Ieccbdcb048343680faac8dc577b75c67ac106f5b Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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