refactor(stm32mp1): remove authentication using STM32 image mode

Remove deprecated authentication mode to use the FIP authentication
based on TBBR requirements. It will use the new crypto library.

refactor(stm32mp1): remove authentication using STM32 image mode

Remove deprecated authentication mode to use the FIP authentication
based on TBBR requirements. It will use the new crypto library.

Change-Id: I95c7baa64ba42c370ae136f59781f2a7a4c7f507
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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Merge changes from topic "st_uart_updates" into integration

* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFI

Merge changes from topic "st_uart_updates" into integration

* changes:
feat(stm32mp1): add early console in SP_min
feat(st): properly manage early console
feat(st-uart): manage STM32MP_RECONFIGURE_CONSOLE
docs(st): introduce STM32MP_RECONFIGURE_CONSOLE
feat(st): add trace for early console
fix(stm32mp1): enable crash console in FIQ handler
feat(st-uart): add initialization with the device tree
refactor(stm32mp1): move DT_UART_COMPAT in include file
feat(stm32mp1): configure the serial boot load address
fix(stm32mp1): update the FIP load address for serial boot
refactor(st): configure baudrate for UART programmer
refactor(st-uart): compute the over sampling dynamically

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refactor(stm32mp1): move DT_UART_COMPAT in include file

Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.

Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Sig

refactor(stm32mp1): move DT_UART_COMPAT in include file

Move the definition of DT_UART_COMPAT in stm32mp1_def.h to be used
in several files.

Change-Id: I74d0350bcd971df9b15697f2b9ec04061d6a7656
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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Merge changes from topic "st-nand-updates" into integration

* changes:
feat(stm32mp1): allow to override MTD base offset
feat(stm32mp1): manage second NAND OTP on STM32MP13
feat(stm32mp1): add

Merge changes from topic "st-nand-updates" into integration

* changes:
feat(stm32mp1): allow to override MTD base offset
feat(stm32mp1): manage second NAND OTP on STM32MP13
feat(stm32mp1): add define for external scratch buffer for nand devices
feat(mtd): add platform function to allow using external buffer
feat(libc): introduce __maybe_unused

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feat(stm32mp1): manage second NAND OTP on STM32MP13

On STM32MP13, 2 OTP fuses can be used to configure NAND devices.
By default OTP CFG9 is used for sNAND. A new OTP (CFG10) is used
to configure raw

feat(stm32mp1): manage second NAND OTP on STM32MP13

On STM32MP13, 2 OTP fuses can be used to configure NAND devices.
By default OTP CFG9 is used for sNAND. A new OTP (CFG10) is used
to configure raw NAND. Thanks to bit 0 of CFG10 OTP, this default
configuration can be switched.
For sNAND on STM32MP13, the NAND_PARAM_STORED_IN_OTP is not used.
The sNAND parameters have to be taken from OTP bits.

Change-Id: Ib95e0f9b9e66179a58b07f723ea01dce68b96475
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(stm32mp1): add define for external scratch buffer for nand devices

Override the default platform function to use an external buffer
on STM32MP13 platform.
It allows to use a temporary buffer lo

feat(stm32mp1): add define for external scratch buffer for nand devices

Override the default platform function to use an external buffer
on STM32MP13 platform.
It allows to use a temporary buffer located at the SRAM1 memory end.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ibd84bb336c60af24608268916b3a18bb5a0fa3db

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Merge changes from topic "stm32mp13-updates" into integration

* changes:
feat(stm32mp1): manage STM32MP13 rev.Y
feat(stm32mp13-fdts): use STM32MP_DDR_S_SIZE in fw-config
fix(stm32mp13-fdts): c

Merge changes from topic "stm32mp13-updates" into integration

* changes:
feat(stm32mp1): manage STM32MP13 rev.Y
feat(stm32mp13-fdts): use STM32MP_DDR_S_SIZE in fw-config
fix(stm32mp13-fdts): cleanup DT files
fix(stm32mp13-fdts): update SDMMC max frequency
fix(stm32mp13-fdts): align sdmmc pins with kernel

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feat(stm32mp1): manage STM32MP13 rev.Y

The new SoC version for STM32MP13 is the revision Y. The register
SYSCFG_IDC is updated for this new version with the value 0x1003.
The function stm32mp_get_so

feat(stm32mp1): manage STM32MP13 rev.Y

The new SoC version for STM32MP13 is the revision Y. The register
SYSCFG_IDC is updated for this new version with the value 0x1003.
The function stm32mp_get_soc_name() should also be updated to manage
this new SoC revision.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I4f2fa5f1503f17db93d8413c79c2b7a18d279f9b

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Merge changes from topic "st_fix_stm32mp13" into integration

* changes:
fix(stm32mp13): correct USART addresses
feat(stm32mp13): change BL33 memory mapping

fix(stm32mp13): correct USART addresses

On STM32MP13, USART1 and USART2 addresses are 0x4C000000 and 0x4C001000.
Whereas on STM32MP15, the addresses were 0x5C000000 and 0x4000E000.
Use dedicated fla

fix(stm32mp13): correct USART addresses

On STM32MP13, USART1 and USART2 addresses are 0x4C000000 and 0x4C001000.
Whereas on STM32MP15, the addresses were 0x5C000000 and 0x4000E000.
Use dedicated flags to choose the correct address, that could be use
for early or crash console.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I98bd97a0ac8b0408a50376801e2a1961b241a3d6

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feat(stm32mp13): change BL33 memory mapping

U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.

This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15

feat(stm32mp13): change BL33 memory mapping

U-Boot is loaded at the beginning of the DDR:
STM32MP_DDR_BASE = 0xC0000000.

This patch remove the need to use the 0x100000 offset, reserved
on STM32MP15 for flashlayout.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8d0a93f4db411cf59838e635a315c729cccee269

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Merge changes from topic "st_fwu_bkp_reg" into integration

* changes:
feat(stm32mp1): retry 3 times FWU trial boot
refactor(stm32mp1): update backup reg for FWU

Merge changes from topic "st_nvmem_layout" into integration

* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st):

Merge changes from topic "st_nvmem_layout" into integration

* changes:
refactor(stm32mp1-fdts): remove nvmem_layout node
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
refactor(st): remove useless includes

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feat(stm32mp1): retry 3 times FWU trial boot

If we reboot 3 times in trial mode, BL2 will select previous boot image.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I

feat(stm32mp1): retry 3 times FWU trial boot

If we reboot 3 times in trial mode, BL2 will select previous boot image.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I82b423cc84f0471fdb6fa7c393fc5fe411d25c06

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refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node

Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.

The expected OTP NAME can

refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node

Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.

The expected OTP NAME can directly be found in a sub-node named
NAME@ADDRESS of the BSEC node, the NVMEM provider node.

This patch also removes this specific binding introduced for TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic703385fad1bec5bef1cee583fbe9fbbf6aea216

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Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(s

Merge changes from topic "stm32mp13" into integration

* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(stm32mp1-fdts): add DDR support for STM32MP13
feat(stm32mp1-fdts): add st-io_policies node for STM32MP13
feat(stm32mp1): updates for STM32MP13 device tree compilation
feat(stm32mp1-fdts): add DT files for STM32MP13
feat(dt-bindings): add TZC400 bindings for STM32MP13
feat(stm32mp1): add "Boot mode" management for STM32MP13
feat(stm32mp1): manage HSLV on STM32MP13
feat(stm32mp1): add sdmmc compatible in platform define
feat(st-sdmmc2): allow compatible to be defined in platform code
feat(stm32mp1): update IO compensation on STM32MP13
feat(stm32mp1): call pmic_voltages_init() in platform init
feat(st-pmic): add pmic_voltages_init() function
feat(stm32mp1): update CFG0 OTP for STM32MP13
feat(stm32mp1): usb descriptor update for STM32MP13
feat(st-clock): add clock driver for STM32MP13
feat(dt-bindings): add bindings for STM32MP13
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
feat(stm32mp1): add a second fixed regulator
feat(stm32mp1): adaptations for STM32MP13 image header
feat(stm32mp1): update boot API for header v2.0
feat(stm32mp1): update IP addresses for STM32MP13
feat(stm32mp1): add part numbers for STM32MP13
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
feat(stm32mp1): remove unsupported features on STM32MP13
feat(stm32mp1): update memory mapping for STM32MP13
feat(stm32mp1): introduce new flag for STM32MP13
feat(st): update stm32image tool for header v2

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feat(stm32mp1-fdts): add DDR support for STM32MP13

Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.co

feat(stm32mp1-fdts): add DDR support for STM32MP13

Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ib1bb9ad8cb2ab9f5f81549635d6604093aeb99d3

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feat(stm32mp1): add sdmmc compatible in platform define

Add DT_SDMMC2_COMPAT define in stm32mp1_def.h file in platform.
It allows the use of the compatible in platform code.

Change-Id: I535ad67dd13

feat(stm32mp1): add sdmmc compatible in platform define

Add DT_SDMMC2_COMPAT define in stm32mp1_def.h file in platform.
It allows the use of the compatible in platform code.

Change-Id: I535ad67dd133bab59cf81881adaef42d8e88632c
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp1): update CFG0 OTP for STM32MP13

This field is now declared on the 10 LSB bits on STM32MP13.
Several possible values are specified in the Reference Manual, and
indicate an open or close

feat(stm32mp1): update CFG0 OTP for STM32MP13

This field is now declared on the 10 LSB bits on STM32MP13.
Several possible values are specified in the Reference Manual, and
indicate an open or closed device. Other values lead to a system panic.

Change-Id: I697124a21db66a56e7e223d601aa7cf44bb183c4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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feat(st-clock): add clock driver for STM32MP13

Add new clock driver for STM32MP13. Split the include file to manage
either STM32MP13 or STM32MP15.

Change-Id: Ia568cd12b1d5538809204f0fd2224d51e5d1e9

feat(st-clock): add clock driver for STM32MP13

Add new clock driver for STM32MP13. Split the include file to manage
either STM32MP13 or STM32MP15.

Change-Id: Ia568cd12b1d5538809204f0fd2224d51e5d1e985
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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feat(stm32mp1): use only one filter for TZC400 on STM32MP13

On STM32MP13, there is only 1 DDR port, hence only 1 TZC400 filter.

Change-Id: I4f6750022cdaf658cd209a4bf48a6cdb0717020e
Signed-off-by: Y

feat(stm32mp1): use only one filter for TZC400 on STM32MP13

On STM32MP13, there is only 1 DDR port, hence only 1 TZC400 filter.

Change-Id: I4f6750022cdaf658cd209a4bf48a6cdb0717020e
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp1): add a second fixed regulator

Increase the fixed regulator number that needs to be
2 for STM32MP13.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ica990fe9a64

feat(stm32mp1): add a second fixed regulator

Increase the fixed regulator number that needs to be
2 for STM32MP13.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ica990fe9a6494b76aed763d2d353f5234fed7cea

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feat(stm32mp1): adaptations for STM32MP13 image header

The header must now include by default at least an extra padding
header, increasing the size of the header to 512 bytes (0x200).
This header wi

feat(stm32mp1): adaptations for STM32MP13 image header

The header must now include by default at least an extra padding
header, increasing the size of the header to 512 bytes (0x200).
This header will be placed at the end of SRAM3 by BootROM, letting
the whole SYSRAM to TF-A.
The boot context is now placed in SRAM2, hence this memory has to be
mapped in BL2 MMU. This mapping is done for all SRAMs in a 2MB area.

Change-Id: I50fcd43ecd0ba2076292b057566efe6809b9971a
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(stm32mp1): update IP addresses for STM32MP13

Add the IP addresses that are STM32MP13 and update the ones for
which the base address has changed.

Signed-off-by: Yann Gautier <yann.gautier@st.co

feat(stm32mp1): update IP addresses for STM32MP13

Add the IP addresses that are STM32MP13 and update the ones for
which the base address has changed.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iea71a491da36f721bfd3fbfb010177e2a6a57281

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feat(stm32mp1): add part numbers for STM32MP13

Add the new part numbers and adapt the functions that use them.
There is no package number in OTP as they all share the same GPIO
banks.
This part is t

feat(stm32mp1): add part numbers for STM32MP13

Add the new part numbers and adapt the functions that use them.
There is no package number in OTP as they all share the same GPIO
banks.
This part is then stubbed for STM32MP13.

Change-Id: I13414326b140119aece662bf8d82b387dece0dcc
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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