| #
95ea87ff |
| 01-Nov-2021 |
Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): add DCM driver
DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.
1. Add MCUSYS related DCM drivers.
2. Enable M
feat(plat/mediatek/mt8186): add DCM driver
DCM means dynamic clock management, and it can dynamically
slow down or gate clocks during CPU or bus idle.
1. Add MCUSYS related DCM drivers.
2. Enable MCUSYS related DCM by default.
TEST=build pass
BUG=b:202871018
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com>
Change-Id: Idc669364c89cde0974d2940bd12987ee833d1965
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|
| #
af5a0c40 |
| 15-Oct-2021 |
Guodong Liu <guodong.liu@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): add pinctrl support
Add MT8186 pinctrl support.
TEST=build pass
BUG=b:202871018
Signed-off-by: Guodong Liu <guodong.liu@mediatek.corp-partner.google.com>
Change-Id: I5b
feat(plat/mediatek/mt8186): add pinctrl support
Add MT8186 pinctrl support.
TEST=build pass
BUG=b:202871018
Signed-off-by: Guodong Liu <guodong.liu@mediatek.corp-partner.google.com>
Change-Id: I5b9c1c60a91c74c7d3f45c78a9403544373fa90f
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|
| #
109b91e3 |
| 12-Oct-2021 |
Zhengnan Chen <zhengnan.chen@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): add sys_cirq support
Add 8186 sys_cirq info.
TEST=build pass
BUG=b:202871018
Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.corp-partner.google.com>
Change-Id: Ib
feat(plat/mediatek/mt8186): add sys_cirq support
Add 8186 sys_cirq info.
TEST=build pass
BUG=b:202871018
Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.corp-partner.google.com>
Change-Id: Ib8a1c4e995288bf5f7981ea65f27727715fe5787
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|
| #
206f125c |
| 11-Oct-2021 |
Christine Zhu <christine.zhu@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): initialize GIC
Initialize GIC for mt8186.
TEST=build pass
BUG=b:202871018
Signed-off-by: Christine Zhu <christine.zhu@mediatek.corp-partner.google.com>
Change-Id: I8d02
feat(plat/mediatek/mt8186): initialize GIC
Initialize GIC for mt8186.
TEST=build pass
BUG=b:202871018
Signed-off-by: Christine Zhu <christine.zhu@mediatek.corp-partner.google.com>
Change-Id: I8d029983c7ce48fa116fafa7fa78c65349308014
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|
| #
5aab27dc |
| 06-Oct-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): add SiP service
Add the basic SiP service.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I4dcc7383237bb6c1f2494920cde
feat(plat/mediatek/mt8186): add SiP service
Add the basic SiP service.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I4dcc7383237bb6c1f2494920cde21197754f6367
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|
| #
5bc88ec6 |
| 06-Oct-2021 |
James Lo <james.lo@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): add pwrap and pmic driver
1. Add 8186 pwrap driver to access pmic.
2. Add 6366 pmic driver to support clean PWRHOLD.
TEST=build pass
BUG=b:202871018
Signed-off-by: Jame
feat(plat/mediatek/mt8186): add pwrap and pmic driver
1. Add 8186 pwrap driver to access pmic.
2. Add 6366 pmic driver to support clean PWRHOLD.
TEST=build pass
BUG=b:202871018
Signed-off-by: James Lo <james.lo@mediatek.corp-partner.google.com>
Change-Id: I3bc90460a6a55dff8d3293e04482abcad789bbb2
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|
| #
d73e15e6 |
| 06-Oct-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): initialize delay_timer
Initialize delay_timer for delay functions.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ib8f
feat(plat/mediatek/mt8186): initialize delay_timer
Initialize delay_timer for delay functions.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ib8f52d1c674537795cc478015c83cca0f872df60
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|
| #
a6a0af57 |
| 06-Oct-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): initialize systimer
Add systimer to support timer function.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I505f7d0944
feat(plat/mediatek/mt8186): initialize systimer
Add systimer to support timer function.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I505f7d094410d178e4203e3a9294b851a30ba150
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|
| #
1b17e34c |
| 03-Oct-2021 |
Penny Jan <penny.jan@mediatek.corp-partner.google.com> |
feat(plat/mediatek/mt8186): add EMI MPU basic driver
EMI MPU stands for external memory interface memory protect unit.
MT8186 supports 32 regions and 16 domains.
We add basic driver currently, and w
feat(plat/mediatek/mt8186): add EMI MPU basic driver
EMI MPU stands for external memory interface memory protect unit.
MT8186 supports 32 regions and 16 domains.
We add basic driver currently, and will add more settings for
EMI MPU in next patch.
TEST=build pass
BUG=b:202871018
Signed-off-by: Penny Jan <penny.jan@mediatek.corp-partner.google.com>
Change-Id: Ia9e5030164e40e060a05e8f91d2ac88258c2e98e
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| #
e018bf71 |
| 01-Dec-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(mt8186): initialize platform for MediaTek MT8186" into integration
|
| #
27132f13 |
| 28-Sep-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> |
feat(mt8186): initialize platform for MediaTek MT8186
- Add basic platform setup.
- Add MT8186 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
TEST=bu
feat(mt8186): initialize platform for MediaTek MT8186
- Add basic platform setup.
- Add MT8186 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Id3e2f46a8c3ab2f3e29137e508d4c671e8f4aad5
show more ...
|