1# 2# Copyright (c) 2021, MediaTek Inc. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7MTK_PLAT := plat/mediatek 8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9 10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11 -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \ 12 -I${MTK_PLAT_SOC}/include/ 13 14include drivers/arm/gic/v3/gicv3.mk 15include lib/xlat_tables_v2/xlat_tables.mk 16 17PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 18 ${XLAT_TABLES_LIB_SRCS} \ 19 plat/common/aarch64/crash_console_helpers.S \ 20 plat/common/plat_psci_common.c 21 22 23BL31_SOURCES += common/desc_image_load.c \ 24 drivers/ti/uart/aarch64/16550_console.S \ 25 lib/bl_aux_params/bl_aux_params.c \ 26 lib/cpus/aarch64/cortex_a55.S \ 27 lib/cpus/aarch64/cortex_a76.S \ 28 plat/common/plat_gicv3.c \ 29 ${MTK_PLAT}/common/mtk_plat_common.c \ 30 ${MTK_PLAT}/common/params_setup.c \ 31 ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 32 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 33 ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 34 ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \ 35 ${MTK_PLAT_SOC}/plat_pm.c \ 36 ${MTK_PLAT_SOC}/plat_topology.c 37 38# Configs for A76 and A55 39HW_ASSISTED_COHERENCY := 1 40USE_COHERENT_MEM := 0 41CTX_INCLUDE_AARCH32_REGS := 0 42ERRATA_A55_1530923 := 1 43ERRATA_A55_1221012 := 1 44 45# indicate the reset vector address can be programmed 46PROGRAMMABLE_RESET_ADDRESS := 1 47 48COLD_BOOT_SINGLE_CPU := 1 49 50MACH_MT8186 := 1 51$(eval $(call add_define,MACH_MT8186)) 52 53include lib/coreboot/coreboot.mk 54