fix(intel): remove invalid SDM SMMU Stream ID register from bypass list

The register is SDM-owned and not accessible by HPS.
It was added by mistakein v2.7.0.
Removing it ensures correct access cont

fix(intel): remove invalid SDM SMMU Stream ID register from bypass list

The register is SDM-owned and not accessible by HPS.
It was added by mistakein v2.7.0.
Removing it ensures correct access control.

Change-Id: I76d27e5b53bfb115ace6011dbb79f2fac049bb4e
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): prevent invalid register rejection on non-A5F4 devices

Move TSN_TBU_STREAM_CTRL_REG_3_TSN0/1/2 handling outside the
main switch to ensure non-A5F4 devices (e.g., A5F0) evaluate
other val

fix(intel): prevent invalid register rejection on non-A5F4 devices

Move TSN_TBU_STREAM_CTRL_REG_3_TSN0/1/2 handling outside the
main switch to ensure non-A5F4 devices (e.g., A5F0) evaluate
other valid registers.

Previously, TSN cases were inside the switch and followed
by a `break` if not A5F4, causing early exit and -1 return.
Valid registers (e.g., ECC_INTMASK_x)were rejected, blocking boot.

Now, A5F4 TSN registers are handled conditionally
and fallthrough is clean for all other devices.

Change-Id: I1339e0e3951ccb68f02dc437f25db6c27d2a0877
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): allow kernel access to TSN TBU stream control registers

Added TSN_TBU_STREAM_CTRL_REG_3_TSN0/1/2 to ATF's secure range check
to permit setting the 31st bit from kernel space.

Change-Id:

fix(intel): allow kernel access to TSN TBU stream control registers

Added TSN_TBU_STREAM_CTRL_REG_3_TSN0/1/2 to ATF's secure range check
to permit setting the 31st bit from kernel space.

Change-Id: I74bd296c4c050fb61d4df5c1bd5b57449b3a13e3
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): update nand driver to enable Linux OS boot

Update the nand driver SDR mode with the correct timing
and combo-phy configurations to enable the Linux system
boot.

Change-Id: If592680ef359

fix(intel): update nand driver to enable Linux OS boot

Update the nand driver SDR mode with the correct timing
and combo-phy configurations to enable the Linux system
boot.

Change-Id: If592680ef359378574b913b11d466c89389a2606
Signed-off-by: Girisha Dengi <girisha.dengi@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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Merge "fix(intel): update the AES GCM/GCM_GHASH modes return data size" into integration

fix(intel): update the AES GCM/GCM_GHASH modes return data size

On the Agilex5 platform, in FCS AES method if block mode is
GCM/GCM_GHASH mode then the data size written to the destination
buffer is

fix(intel): update the AES GCM/GCM_GHASH modes return data size

On the Agilex5 platform, in FCS AES method if block mode is
GCM/GCM_GHASH mode then the data size written to the destination
buffer is at index[7] instead of [3] as in other cases.

Change-Id: Ide664f594ea63aaee7f74d21e8e2986de48e94a2
Signed-off-by: Girisha Dengi <girisha.dengi@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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Merge "fix(intel): correct condition to process unused entries" into integration

fix(intel): correct condition to process unused entries

A logic error in the response queue handling caused available
entries to be skipped after an upstream change inverted the
flag check. This fix

fix(intel): correct condition to process unused entries

A logic error in the response queue handling caused available
entries to be skipped after an upstream change inverted the
flag check. This fix restores the intended logic so that unused
response slots are correctly detected and processed.

Change-Id: I253f098573c3c84dc43f48cff893c410684322a2
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): add missing cache flush operation for hmac

Add missing cache flush operation for HMAC verify
operation.Also update the code to query the correct
buffer for the final result of HMAC veri

fix(intel): add missing cache flush operation for hmac

Add missing cache flush operation for HMAC verify
operation.Also update the code to query the correct
buffer for the final result of HMAC verify operation.

Change-Id: I85208765313b9048cfef13727d280dca8af6d548
Signed-off-by: Mahesh Rao <mahesh.rao@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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Merge "fix(intel): select the DFI interface based on the hand-off data" into integration

Merge "fix(intel): flush the mailbox response buffer in SiPSVC V3" into integration

fix(intel): select the DFI interface based on the hand-off data

Select the DFI interface based on the hand-off power
gate enable data, whether NAND or SDMMC controller is
selected based on this data

fix(intel): select the DFI interface based on the hand-off data

Select the DFI interface based on the hand-off power
gate enable data, whether NAND or SDMMC controller is
selected based on this data.

Change-Id: I097b7f84874368a5ed265d8fa7fff193f430b245
Signed-off-by: Girisha Dengi <girisha.dengi@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): flush the mailbox response buffer in SiPSVC V3

In SiPSVC V3, the user suppiled buffer will be directly used
for collecting the response from SDM mailbox - this way we
can avoid keeping t

fix(intel): flush the mailbox response buffer in SiPSVC V3

In SiPSVC V3, the user suppiled buffer will be directly used
for collecting the response from SDM mailbox - this way we
can avoid keeping the response local copy in the TF-A and
improve performance. Once the response is collected in the
user buffer, we need to FLUSH to maintain coherency.

Change-Id: I265ce177fe42d7ab647c875d52286de4b998672d
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): update the RSU version logic read

Update the RSU version logic read, keep the version
with backward compatible as SiPSVC V1.

Change-Id: Ibb0f3bb631c7759e65ac028a9e52006f2f057e6f
Signed-

fix(intel): update the RSU version logic read

Update the RSU version logic read, keep the version
with backward compatible as SiPSVC V1.

Change-Id: Ibb0f3bb631c7759e65ac028a9e52006f2f057e6f
Signed-off-by: Girisha Dengi <girisha.dengi@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): update generic mailbox command filter method

Update generic mailbox command filter method, filter the
commands based on the mailbox spec command ID and not on
the SMC function ID.

Chang

fix(intel): update generic mailbox command filter method

Update generic mailbox command filter method, filter the
commands based on the mailbox spec command ID and not on
the SMC function ID.

Change-Id: Icceecc4c41858254d1a44e83552561f0b7c313ac
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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Merge "fix(intel): solve agilex warm reset issue" into integration

Merge "feat(intel): move common functions to common lib files" into integration

Merge "fix(intel): add 5us delay before Linux reconfig to avoid HNOC hang" into integration

fix(intel): solve agilex warm reset issue

Agilex warm reset not able to trigger due to the system not able to
detect the magic number. ATF only able to solve for boot core.
For secondary cores, Linu

fix(intel): solve agilex warm reset issue

Agilex warm reset not able to trigger due to the system not able to
detect the magic number. ATF only able to solve for boot core.
For secondary cores, Linux need to update psci driver to WFI
the cores in EL3. Original Linux WFI is EL1.
Thus causing secondary cores not working

Change-Id: I5470abc19a09e45f16c4cd0049dd20e6534435bb
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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feat(intel): move common functions to common lib files

This patch is used to move common functions that used across
files into commmon lib files to prevent multiple functions
declaration and share a

feat(intel): move common functions to common lib files

This patch is used to move common functions that used across
files into commmon lib files to prevent multiple functions
declaration and share among files.

Change-Id: I19d9727eac895e7bf597a66076a7b68755cbe0ef
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): add 5us delay before Linux reconfig to avoid HNOC hang

On FP82, performing FPGA configuration in U-Boot followed by a
second configuration in Linux via devicetree overlay can lead
to a s

fix(intel): add 5us delay before Linux reconfig to avoid HNOC hang

On FP82, performing FPGA configuration in U-Boot followed by a
second configuration in Linux via devicetree overlay can lead
to a system hang. This issue does not occur on Agilex or Agilex5.

Root cause is tied to FP82's HNOC (Hardened Network-on-Chip),
which requires a brief settling period after bridge enablement
and initial fabric reconfiguration. Without this delay, HNOC
may still be transitioning, resulting in unstable FPGA access.

A 5us delay is added before the Linux reconfiguration step
to ensure HNOC is fully stabilized. Verified on FP82. No impact
on other platforms.

Change-Id: I083d395d34c797c4bf0a7e8aadc7c8866661fc15
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): fix socfpga_psci for cpu on off function

Fix for CPU ON / OFF Function calling from Linux Kernel.

Change-Id: Ie450acf7e537ed60ef4b2e8d785e62d94e52482f
Signed-off-by: Boon Khai Ng <boon.

fix(intel): fix socfpga_psci for cpu on off function

Fix for CPU ON / OFF Function calling from Linux Kernel.

Change-Id: Ie450acf7e537ed60ef4b2e8d785e62d94e52482f
Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>

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fix(intel): fix variable may be used uninitialized error

When building with LTO, the compiler can correctly see that there are
code paths that can lead to a variable used without it being written to

fix(intel): fix variable may be used uninitialized error

When building with LTO, the compiler can correctly see that there are
code paths that can lead to a variable used without it being written to.
Give these variables a starting value of 0 as a reasonable default
if/when this happens and to make the compiler happy.

Change-Id: I1d1efdbc59945d15a18fb3cfd498061eb681e5f9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes I3303ca9a,I682da2d3 into integration

* changes:
feat(intel): migrate RSU client to SiPSVC V3
fix(intel): support generic mailbox command in SiPSVC V3

Merge "fix(intel): support SMC 64bit return args in SiPSVC V3" into integration