| 0cb64d01 | 11-Oct-2019 |
Achin Gupta <achin.gupta@arm.com> |
SPMD: add support for an example SPM core manifest
This patch repurposes the TOS FW configuration file as the manifest for the SPM core component which will reside at the secure EL adjacent to EL3.
SPMD: add support for an example SPM core manifest
This patch repurposes the TOS FW configuration file as the manifest for the SPM core component which will reside at the secure EL adjacent to EL3. The SPM dispatcher component will use the manifest to determine how the core component must be initialised. Routines and data structure to parse the manifest have also been added.
Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: Id94f8ece43b4e05609f0a1d364708a912f6203cb
show more ...
|
| 97399821 | 29-Jan-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
arm-io: Panic in case of io setup failure
Currently, an IO setup failure will be ignored on arm platform release build. Change this to panic instead.
Change-Id: I027a045bce2422b0a0fc4ff9e9d4c6e7bf5
arm-io: Panic in case of io setup failure
Currently, an IO setup failure will be ignored on arm platform release build. Change this to panic instead.
Change-Id: I027a045bce2422b0a0fc4ff9e9d4c6e7bf5d2f98 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| d6dcbcad | 29-Jan-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
MISRA fix: Use boolean essential type
Change the return type of "arm_io_is_toc_valid()" and "plat_arm_bl1_fwu_needed()" to bool, to match function behavior.
Change-Id: I503fba211219a241cb263149ef36
MISRA fix: Use boolean essential type
Change the return type of "arm_io_is_toc_valid()" and "plat_arm_bl1_fwu_needed()" to bool, to match function behavior.
Change-Id: I503fba211219a241cb263149ef36ca14e3362a1c Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| 0a6e7e3b | 24-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Move platform io policies into fconf
Use the firmware configuration framework to store the io_policies information inside the configuration device tree instead of the static structure in the
fconf: Move platform io policies into fconf
Use the firmware configuration framework to store the io_policies information inside the configuration device tree instead of the static structure in the code base.
The io_policies required by BL1 can't be inside the dtb, as this one is loaded by BL1, and only available at BL2.
This change currently only applies to FVP platform.
Change-Id: Ic9c1ac3931a4a136aa36f7f58f66d3764c1bfca1 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| 6c972317 | 01-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Add mbedtls shared heap as property
Use the firmware configuration framework in arm dynamic configuration to retrieve mbedtls heap information between bl1 and bl2.
For this, a new fconf gett
fconf: Add mbedtls shared heap as property
Use the firmware configuration framework in arm dynamic configuration to retrieve mbedtls heap information between bl1 and bl2.
For this, a new fconf getter is added to expose the device tree base address and size.
Change-Id: Ifa5ac9366ae100e2cdd1f4c8e85fc591b170f4b6 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| ce852841 | 30-Sep-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Add TBBR disable_authentication property
Use fconf to retrieve the `disable_authentication` property. Move this access from arm dynamic configuration to bl common.
Change-Id: Ibf184a5c6245d0
fconf: Add TBBR disable_authentication property
Use fconf to retrieve the `disable_authentication` property. Move this access from arm dynamic configuration to bl common.
Change-Id: Ibf184a5c6245d04839222f5457cf5e651f252b86 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| 25ac8794 | 17-Dec-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Add dynamic config DTBs info as property
This patch introduces a better separation between the trusted-boot related properties, and the dynamic configuration DTBs loading information.
The dy
fconf: Add dynamic config DTBs info as property
This patch introduces a better separation between the trusted-boot related properties, and the dynamic configuration DTBs loading information.
The dynamic configuration DTBs properties are moved to a new node: `dtb-registry`. All the sub-nodes present will be provided to the dynamic config framework to be loaded. The node currently only contains the already defined configuration DTBs, but can be extended for future features if necessary. The dynamic config framework is modified to use the abstraction provided by the fconf framework, instead of directly accessing the DTBs.
The trusted-boot properties are kept under the "arm,tb_fw" compatible string, but in a separate `tb_fw-config` node. The `tb_fw-config` property of the `dtb-registry` node simply points to the load address of `fw_config`, as the `tb_fw-config` is currently part of the same DTB.
Change-Id: Iceb6c4c2cb92b692b6e28dbdc9fb060f1c46de82 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| 9814bfc1 | 17-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Populate properties from dtb during bl2 setup
Use the dtb provided by bl1 as configuration file for fconf.
Change-Id: I3f466ad9b7047e1a361d94e71ac6d693e31496d9 Signed-off-by: Louis Mayencour
fconf: Populate properties from dtb during bl2 setup
Use the dtb provided by bl1 as configuration file for fconf.
Change-Id: I3f466ad9b7047e1a361d94e71ac6d693e31496d9 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| 3b5ea741 | 17-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Load config dtb from bl1
Move the loading of the dtb from arm_dym_cfg to fconf. The new loading function is not associated to arm platform anymore, and can be moved to bl_main if wanted.
Cha
fconf: Load config dtb from bl1
Move the loading of the dtb from arm_dym_cfg to fconf. The new loading function is not associated to arm platform anymore, and can be moved to bl_main if wanted.
Change-Id: I847d07eaba36d31d9d3ed9eba8e58666ea1ba563 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| ab1981db | 08-Aug-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: initial commit
Introduce the Firmware CONfiguration Framework (fconf).
The fconf is an abstraction layer for platform specific data, allowing a "property" to be queried and a value retrieved
fconf: initial commit
Introduce the Firmware CONfiguration Framework (fconf).
The fconf is an abstraction layer for platform specific data, allowing a "property" to be queried and a value retrieved without the requesting entity knowing what backing store is being used to hold the data.
The default backing store used is C structure. If another backing store has to be used, the platform integrator needs to provide a "populate()" function to fill the corresponding C structure. The "populate()" function must be registered to the fconf framework with the "FCONF_REGISTER_POPULATOR()". This ensures that the function would be called inside the "fconf_populate()" function.
A two level macro is used as getter: - the first macro takes 3 parameters and converts it to a function call: FCONF_GET_PROPERTY(a,b,c) -> a__b_getter(c). - the second level defines a__b_getter(c) to the matching C structure, variable, array, function, etc..
Ex: Get a Chain of trust property: 1) FCONF_GET_PROPERY(tbbr, cot, BL2_id) -> tbbr__cot_getter(BL2_id) 2) tbbr__cot_getter(BL2_id) -> cot_desc_ptr[BL2_id]
Change-Id: Id394001353ed295bc680c3f543af0cf8da549469 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| 466bb285 | 05-Feb-2020 |
Zelalem <zelalem.aweke@arm.com> |
coverity: Fix MISRA null pointer violations
Fix code that violates the MISRA rule: MISRA C-2012 Rule 11.9: Literal "0" shall not be used as null pointer constant.
The fix explicitly checks whether
coverity: Fix MISRA null pointer violations
Fix code that violates the MISRA rule: MISRA C-2012 Rule 11.9: Literal "0" shall not be used as null pointer constant.
The fix explicitly checks whether a pointer is NULL.
Change-Id: Ibc318dc0f464982be9a34783f24ccd1d44800551 Signed-off-by: Zelalem <zelalem.aweke@arm.com>
show more ...
|
| 235c8174 | 04-Feb-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Coverity: remove unnecessary header file includes" into integration |
| 9eac8e95 | 04-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "mp/separate_nobits" into integration
* changes: plat/arm: Add support for SEPARATE_NOBITS_REGION Changes necessary to support SEPARATE_NOBITS_REGION feature |
| e6937287 | 03-Feb-2020 |
Zelalem <zelalem.aweke@arm.com> |
Coverity: remove unnecessary header file includes
This patch removes unnecessary header file includes discovered by Coverity HFA option.
Change-Id: I2827c37c1c24866c87db0e206e681900545925d4 Signed-
Coverity: remove unnecessary header file includes
This patch removes unnecessary header file includes discovered by Coverity HFA option.
Change-Id: I2827c37c1c24866c87db0e206e681900545925d4 Signed-off-by: Zelalem <zelalem.aweke@arm.com>
show more ...
|
| f69a5828 | 30-Jan-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "Use correct type when reading SCR register" into integration |
| 3bff910d | 15-Jan-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce COT build option
Allows to select the chain of trust to use when the Trusted Boot feature is enabled. This affects both the cert_create tool and the firmware itself.
Right now, the only a
Introduce COT build option
Allows to select the chain of trust to use when the Trusted Boot feature is enabled. This affects both the cert_create tool and the firmware itself.
Right now, the only available CoT is TBBR.
Change-Id: I7ab54e66508a1416cb3fcd3dfb0f055696763b3d Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
show more ...
|
| f1be00da | 24-Jan-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
Use correct type when reading SCR register
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this.
Change-Id: I51b6
Use correct type when reading SCR register
The Secure Configuration Register is 64-bits in AArch64 and 32-bits in AArch32. Use u_register_t instead of unsigned int to reflect this.
Change-Id: I51b69467baba36bf0cfaec2595dc8837b1566934 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
show more ...
|
| 0c1f197a | 27-Jan-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
plat/arm: Add support for SEPARATE_NOBITS_REGION
In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence m
plat/arm: Add support for SEPARATE_NOBITS_REGION
In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate the build to require that ARM_BL31_IN_DRAM is enabled as well.
Naturally with SEPARATE_NOBITS_REGION enabled, the BL31 initialization code cannot be reclaimed to be used for runtime data such as secondary cpu stacks.
Memory map for BL31 NOBITS region also has to be created.
Change-Id: Ibbc8c9499a32e63fd0957a6e254608fbf6fa90c9 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
show more ...
|
| 3c6ec8f1 | 22-Jan-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Revert "plat/arm: Add support for SEPARATE_NOBITS_REGION"
This reverts commit d433bbdd459c222e5bf5ca87319807465b246d8c.
Change-Id: I46c69dce704a1ce1b50452dd4d62425c4a67f7f0 |
| d433bbdd | 16-Jan-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
plat/arm: Add support for SEPARATE_NOBITS_REGION
In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence m
plat/arm: Add support for SEPARATE_NOBITS_REGION
In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate the build to require that ARM_BL31_IN_DRAM is enabled as well.
Naturally with SEPARATE_NOBITS_REGION enabled, the BL31 initialization code cannot be reclaimed to be used for runtime data such as secondary cpu stacks.
Memory map for BL31 NOBITS region also has to be created.
Change-Id: Ibd480f82c1dc74e9cbb54eec07d7a8fecbf25433 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
show more ...
|
| 86ed8953 | 20-Dec-2019 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "debugfs: add SMC channel" into integration |
| aeaa225c | 15-Oct-2019 |
Paul Beesley <paul.beesley@arm.com> |
spm-mm: Refactor secure_partition.h and its contents
Before adding any new SPM-related components we should first do some cleanup around the existing SPM-MM implementation. The aim is to make sure t
spm-mm: Refactor secure_partition.h and its contents
Before adding any new SPM-related components we should first do some cleanup around the existing SPM-MM implementation. The aim is to make sure that any SPM-MM components have names that clearly indicate that they are MM-related. Otherwise, when adding new SPM code, it could quickly become confusing as it would be unclear to which component the code belongs.
The secure_partition.h header is a clear example of this, as the name is generic so it could easily apply to any SPM-related code, when it is in fact SPM-MM specific.
This patch renames the file and the two structures defined within it, and then modifies any references in files that use the header.
Change-Id: I44bd95fab774c358178b3e81262a16da500fda26 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
show more ...
|
| 538b0020 | 14-Oct-2019 |
Paul Beesley <paul.beesley@arm.com> |
spm: Remove SPM Alpha 1 prototype and support files
The Secure Partition Manager (SPM) prototype implementation is being removed. This is preparatory work for putting in place a dispatcher component
spm: Remove SPM Alpha 1 prototype and support files
The Secure Partition Manager (SPM) prototype implementation is being removed. This is preparatory work for putting in place a dispatcher component that, in turn, enables partition managers at S-EL2 / S-EL1.
This patch removes:
- The core service files (std_svc/spm) - The Resource Descriptor headers (include/services) - SPRT protocol support and service definitions - SPCI protocol support and service definitions
Change-Id: Iaade6f6422eaf9a71187b1e2a4dffd7fb8766426 Signed-off-by: Paul Beesley <paul.beesley@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
show more ...
|
| 3f3c341a | 16-Sep-2019 |
Paul Beesley <paul.beesley@arm.com> |
Remove dependency between SPM_MM and ENABLE_SPM build flags
There are two different implementations of Secure Partition management in TF-A. One is based on the "Management Mode" (MM) design, the oth
Remove dependency between SPM_MM and ENABLE_SPM build flags
There are two different implementations of Secure Partition management in TF-A. One is based on the "Management Mode" (MM) design, the other is based on the Secure Partition Client Interface (SPCI) specification. Currently there is a dependency between their build flags that shouldn't exist, making further development harder than it should be. This patch removes that dependency, making the two flags function independently.
Before: ENABLE_SPM=1 is required for using either implementation. By default, the SPCI-based implementation is enabled and this is overridden if SPM_MM=1.
After: ENABLE_SPM=1 enables the SPCI-based implementation. SPM_MM=1 enables the MM-based implementation. The two build flags are mutually exclusive.
Note that the name of the ENABLE_SPM flag remains a bit ambiguous - this will be improved in a subsequent patch. For this patch the intention was to leave the name as-is so that it is easier to track the changes that were made.
Change-Id: I8e64ee545d811c7000f27e8dc8ebb977d670608a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
show more ...
|
| b8e17967 | 20-Dec-2019 |
György Szing <gyorgy.szing@arm.com> |
Merge changes from topic "bs/pmf32" into integration
* changes: pmf: Make the runtime instrumentation work on AArch32 SiP: Don't validate entrypoint if state switch is impossible |