1# 2# Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv3 driver on the FVP by default 8FVP_USE_GIC_DRIVER := FVP_GICV3 9 10# Use the SP804 timer instead of the generic one 11FVP_USE_SP804_TIMER := 0 12 13# Use fconf based io for FVP 14ifeq ($(BL2_AT_EL3), 0) 15USE_FCONF_BASED_IO := 1 16endif 17 18# Default cluster count for FVP 19FVP_CLUSTER_COUNT := 2 20 21# Default number of CPUs per cluster on FVP 22FVP_MAX_CPUS_PER_CLUSTER := 4 23 24# Default number of threads per CPU on FVP 25FVP_MAX_PE_PER_CPU := 1 26 27FVP_DT_PREFIX := fvp-base-gicv3-psci 28 29$(eval $(call assert_boolean,FVP_USE_SP804_TIMER)) 30$(eval $(call add_define,FVP_USE_SP804_TIMER)) 31 32# The FVP platform depends on this macro to build with correct GIC driver. 33$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 34 35# Pass FVP_CLUSTER_COUNT to the build system. 36$(eval $(call add_define,FVP_CLUSTER_COUNT)) 37 38# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 39$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 40 41# Pass FVP_MAX_PE_PER_CPU to the build system. 42$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 43 44# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 45# choose the CCI driver , else the CCN driver 46ifeq ($(FVP_CLUSTER_COUNT), 0) 47$(error "Incorrect cluster count specified for FVP port") 48else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 49FVP_INTERCONNECT_DRIVER := FVP_CCI 50else 51FVP_INTERCONNECT_DRIVER := FVP_CCN 52endif 53 54$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 55 56FVP_GICV3_SOURCES := drivers/arm/gic/common/gic_common.c \ 57 drivers/arm/gic/v3/gicv3_main.c \ 58 drivers/arm/gic/v3/gicv3_helpers.c \ 59 plat/common/plat_gicv3.c \ 60 plat/arm/common/arm_gicv3.c 61 62# Choose the GIC sources depending upon the how the FVP will be invoked 63ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 64FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 65 drivers/arm/gic/v3/gic500.c 66else ifeq (${FVP_USE_GIC_DRIVER},FVP_GIC600) 67FVP_GIC_SOURCES := ${FVP_GICV3_SOURCES} \ 68 drivers/arm/gic/v3/gic600.c 69else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 70FVP_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 71 drivers/arm/gic/v2/gicv2_main.c \ 72 drivers/arm/gic/v2/gicv2_helpers.c \ 73 plat/common/plat_gicv2.c \ 74 plat/arm/common/arm_gicv2.c 75 76FVP_DT_PREFIX := fvp-base-gicv2-psci 77else 78$(error "Incorrect GIC driver chosen on FVP port") 79endif 80 81ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 82FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 83else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 84FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 85 plat/arm/common/arm_ccn.c 86else 87$(error "Incorrect CCN driver chosen on FVP port") 88endif 89 90FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 91 plat/arm/board/fvp/fvp_security.c \ 92 plat/arm/common/arm_tzc400.c 93 94 95PLAT_INCLUDES := -Iplat/arm/board/fvp/include 96 97 98PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 99 100FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 101 102ifeq (${ARCH}, aarch64) 103 104# select a different set of CPU files, depending on whether we compile for 105# hardware assisted coherency cores or not 106ifeq (${HW_ASSISTED_COHERENCY}, 0) 107# Cores used without DSU 108 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 109 lib/cpus/aarch64/cortex_a53.S \ 110 lib/cpus/aarch64/cortex_a57.S \ 111 lib/cpus/aarch64/cortex_a72.S \ 112 lib/cpus/aarch64/cortex_a73.S 113else 114# Cores used with DSU only 115 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 116 # AArch64-only cores 117 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 118 lib/cpus/aarch64/cortex_a76ae.S \ 119 lib/cpus/aarch64/cortex_a77.S \ 120 lib/cpus/aarch64/neoverse_n1.S \ 121 lib/cpus/aarch64/neoverse_e1.S \ 122 lib/cpus/aarch64/neoverse_zeus.S \ 123 lib/cpus/aarch64/cortex_hercules.S \ 124 lib/cpus/aarch64/cortex_hercules_ae.S \ 125 lib/cpus/aarch64/cortex_a65.S \ 126 lib/cpus/aarch64/cortex_a65ae.S 127 endif 128 # AArch64/AArch32 cores 129 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 130 lib/cpus/aarch64/cortex_a75.S 131endif 132 133else 134FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S 135endif 136 137BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 138 drivers/arm/sp805/sp805.c \ 139 drivers/delay_timer/delay_timer.c \ 140 drivers/io/io_semihosting.c \ 141 lib/semihosting/semihosting.c \ 142 lib/semihosting/${ARCH}/semihosting_call.S \ 143 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 144 plat/arm/board/fvp/fvp_bl1_setup.c \ 145 plat/arm/board/fvp/fvp_err.c \ 146 plat/arm/board/fvp/fvp_io_storage.c \ 147 ${FVP_CPU_LIBS} \ 148 ${FVP_INTERCONNECT_SOURCES} 149 150ifeq (${FVP_USE_SP804_TIMER},1) 151BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 152else 153BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 154endif 155 156 157BL2_SOURCES += drivers/arm/sp805/sp805.c \ 158 drivers/io/io_semihosting.c \ 159 lib/utils/mem_region.c \ 160 lib/semihosting/semihosting.c \ 161 lib/semihosting/${ARCH}/semihosting_call.S \ 162 plat/arm/board/fvp/fvp_bl2_setup.c \ 163 plat/arm/board/fvp/fvp_err.c \ 164 plat/arm/board/fvp/fvp_io_storage.c \ 165 plat/arm/common/arm_nor_psci_mem_protect.c \ 166 ${FVP_SECURITY_SOURCES} 167 168 169 170ifeq (${BL2_AT_EL3},1) 171BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 172 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 173 ${FVP_CPU_LIBS} \ 174 ${FVP_INTERCONNECT_SOURCES} 175endif 176 177ifeq (${FVP_USE_SP804_TIMER},1) 178BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 179endif 180 181BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 182 ${FVP_SECURITY_SOURCES} 183 184ifeq (${FVP_USE_SP804_TIMER},1) 185BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 186endif 187 188BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 189 drivers/arm/smmu/smmu_v3.c \ 190 drivers/delay_timer/delay_timer.c \ 191 drivers/cfi/v2m/v2m_flash.c \ 192 lib/utils/mem_region.c \ 193 plat/arm/board/fvp/fvp_bl31_setup.c \ 194 plat/arm/board/fvp/fvp_pm.c \ 195 plat/arm/board/fvp/fvp_topology.c \ 196 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 197 plat/arm/common/arm_nor_psci_mem_protect.c \ 198 ${FVP_CPU_LIBS} \ 199 ${FVP_GIC_SOURCES} \ 200 ${FVP_INTERCONNECT_SOURCES} \ 201 ${FVP_SECURITY_SOURCES} 202 203ifeq (${FVP_USE_SP804_TIMER},1) 204BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 205else 206BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 207endif 208 209# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 210ifdef UNIX_MK 211FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 212FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 213 ${PLAT}_fw_config.dts \ 214 ${PLAT}_soc_fw_config.dts \ 215 ${PLAT}_nt_fw_config.dts \ 216 ) 217 218FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 219FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 220FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 221 222ifeq (${SPD},tspd) 223FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 224FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 225 226# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 227$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config)) 228endif 229 230# Add the TB_FW_CONFIG to FIP and specify the same to certtool 231$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config)) 232# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 233$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config)) 234# Add the NT_FW_CONFIG to FIP and specify the same to certtool 235$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config)) 236 237FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 238$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 239 240# Add the HW_CONFIG to FIP and specify the same to certtool 241$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config)) 242endif 243 244# Enable Activity Monitor Unit extensions by default 245ENABLE_AMU := 1 246 247# Enable dynamic mitigation support by default 248DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 249 250# Enable reclaiming of BL31 initialisation code for secondary cores 251# stacks for FVP. However, don't enable reclaiming for clang. 252ifneq (${RESET_TO_BL31},1) 253ifeq ($(findstring clang,$(notdir $(CC))),) 254RECLAIM_INIT_CODE := 1 255endif 256endif 257 258ifeq (${ENABLE_AMU},1) 259BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 260 lib/cpus/aarch64/cpuamu_helpers.S 261 262ifeq (${HW_ASSISTED_COHERENCY}, 1) 263BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 264 lib/cpus/aarch64/neoverse_n1_pubsub.c 265endif 266endif 267 268ifeq (${RAS_EXTENSION},1) 269BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 270endif 271 272ifneq (${ENABLE_STACK_PROTECTOR},0) 273PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 274endif 275 276ifeq (${ARCH},aarch32) 277 NEED_BL32 := yes 278endif 279 280# Enable the dynamic translation tables library. 281ifeq (${ARCH},aarch32) 282 ifeq (${RESET_TO_SP_MIN},1) 283 BL32_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 284 endif 285else # if AArch64 286 ifeq (${RESET_TO_BL31},1) 287 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 288 endif 289 ifeq (${SPD},trusty) 290 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 291 endif 292endif 293 294ifeq (${USE_DEBUGFS},1) 295 BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1 296endif 297 298# Add support for platform supplied linker script for BL31 build 299$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 300 301ifneq (${BL2_AT_EL3}, 0) 302 override BL1_SOURCES = 303endif 304 305include plat/arm/board/common/board_common.mk 306include plat/arm/common/arm_common.mk 307 308ifeq (${TRUSTED_BOARD_BOOT}, 1) 309BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 310BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 311# FVP being a development platform, enable capability to disable Authentication 312# dynamically if TRUSTED_BOARD_BOOT is set. 313DYN_DISABLE_AUTH := 1 314endif 315