1 /* 2 * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <common/bl_common.h> 12 #include <common/debug.h> 13 #include <drivers/console.h> 14 #include <lib/debugfs.h> 15 #include <lib/extensions/ras.h> 16 #include <lib/mmio.h> 17 #include <lib/utils.h> 18 #include <lib/xlat_tables/xlat_tables_compat.h> 19 #include <plat/arm/common/plat_arm.h> 20 #include <plat/common/platform.h> 21 #include <platform_def.h> 22 23 /* 24 * Placeholder variables for copying the arguments that have been passed to 25 * BL31 from BL2. 26 */ 27 static entry_point_info_t bl32_image_ep_info; 28 static entry_point_info_t bl33_image_ep_info; 29 30 #if !RESET_TO_BL31 31 /* 32 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page 33 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2. 34 */ 35 CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows); 36 #endif 37 38 /* Weak definitions may be overridden in specific ARM standard platform */ 39 #pragma weak bl31_early_platform_setup2 40 #pragma weak bl31_platform_setup 41 #pragma weak bl31_plat_arch_setup 42 #pragma weak bl31_plat_get_next_image_ep_info 43 44 #define MAP_BL31_TOTAL MAP_REGION_FLAT( \ 45 BL31_START, \ 46 BL31_END - BL31_START, \ 47 MT_MEMORY | MT_RW | MT_SECURE) 48 #if RECLAIM_INIT_CODE 49 IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE); 50 IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END); 51 52 #define MAP_BL_INIT_CODE MAP_REGION_FLAT( \ 53 BL_INIT_CODE_BASE, \ 54 BL_INIT_CODE_END \ 55 - BL_INIT_CODE_BASE, \ 56 MT_CODE | MT_SECURE) 57 #endif 58 59 #if SEPARATE_NOBITS_REGION 60 #define MAP_BL31_NOBITS MAP_REGION_FLAT( \ 61 BL31_NOBITS_BASE, \ 62 BL31_NOBITS_LIMIT \ 63 - BL31_NOBITS_BASE, \ 64 MT_MEMORY | MT_RW | MT_SECURE) 65 66 #endif 67 /******************************************************************************* 68 * Return a pointer to the 'entry_point_info' structure of the next image for the 69 * security state specified. BL33 corresponds to the non-secure image type 70 * while BL32 corresponds to the secure image type. A NULL pointer is returned 71 * if the image does not exist. 72 ******************************************************************************/ 73 struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type) 74 { 75 entry_point_info_t *next_image_info; 76 77 assert(sec_state_is_valid(type)); 78 next_image_info = (type == NON_SECURE) 79 ? &bl33_image_ep_info : &bl32_image_ep_info; 80 /* 81 * None of the images on the ARM development platforms can have 0x0 82 * as the entrypoint 83 */ 84 if (next_image_info->pc) 85 return next_image_info; 86 else 87 return NULL; 88 } 89 90 /******************************************************************************* 91 * Perform any BL31 early platform setup common to ARM standard platforms. 92 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 93 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be 94 * done before the MMU is initialized so that the memory layout can be used 95 * while creating page tables. BL2 has flushed this information to memory, so 96 * we are guaranteed to pick up good data. 97 ******************************************************************************/ 98 void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config, 99 uintptr_t hw_config, void *plat_params_from_bl2) 100 { 101 /* Initialize the console to provide early debug support */ 102 arm_console_boot_init(); 103 104 #if RESET_TO_BL31 105 /* There are no parameters from BL2 if BL31 is a reset vector */ 106 assert(from_bl2 == NULL); 107 assert(plat_params_from_bl2 == NULL); 108 109 # ifdef BL32_BASE 110 /* Populate entry point information for BL32 */ 111 SET_PARAM_HEAD(&bl32_image_ep_info, 112 PARAM_EP, 113 VERSION_1, 114 0); 115 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 116 bl32_image_ep_info.pc = BL32_BASE; 117 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); 118 # endif /* BL32_BASE */ 119 120 /* Populate entry point information for BL33 */ 121 SET_PARAM_HEAD(&bl33_image_ep_info, 122 PARAM_EP, 123 VERSION_1, 124 0); 125 /* 126 * Tell BL31 where the non-trusted software image 127 * is located and the entry state information 128 */ 129 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); 130 131 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); 132 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 133 134 # if ARM_LINUX_KERNEL_AS_BL33 135 /* 136 * According to the file ``Documentation/arm64/booting.txt`` of the 137 * Linux kernel tree, Linux expects the physical address of the device 138 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and 139 * must be 0. 140 */ 141 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE; 142 bl33_image_ep_info.args.arg1 = 0U; 143 bl33_image_ep_info.args.arg2 = 0U; 144 bl33_image_ep_info.args.arg3 = 0U; 145 # endif 146 147 #else /* RESET_TO_BL31 */ 148 149 /* 150 * In debug builds, we pass a special value in 'plat_params_from_bl2' 151 * to verify platform parameters from BL2 to BL31. 152 * In release builds, it's not used. 153 */ 154 assert(((unsigned long long)plat_params_from_bl2) == 155 ARM_BL31_PLAT_PARAM_VAL); 156 157 /* 158 * Check params passed from BL2 should not be NULL, 159 */ 160 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; 161 assert(params_from_bl2 != NULL); 162 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 163 assert(params_from_bl2->h.version >= VERSION_2); 164 165 bl_params_node_t *bl_params = params_from_bl2->head; 166 167 /* 168 * Copy BL33 and BL32 (if present), entry point information. 169 * They are stored in Secure RAM, in BL2's address space. 170 */ 171 while (bl_params != NULL) { 172 if (bl_params->image_id == BL32_IMAGE_ID) 173 bl32_image_ep_info = *bl_params->ep_info; 174 175 if (bl_params->image_id == BL33_IMAGE_ID) 176 bl33_image_ep_info = *bl_params->ep_info; 177 178 bl_params = bl_params->next_params_info; 179 } 180 181 if (bl33_image_ep_info.pc == 0U) 182 panic(); 183 #endif /* RESET_TO_BL31 */ 184 } 185 186 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 187 u_register_t arg2, u_register_t arg3) 188 { 189 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); 190 191 /* 192 * Initialize Interconnect for this cluster during cold boot. 193 * No need for locks as no other CPU is active. 194 */ 195 plat_arm_interconnect_init(); 196 197 /* 198 * Enable Interconnect coherency for the primary CPU's cluster. 199 * Earlier bootloader stages might already do this (e.g. Trusted 200 * Firmware's BL1 does it) but we can't assume so. There is no harm in 201 * executing this code twice anyway. 202 * Platform specific PSCI code will enable coherency for other 203 * clusters. 204 */ 205 plat_arm_interconnect_enter_coherency(); 206 } 207 208 /******************************************************************************* 209 * Perform any BL31 platform setup common to ARM standard platforms 210 ******************************************************************************/ 211 void arm_bl31_platform_setup(void) 212 { 213 /* Initialize the GIC driver, cpu and distributor interfaces */ 214 plat_arm_gic_driver_init(); 215 plat_arm_gic_init(); 216 217 #if RESET_TO_BL31 218 /* 219 * Do initial security configuration to allow DRAM/device access 220 * (if earlier BL has not already done so). 221 */ 222 plat_arm_security_setup(); 223 224 #if defined(PLAT_ARM_MEM_PROT_ADDR) 225 arm_nor_psci_do_dyn_mem_protect(); 226 #endif /* PLAT_ARM_MEM_PROT_ADDR */ 227 228 #endif /* RESET_TO_BL31 */ 229 230 /* Enable and initialize the System level generic timer */ 231 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, 232 CNTCR_FCREQ(0U) | CNTCR_EN); 233 234 /* Allow access to the System counter timer module */ 235 arm_configure_sys_timer(); 236 237 /* Initialize power controller before setting up topology */ 238 plat_arm_pwrc_setup(); 239 240 #if RAS_EXTENSION 241 ras_init(); 242 #endif 243 244 #if USE_DEBUGFS 245 debugfs_init(); 246 #endif /* USE_DEBUGFS */ 247 } 248 249 /******************************************************************************* 250 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM 251 * standard platforms 252 * Perform BL31 platform setup 253 ******************************************************************************/ 254 void arm_bl31_plat_runtime_setup(void) 255 { 256 console_switch_state(CONSOLE_FLAG_RUNTIME); 257 258 /* Initialize the runtime console */ 259 arm_console_runtime_init(); 260 #if RECLAIM_INIT_CODE 261 arm_free_init_memory(); 262 #endif 263 } 264 265 #if RECLAIM_INIT_CODE 266 /* 267 * Zero out and make RW memory used to store image boot time code so it can 268 * be reclaimed during runtime 269 */ 270 void arm_free_init_memory(void) 271 { 272 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE, 273 BL_INIT_CODE_END - BL_INIT_CODE_BASE, 274 MT_RW_DATA); 275 276 if (ret != 0) { 277 ERROR("Could not reclaim initialization code"); 278 panic(); 279 } 280 } 281 #endif 282 283 void __init bl31_platform_setup(void) 284 { 285 arm_bl31_platform_setup(); 286 } 287 288 void bl31_plat_runtime_setup(void) 289 { 290 arm_bl31_plat_runtime_setup(); 291 } 292 293 /******************************************************************************* 294 * Perform the very early platform specific architectural setup shared between 295 * ARM standard platforms. This only does basic initialization. Later 296 * architectural setup (bl31_arch_setup()) does not do anything platform 297 * specific. 298 ******************************************************************************/ 299 void __init arm_bl31_plat_arch_setup(void) 300 { 301 const mmap_region_t bl_regions[] = { 302 MAP_BL31_TOTAL, 303 #if RECLAIM_INIT_CODE 304 MAP_BL_INIT_CODE, 305 #endif 306 #if SEPARATE_NOBITS_REGION 307 MAP_BL31_NOBITS, 308 #endif 309 ARM_MAP_BL_RO, 310 #if USE_ROMLIB 311 ARM_MAP_ROMLIB_CODE, 312 ARM_MAP_ROMLIB_DATA, 313 #endif 314 #if USE_COHERENT_MEM 315 ARM_MAP_BL_COHERENT_RAM, 316 #endif 317 {0} 318 }; 319 320 setup_page_tables(bl_regions, plat_arm_get_mmap()); 321 322 enable_mmu_el3(0); 323 324 arm_setup_romlib(); 325 } 326 327 void __init bl31_plat_arch_setup(void) 328 { 329 arm_bl31_plat_arch_setup(); 330 } 331