Merge "feat(cpus): conform DSU errata to errata framework PCS" into integration

Merge "feat(lib): implement memcpy_s in lib" into integration

refactor(cpus): convert Cortex-A715 to the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_erra

refactor(cpus): convert Cortex-A715 to the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround and checking
sequences remain unchanged and preserve their git blame. Testing was
conducted by:

* Building for release with all errata flags enabled and running script
in change 19136 to compare output of objdump for each errata.
* Manual comparison of disassembly of converted functions with non-
converted functions
* Build for debug with all errata enabled and step through ArmDS
at reset to ensure all functions are entered.

Change-Id: Ib63b6310997d523fa8bd7f867e53fedec66f1e06
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge "fix(cpus): reduce generic_errata_report()'s size" into integration

fix(cpus): reduce generic_errata_report()'s size

For a pretty implementation and straightforward code, the CVE/erratum
dispatching of the errata status reporting was done with a macro,
closely follo

fix(cpus): reduce generic_errata_report()'s size

For a pretty implementation and straightforward code, the CVE/erratum
dispatching of the errata status reporting was done with a macro,
closely following the old code. Unfortunately, this produces a function
that was over a kilobyte in size, which unsurprisingly doesn't fit on
some platforms.

Convert the macro to a proper C function and call it once. Also hide the
errata ordering checking behind the FEATURE_DETECTION flag to further
save space. This functionality is not necessary for most builds.
Development and platform bringup builds, which should find this
functionality useful, are expected to have FEATURE_DETECTION enabled.

This reduces the function to under 600 bytes.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ibf5376a26cbae28d9dc010128452cb3c694a3f78

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feat(lib): implement memcpy_s in lib

To support memcpy_s for better security purpose
to avoid overflowing the dest while copy from src.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-I

feat(lib): implement memcpy_s in lib

To support memcpy_s for better security purpose
to avoid overflowing the dest while copy from src.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I63c3ea6a3e99c10d69be6bce04843c14b0a28a4d

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Merge changes from topic "psci-osi" into integration

* changes:
fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t
fix(sc7280): update pwr_domain_suspend
fix(fvp): update p

Merge changes from topic "psci-osi" into integration

* changes:
fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t
fix(sc7280): update pwr_domain_suspend
fix(fvp): update pwr_domain_suspend

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feat(cpus): conform DSU errata to errata framework PCS

Errata framework expects workarounds to clobber x0 to x8 and checker
functions to clobber x0-x4.

Update DSU errata functions to adhere to the

feat(cpus): conform DSU errata to errata framework PCS

Errata framework expects workarounds to clobber x0 to x8 and checker
functions to clobber x0-x4.

Update DSU errata functions to adhere to the standard, which is documented
here: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19295.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: Ie0e492473ab8b2bee4335b6b1db00796fabdd59d

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Merge changes from topic "bk/clearups" into integration

* changes:
chore(rme): add make rule for SPD=spmd
chore(bl1): remove redundant bl1_arch_next_el_setup
chore(docs): remove control regist

Merge changes from topic "bk/clearups" into integration

* changes:
chore(rme): add make rule for SPD=spmd
chore(bl1): remove redundant bl1_arch_next_el_setup
chore(docs): remove control register setup section
chore(pauth): remove redundant pauth_disable_el3() call

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chore(fconf): rename last occurences of set_fw_config_info()

set_fw_config_info() interface got renamed into set_config_info() as
part of commit f441718936a6b72583d03eebf8057bbf29446989 ("lib/fconf:

chore(fconf): rename last occurences of set_fw_config_info()

set_fw_config_info() interface got renamed into set_config_info() as
part of commit f441718936a6b72583d03eebf8057bbf29446989 ("lib/fconf:
Update 'set_fw_config_info' function"). Rename a few left-overs of the
old name.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Change-Id: I119719cd7f3ba544e0c4c438e5341d35c7b5bdc2

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Merge "chore: rename Makalu to Cortex-A715" into integration

feat(xlat): detect 4KB and 16KB page support when FEAT_LPA2 is present

At the moment, TF-A does not need to access VAs or PAs larger than
48 bits, so this patch just enables proper detection of supp

feat(xlat): detect 4KB and 16KB page support when FEAT_LPA2 is present

At the moment, TF-A does not need to access VAs or PAs larger than
48 bits, so this patch just enables proper detection of support
for 4KB and 16KB granularity with 52 bits address support.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Iccebbd5acc21f09dbb234ef21a802300e290ec18

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Merge "fix(measured-boot): don't strip last non-0 char" into integration

fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t

This patch adds a new optional member `pwr_domain_validate_suspend` to
the `plat_psci_ops_t` structure that allows a platform t

fix(psci): add optional pwr_domain_validate_suspend to plat_psci_ops_t

This patch adds a new optional member `pwr_domain_validate_suspend` to
the `plat_psci_ops_t` structure that allows a platform to optionally
perform platform specific validations in OS-initiated mode. This is
conditionally compiled into the build depending on the value of the
`PSCI_OS_INIT_MODE` build option.

In https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/17682,
the return type of the `pwr_domain_suspend` handler was updated from
`void` to `int` to allow a platform to optionally perform platform
specific validations in OS-initiated mode. However, when an error code
other than `PSCI_E_SUCCESS` is returned, the current exit path does not
undo the operations in `psci_suspend_to_pwrdown_start`, and as a result,
the system ends up in an unexpected state.

The fix in this patch prevents the need to undo the operations in
`psci_suspend_to_pwrdown_start`, by allowing the platform to first
perform any necessary platform specific validations before the PSCI
generic code proceeds to the point of no return where the CPU_SUSPEND
request is expected to complete successfully.

Change-Id: I05d92c7ea3f5364da09af630d44d78252185db20
Signed-off-by: Wing Li <wingers@google.com>

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fix(measured-boot): don't strip last non-0 char

With the current implementation of stripping the last null
byte from a string, there was no way to get the TF-M measured
boot test suite to pass. It w

fix(measured-boot): don't strip last non-0 char

With the current implementation of stripping the last null
byte from a string, there was no way to get the TF-M measured
boot test suite to pass. It would expect the size of the string
passed into extend measurement to be unaffected by the call.

This fix should allow passing a string with the null char
pre-stripped, allowing the tests to exclude the null char in
their test data and not have the length decremented.

Further, This patch adds an early exit if either the version
or sw_type is larger than its buffer. Without this check,
it may be possible to pass a length one more than the maximum,
and if the last element is a null, the length will be truncated
to fit. This is instead suppsed to return an error.

Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>
Change-Id: I98e1bb53345574d4645513009883c6e7b6612531

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chore: rename Makalu to Cortex-A715

Change-Id: I017c955cb643e2befb6b01e1b5a07c22172b08b9
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

feat(cpus): add a way to automatically report errata

Using the errata framework per-cpu data structure, errata can all be
reported automatically through a single standard errata reporter which
can r

feat(cpus): add a way to automatically report errata

Using the errata framework per-cpu data structure, errata can all be
reported automatically through a single standard errata reporter which
can replace the cpu-specific ones.

This reporter can also enforce the ordering requirement of errata.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I7d2d5ac5bcb9d21aed0d560d7d23919a323ffdab

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refactor(cpus): convert print_errata_status to C

The function is called in a fully initialised C environment and calls
into other C functions. The Aarch differences are minimal and are hidden
by the

refactor(cpus): convert print_errata_status to C

The function is called in a fully initialised C environment and calls
into other C functions. The Aarch differences are minimal and are hidden
by the pre-existing headers. Converting it results into cleaner code
that is the same across both Aarch64 and Aarch32.

To avoid having to do very ugly pointer arithmetic, define a C struct
for the cpu_ops for both Aarch64 and Aarch32.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Idc07c4064e03143c88a4a0e2d10ceda70ba19a50

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refactor(cpus): rename errata_report.h to errata.h

The ERRATA_XXX macros, used in cpu_helpers.S, are necessary for the
check_errata_xxx family of functions. The CPU_REV should be used in the
cpu fil

refactor(cpus): rename errata_report.h to errata.h

The ERRATA_XXX macros, used in cpu_helpers.S, are necessary for the
check_errata_xxx family of functions. The CPU_REV should be used in the
cpu files but for whatever reason the values have been hard-coded so far
(at the cost of readability). It's evident this file is not strictly for
status reporting.

The new purpose of this file is to make it a one-stop-shop for all
things errata.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I1ce22dd36df5aa0bcfc5f2772251f91af8703dfb

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refactor(cpus): move cpu_ops field defines to a header

The cpu_macros.S file is loaded with lots of definitions for the cpu_ops
structure. However, since they are defined as .equ directives they are

refactor(cpus): move cpu_ops field defines to a header

The cpu_macros.S file is loaded with lots of definitions for the cpu_ops
structure. However, since they are defined as .equ directives they are
inaccessible for C code. Convert them to #defines, put them into order,
refactor them for readability, and extract them to a separate file to
make this possible.

This has the benefit of removing some Aarch differences and a lot of
duplicate code.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I72861794b6c9131285a9297d5918822ed718b228

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feat(libc): add %c to printf/snprintf

Adds %c support for printf and snprintf to print one character. Required
by most recent MbedTLS 3.4.0.

Change-Id: I4d9b2725127a929d58946353324f99ff22b3b28b
Sig

feat(libc): add %c to printf/snprintf

Adds %c support for printf and snprintf to print one character. Required
by most recent MbedTLS 3.4.0.

Change-Id: I4d9b2725127a929d58946353324f99ff22b3b28b
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>

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feat(compiler-rt): update source files

Update the compiler-rt source files to the tip of the llvm-project [1]
[1]: https://github.com/llvm/llvm-project/commit/d9683a7

Change-Id: Icec9ec73094a2b39b0

feat(compiler-rt): update source files

Update the compiler-rt source files to the tip of the llvm-project [1]
[1]: https://github.com/llvm/llvm-project/commit/d9683a7

Change-Id: Icec9ec73094a2b39b0240fc8253c36e7485d3a98
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>

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chore(libfdt): update to v1.7.0 source files

Update libfdt to source files from v1.7.0 release.
Upstream commit:
https://github.com/dgibson/dtc/commit/039a99414e778332d8f9c04cbd3072e1dcc62798

Chang

chore(libfdt): update to v1.7.0 source files

Update libfdt to source files from v1.7.0 release.
Upstream commit:
https://github.com/dgibson/dtc/commit/039a99414e778332d8f9c04cbd3072e1dcc62798

Change-Id: I7e0475d2ddb819691f476e1753d1c899f8d7c278
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>

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feat(optee): add device tree for coreboot table

This adds creation of a device tree that will be passed to OP-TEE.
Currently that device tree only contains the coreboot table per the
Linux coreboot

feat(optee): add device tree for coreboot table

This adds creation of a device tree that will be passed to OP-TEE.
Currently that device tree only contains the coreboot table per the
Linux coreboot device tree specification. This device tree is then
passed to OP-TEE so it can extract the CBMEM console information from
the coreboot table for logging purposes.

Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com>
Change-Id: I6a26d335e16f7226018c56ad571cca77b81b0f6a

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Merge "fix(psci): do not panic on illegal MPIDR" into integration