fix(cpus): workaround for Neoverse V2 erratum 2801372

Neoverse V2 erratum 2801372 is a Cat B erratum that applies to
all revisions <=r0p1 and is fixed in r0p2. The workaround is to
insert a dsb befo

fix(cpus): workaround for Neoverse V2 erratum 2801372

Neoverse V2 erratum 2801372 is a Cat B erratum that applies to
all revisions <=r0p1 and is fixed in r0p2. The workaround is to
insert a dsb before the isb in the power down sequence.

This errata is explained in SDEN 2332927 available at:
https://developer.arm.com/documentation/SDEN2332927

Change-Id: I8716b9785a67270a72ae329dc49a2f2239dfabff
Signed-off-by: Moritz Fischer <moritzf@google.com>

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refactor(cpus): add Cortex-A17 errata framework information

Change-Id: I19d096edf47c1a9f47e79e9bb95984ce2102fad4
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

fix(fvp): resolve broken workaround reference

The workaround for CVE 2015-5715 was renamed many years ago, however,
Cortex-A17 and A9 didn't see this change.

Change-Id: I553c8b09543263bca2a34eaef67

fix(fvp): resolve broken workaround reference

The workaround for CVE 2015-5715 was renamed many years ago, however,
Cortex-A17 and A9 didn't see this change.

Change-Id: I553c8b09543263bca2a34eaef670af0424999cfe
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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refactor(cpus): reorder Neoverse-N1 .S file

Moving neoverse_n1_disable_speculative_loads function before reset
function to maintain git blame with refactor to new framework.

Change-Id: I79a4de9955a

refactor(cpus): reorder Neoverse-N1 .S file

Moving neoverse_n1_disable_speculative_loads function before reset
function to maintain git blame with refactor to new framework.

Change-Id: I79a4de9955a6f37e289456a743b946c0c4c8c27f
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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refactor(cpus): convert Neoverse-E1 to framework

For E1, this involves replacing:
- The reset_func with the standard cpu_reset_func_{start,end}
to apply errata automatically
- The <cpu>_erra

refactor(cpus): convert Neoverse-E1 to framework

For E1, this involves replacing:
- The reset_func with the standard cpu_reset_func_{start,end}
to apply errata automatically
- The <cpu>_errata_report with the errata_report_shim to
report errata automatically
And for the E1 DSU erratum, creating symbolic names to the already
existing errata workaround functions to get them registered under
the Errata Framework.

Testing was conducted by:
- Manual comparison of disassembly of converted functions with non-
converted functions:

aarch64-none-elf-objdump -D
<trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D
<trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

- Build for debug with all errata enabled and step through ArmDS
to ensure all functions are entered and the path remains the same
as before conversion to the new framework.

Change-Id: I0a059574948badbd108333344286c76aeb142e71
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

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Merge changes from topic "kc/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A75 to use cpu helpers
refactor(cpus): convert the Cortex-A75 to use the errata frame

Merge changes from topic "kc/errata_refactor" into integration

* changes:
refactor(cpus): convert the Cortex-A75 to use cpu helpers
refactor(cpus): convert the Cortex-A75 to use the errata framework

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Merge changes from topic "gr/cpu_rename" into integration

* changes:
chore: rename hayes to a520
chore: rename hunter to a720
chore: rename hunter_elp to cortex-x4

chore: rename hayes to a520

Rename Cortex-hayes to Cortes-A520

Change-Id: Ic574b55b1aaf11b5bf7b583e244245e7b54bdb22
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

chore: rename hunter to a720

Rename cortex_hunter to cortex_a720

Change-Id: Id4e0e2cd47051c2e92b3f16373ea06ef4df1d75f
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

chore: rename hunter_elp to cortex-x4

Rename hunter_elp to cortex-x4

Change-Id: I78c8c009d7bee14b4793dc1d950ed81273216831
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

Merge changes from topic "ms/cpu_errata" into integration

* changes:
refactor(cpus): add Cortex-A72 errata information
refactor(cpus): convert Rainier to use errata framework
refactor(cpus): c

Merge changes from topic "ms/cpu_errata" into integration

* changes:
refactor(cpus): add Cortex-A72 errata information
refactor(cpus): convert Rainier to use errata framework
refactor(cpus): convert QEMU Max to use the errata framework

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refactor(cpus): convert the Cortex-A75 to use cpu helpers

Testing done in conjunction with change 258152.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I9082c7a5c68e39d6e419

refactor(cpus): convert the Cortex-A75 to use cpu helpers

Testing done in conjunction with change 258152.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I9082c7a5c68e39d6e419c2a00501d63895ca73c7

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refactor(cpus): convert the Cortex-A75 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cp

refactor(cpus): convert the Cortex-A75 to use the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround sequences remain
unchanged and preserve their git blame.

Testing was conducted by:
* Building for release with all errata flags enabled and running script
in change 19136 to compare output of objdump for each errata. Only
ERRATA_A75_764081 and ERRATA_A75_790748 could be verified this way,
rest had to be manually verified.
* Manual comparison of disassembly of converted functions with non-
converted functions

aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/fvp/release/bl31/bl31.elf
vs
aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf

* Build for release with all errata flags enabled and run default tftf
tests

CROSS_COMPILE=aarch64-none-elf- make PLAT=fvp HW_ASSISTED_COHERENCY=1 \
USE_COHERENT_MEM=0 CTX_INCLUDE_AARCH32_REGS=1 \
BL33=/home/katcap01/tf-a-tests/build/fvp/debug/tftf.bin \
ERRATA_A75_764081=1 ERRATA_A75_790748=1 WORKAROUND_CVE_2017_5715=1 \
WORKAROUND_CVE_2018_3639=1 \
ERRATA_DSU_798953=1 ERRATA_DSU_936184=1 \
WORKAROUND_CVE_2022_23960=1 \
fip all

* Build for debug with all errata enabled and step through ArmDS
at reset to ensure all functions are entered.
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I0cd393db825fcb5c7ddea3aa2a5934ffc4b6046e

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feat(cpus): add support for hermes cpu

Adding basic CPU library code to support the Hermes CPU.

Change-Id: I61946033fe5fafb56ceb2d14d4c796d85b30457e
Signed-off-by: Govindraj Raja <govindraj.raja@ar

feat(cpus): add support for hermes cpu

Adding basic CPU library code to support the Hermes CPU.

Change-Id: I61946033fe5fafb56ceb2d14d4c796d85b30457e
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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refactor(cpus): add Cortex-A72 errata information

* adds add_erratum_etnry for all described erratas.
* replaces errata_report function with errata_report_shim to report
errata automatically

Change

refactor(cpus): add Cortex-A72 errata information

* adds add_erratum_etnry for all described erratas.
* replaces errata_report function with errata_report_shim to report
errata automatically

Change-Id: I7e3315d5cc77b77c328fff7f3988ec588b8f88b9
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>

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refactor(cpus): convert Rainier to use errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_r

refactor(cpus): convert Rainier to use errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
as well as specifically related to single errata for this CPU:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

Change-Id: I31cacbbdd4caa12b32e2c65ec456b0ab6b1a9101
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>

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refactor(cpus): convert QEMU Max to use the errata framework

This involves replacing:
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically.

Change-Id: I78b65052dcfc1

refactor(cpus): convert QEMU Max to use the errata framework

This involves replacing:
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically.

Change-Id: I78b65052dcfc1f29b7dec443bd0aaf67d0efb4eb
Signed-off-by: Maksims Svecovs <maksims.svecovs@arm.com>

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refactor(cpus): add Cortex-A32 errata framework information

Replace errata_report with errata_report_shim.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I5a43b0985f070f88747

refactor(cpus): add Cortex-A32 errata framework information

Replace errata_report with errata_report_shim.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: I5a43b0985f070f887474120eb8f5f7c01ba4af5f

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Merge "feat(cpus): conform DSU errata to errata framework PCS" into integration

refactor(cpus): convert Cortex-A715 to the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_erra

refactor(cpus): convert Cortex-A715 to the errata framework

This involves replacing:
* the reset_func with the standard cpu_reset_func_{start,end} to apply
errata automatically
* the <cpu>_errata_report with the errata_report_shim to report errata
automatically
...and for each erratum:
* the prologue with the workaround_<type>_start to do the checks and
framework registration automatically
* the epilogue with the workaround_<type>_end
* the checker function with the check_erratum_<type> to make it more
descriptive

It is important to note that the errata workaround and checking
sequences remain unchanged and preserve their git blame. Testing was
conducted by:

* Building for release with all errata flags enabled and running script
in change 19136 to compare output of objdump for each errata.
* Manual comparison of disassembly of converted functions with non-
converted functions
* Build for debug with all errata enabled and step through ArmDS
at reset to ensure all functions are entered.

Change-Id: Ib63b6310997d523fa8bd7f867e53fedec66f1e06
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(cpus): reduce generic_errata_report()'s size

For a pretty implementation and straightforward code, the CVE/erratum
dispatching of the errata status reporting was done with a macro,
closely follo

fix(cpus): reduce generic_errata_report()'s size

For a pretty implementation and straightforward code, the CVE/erratum
dispatching of the errata status reporting was done with a macro,
closely following the old code. Unfortunately, this produces a function
that was over a kilobyte in size, which unsurprisingly doesn't fit on
some platforms.

Convert the macro to a proper C function and call it once. Also hide the
errata ordering checking behind the FEATURE_DETECTION flag to further
save space. This functionality is not necessary for most builds.
Development and platform bringup builds, which should find this
functionality useful, are expected to have FEATURE_DETECTION enabled.

This reduces the function to under 600 bytes.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: Ibf5376a26cbae28d9dc010128452cb3c694a3f78

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feat(cpus): conform DSU errata to errata framework PCS

Errata framework expects workarounds to clobber x0 to x8 and checker
functions to clobber x0-x4.

Update DSU errata functions to adhere to the

feat(cpus): conform DSU errata to errata framework PCS

Errata framework expects workarounds to clobber x0 to x8 and checker
functions to clobber x0-x4.

Update DSU errata functions to adhere to the standard, which is documented
here: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19295.

Signed-off-by: Kathleen Capella <kathleen.capella@arm.com>
Change-Id: Ie0e492473ab8b2bee4335b6b1db00796fabdd59d

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Merge "chore: rename Makalu to Cortex-A715" into integration

chore: rename Makalu to Cortex-A715

Change-Id: I017c955cb643e2befb6b01e1b5a07c22172b08b9
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

feat(cpus): add a way to automatically report errata

Using the errata framework per-cpu data structure, errata can all be
reported automatically through a single standard errata reporter which
can r

feat(cpus): add a way to automatically report errata

Using the errata framework per-cpu data structure, errata can all be
reported automatically through a single standard errata reporter which
can replace the cpu-specific ones.

This reporter can also enforce the ordering requirement of errata.

Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I7d2d5ac5bcb9d21aed0d560d7d23919a323ffdab

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