Merge "feat(cpufeat): add memory retention bit define for CLUSTERPWRDN" into integration

Merge "refactor(cm): move EL3 registers to global context" into integration

refactor(cm): move EL3 registers to global context

Currently, EL3 context registers are duplicated per-world per-cpu.
Some registers have the same value across all CPUs, so this patch
moves these re

refactor(cm): move EL3 registers to global context

Currently, EL3 context registers are duplicated per-world per-cpu.
Some registers have the same value across all CPUs, so this patch
moves these registers out into a per-world context to reduce
memory usage.

Change-Id: I91294e3d5f4af21a58c23599af2bdbd2a747c54a
Signed-off-by: Elizabeth Ho <elizabeth.ho@arm.com>
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

show more ...

Merge "feat(rmm): update RMI VERSION command as per EAC5" into integration

feat(rmm): update RMI VERSION command as per EAC5

This patch adds necessary support for RMI_VERSION command.
This patch sets RMI version numbers to 1.0 as per
RMM Specification 1.0-eac5.

Change-Id:

feat(rmm): update RMI VERSION command as per EAC5

This patch adds necessary support for RMI_VERSION command.
This patch sets RMI version numbers to 1.0 as per
RMM Specification 1.0-eac5.

Change-Id: If7f88d5b5efa58716752488108fa110fc71ae836
Signed-off-by: Shruti Gupta <shruti.gupta@arm.com>

show more ...

Merge changes from topic "mb/cov-fix" into integration

* changes:
fix(tbbr): guard defines under MBEDTLS_CONFIG_FILE
refactor(tbbr): enforce compile-time error for invalid algorithm selection

Merge changes from topic "gpt_updates" into integration

* changes:
refactor(arm): use gpt_partition_init
feat(partition): add interface to init gpt
refactor(partition): convert warn to verbose

Merge changes from topic "gpt_updates" into integration

* changes:
refactor(arm): use gpt_partition_init
feat(partition): add interface to init gpt
refactor(partition): convert warn to verbose
feat(partition): add support to use backup GPT header
refactor(partition): get GPT header location from MBR
feat(arm): add IO policy to use backup gpt header
feat(tbbr): add image id for backup GPT

show more ...

Merge "feat(cpus): add support for Travis CPU" into integration

feat(partition): add interface to init gpt

Current interface 'partition_init' accepts parameter image_id
and returns no value. But the entire partition driver is build
only to parse and handle GPT p

feat(partition): add interface to init gpt

Current interface 'partition_init' accepts parameter image_id
and returns no value. But the entire partition driver is build
only to parse and handle GPT partitions, so add new interface
gpt_partition_init which would return failure to platform code
if it fails to parse the image.

Change-Id: Iaf574d2ad01a15d0723c1475290c31dc4a078835
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

feat(partition): add support to use backup GPT header

Currently we just use primary GPT header which is located in second
entry after MBR header, but if this block is corrupted or CRC
mismatch occur

feat(partition): add support to use backup GPT header

Currently we just use primary GPT header which is located in second
entry after MBR header, but if this block is corrupted or CRC
mismatch occurs we could try to use the backup GPT header located at
LBAn and GPT entries following this from LBA-33.

Add suitable warning messages before returning any errors to identify
the cause of issue.

Change-Id: I0018ae9eafbacb683a18784d2c8bd917c70f50e1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

refactor(partition): get GPT header location from MBR

GPT header is located in first LBA after MBR entry and mbr header has
details of beginning of first entry, so use mbr header entry first_lba
dat

refactor(partition): get GPT header location from MBR

GPT header is located in first LBA after MBR entry and mbr header has
details of beginning of first entry, so use mbr header entry first_lba
data to locate GPT header rather than GPT_HEADER_OFFSET.

GPT header size is available in gpt_header, so use that
rather than using DEFAULT_GPT_HEADER_SIZE.

The location of GPT entries is available once we parse gpt_header
and is available as partitiona_lba use that to load gpt_entries rather
than GPT_ENTRY_OFFSET.

Change-Id: I3c11f8cc9d4b0b1778a37fe342fb845ea4a4eff1
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

feat(tbbr): add image id for backup GPT

Add image identifier to access backup-GPT header and entry,
when we fail to get primary GPT header.

Currently we use only the primary gpt header, But we plan

feat(tbbr): add image id for backup GPT

Add image identifier to access backup-GPT header and entry,
when we fail to get primary GPT header.

Currently we use only the primary gpt header, But we plan to
use backup GPT header in case our primary GPT header fails
verification or is corrupted.

Change-Id: I12eedd5d2a5cda21c64254d461d09d400d4edb30
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

show more ...

feat(cpus): add support for Travis CPU

Adding basic CPU library code to support Travis CPU

Change-Id: I3c85e9fab409325d213978888a8f6d6949291258
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.

feat(cpus): add support for Travis CPU

Adding basic CPU library code to support Travis CPU

Change-Id: I3c85e9fab409325d213978888a8f6d6949291258
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

show more ...

fix(tbbr): guard defines under MBEDTLS_CONFIG_FILE

Several platforms, such as NXP platforms, employ Trusted Boot support
without relying on MBEDTLS_CONFIG. This patch addresses the build
issues that

fix(tbbr): guard defines under MBEDTLS_CONFIG_FILE

Several platforms, such as NXP platforms, employ Trusted Boot support
without relying on MBEDTLS_CONFIG. This patch addresses the build
issues that arose on such platforms as a result of recent change
c1ec23dd60 [1].

[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/23730

Change-Id: Idfbeeafb8a30dc15bb0060beb5b17819a8807084
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...

refactor(tbbr): enforce compile-time error for invalid algorithm selection

Enforced compile-time error on invalid algorithm selection.

Change-Id: I517aa11c9fa9fda49483f95587f43529085c9d5d
Signed-of

refactor(tbbr): enforce compile-time error for invalid algorithm selection

Enforced compile-time error on invalid algorithm selection.

Change-Id: I517aa11c9fa9fda49483f95587f43529085c9d5d
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

show more ...

Merge "fix(arm): fix GIC macros for GICv4.1 support" into integration

fix(arm): fix GIC macros for GICv4.1 support

Newer platforms such as Neoverse V2 with GICv4.1 will report
0x3 instead of 0x1 in ID_AA64PFR0_EL1.

Update the logic to not accidentially take the GICv2

fix(arm): fix GIC macros for GICv4.1 support

Newer platforms such as Neoverse V2 with GICv4.1 will report
0x3 instead of 0x1 in ID_AA64PFR0_EL1.

Update the logic to not accidentially take the GICv2 path
when printing the GIC registers.

Change-Id: Ia0d546cc5dcaa0dcad49a75b5921b0df5e176d34
Signed-off-by: Moritz Fischer <moritzf@google.com>

show more ...

fix(mpam): refine MPAM initialization and enablement process

Restricts MPAM to only NS world and enables trap to EL3 for access of
MPAM registers from lower ELs of Secure and Realm world.

This patc

fix(mpam): refine MPAM initialization and enablement process

Restricts MPAM to only NS world and enables trap to EL3 for access of
MPAM registers from lower ELs of Secure and Realm world.

This patch removes MPAM enablement from global context and adds it to
EL3 State context which enables/disables MPAM during world switches.
Renamed ENABLE_MPAM_FOR_LOWER_ELS to ENABLE_FEAT_MPAM and
removed mpam_init_el3() as RESET behaviour is trapping.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I131f9dba5df236a71959b2d425ee11af7f3c38c4

show more ...

feat(fvp): new SiP call to set an interrupt pending

This patch introduces an SiP SMC call for FVP platform to set an
interrupt pending. This is needed for testing purposes.

Change-Id: I3dc68ffbec36

feat(fvp): new SiP call to set an interrupt pending

This patch introduces an SiP SMC call for FVP platform to set an
interrupt pending. This is needed for testing purposes.

Change-Id: I3dc68ffbec36d90207c30571dc1fa7ebfb75046e
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

refactor(arm): allow platform specific SiP support

This patch introduces handler to add support for SiP calls to be
handled at EL3 for Arm platforms.

Consequently, the support for SPMD LSP is moved

refactor(arm): allow platform specific SiP support

This patch introduces handler to add support for SiP calls to be
handled at EL3 for Arm platforms.

Consequently, the support for SPMD LSP is moved to corresponding
Arm platform SiP source file. This will allow us to add support
for a new SiP call in subsequent patch.

Change-Id: Ie29cb57fc622f96be3b67bebf34ce37cc82947d8
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

refactor(arm): remove ARM_ROTPK_KEY_LEN comparison

Removing ARM_ROTPK_KEY_LEN definition and comparison in full key .S
files since there is little value in comparing the defined value with a
static

refactor(arm): remove ARM_ROTPK_KEY_LEN comparison

Removing ARM_ROTPK_KEY_LEN definition and comparison in full key .S
files since there is little value in comparing the defined value with a
static size. This becomes more maintenance than value addition.

Removing defines no longer required and general clean up of .S full key
files.

Change-Id: Id286b7078ab9e190e37a43804e2a8d1b0934c235
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

show more ...

feat(arm): ecdsa p384/p256 full key support

Add full key support for ECDSA P384 and P256.

New .S files and p384 pem file created along with new
plat_get_rotpk_info() flag ARM_ROTPK_DEVEL_FULL_DEV_E

feat(arm): ecdsa p384/p256 full key support

Add full key support for ECDSA P384 and P256.

New .S files and p384 pem file created along with new
plat_get_rotpk_info() flag ARM_ROTPK_DEVEL_FULL_DEV_ECDSA_KEY_ID.

Change-Id: I578b257eca41070bb4f4791ef429f2b8a66b1eb3
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

show more ...

feat(tbbr): update PK_DER_LEN for ECDSA P-384 keys

Adding the PK_DER_LEN option for 384 key size when adding ECDSA P384 key
support

Change-Id: I0f19aebad20d1c552976dc3c22ed396d79614769
Signed-off-b

feat(tbbr): update PK_DER_LEN for ECDSA P-384 keys

Adding the PK_DER_LEN option for 384 key size when adding ECDSA P384 key
support

Change-Id: I0f19aebad20d1c552976dc3c22ed396d79614769
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

show more ...

feat(auth): ecdsa p384 key support

Use KEY_SIZE 384 to enable ECDSA P384 key support by
setting MBEDTLS_ECP_DP_SECP384R1_ENABLED.

Selected by setting KEY_ALG=ecdsa and KEY_SIZE=384.

Change-Id: I38

feat(auth): ecdsa p384 key support

Use KEY_SIZE 384 to enable ECDSA P384 key support by
setting MBEDTLS_ECP_DP_SECP384R1_ENABLED.

Selected by setting KEY_ALG=ecdsa and KEY_SIZE=384.

Change-Id: I382f34fc4da98f166a2aada5d16fdf44632b47f5
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>

show more ...

feat(arm): reuse SPM_MM specific defines for SPMC_AT_EL3

For EL3 SPMC configuration enabled platforms, allow the reuse of
SPM_MM specific definitions.

Signed-off-by: Sayanta Pattanayak <sayanta.pat

feat(arm): reuse SPM_MM specific defines for SPMC_AT_EL3

For EL3 SPMC configuration enabled platforms, allow the reuse of
SPM_MM specific definitions.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: Ia24b97343c7b8c6b22a4d54c5bb9cee2c480241f

show more ...