| f09852c9 | 10-Mar-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge changes from topic "sb/dualroot" into integration
* changes: plat/arm: Pass cookie argument down to arm_get_rotpk_info() plat/arm: Add support for dualroot CoT plat/arm: Provide some PRO
Merge changes from topic "sb/dualroot" into integration
* changes: plat/arm: Pass cookie argument down to arm_get_rotpk_info() plat/arm: Add support for dualroot CoT plat/arm: Provide some PROTK files for development
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| 2be57b86 | 15-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
TBB: Add an IO abstraction layer to load encrypted firmwares
TBBR spec advocates for optional encryption of firmwares (see optional requirement: R060_TBBR_FUNCTION). So add an IO abstaction layer to
TBB: Add an IO abstraction layer to load encrypted firmwares
TBBR spec advocates for optional encryption of firmwares (see optional requirement: R060_TBBR_FUNCTION). So add an IO abstaction layer to support firmware decryption that can be stacked above any underlying IO/ packaging layer like FIP etc. It aims to provide a framework to load any encrypted IO payload.
Also, add plat_get_enc_key_info() to be implemented in a platform specific manner as handling of encryption key may vary from one platform to another.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I9892e0ddf00ebecb8981301dbfa41ea23e078b03
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| 7cda17bb | 15-Nov-2019 |
Sumit Garg <sumit.garg@linaro.org> |
drivers: crypto: Add authenticated decryption framework
Add framework for autheticated decryption of data. Currently this patch optionally imports mbedtls library as a backend if build option "DECRY
drivers: crypto: Add authenticated decryption framework
Add framework for autheticated decryption of data. Currently this patch optionally imports mbedtls library as a backend if build option "DECRYPTION_SUPPORT = aes_gcm" is set to perform authenticated decryption using AES-GCM algorithm.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Change-Id: I2966f0e79033151012bf4ffc66f484cd949e7271
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| cb3b5344 | 25-Feb-2020 |
Manish Pandey <manish.pandey2@arm.com> |
SPMD: loading Secure Partition payloads
This patch implements loading of Secure Partition packages using existing framework of loading other bl images.
The current framework uses a statically defin
SPMD: loading Secure Partition payloads
This patch implements loading of Secure Partition packages using existing framework of loading other bl images.
The current framework uses a statically defined array to store all the possible image types and at run time generates a link list and traverse through it to load different images.
To load SPs, a new array of fixed size is introduced which will be dynamically populated based on number of SPs available in the system and it will be appended to the loadable images list.
Change-Id: I8309f63595f2a71b28a73b922d20ccba9c4f6ae4 Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
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| 7cd64d19 | 23-Jan-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
fconf: Add Secure Partitions information as property
Use the firmware configuration framework to retrieve information about Secure Partitions to facilitate loading them into memory.
To load a SP im
fconf: Add Secure Partitions information as property
Use the firmware configuration framework to retrieve information about Secure Partitions to facilitate loading them into memory.
To load a SP image we need UUID look-up into FIP and the load address where it needs to be loaded in memory.
This patch introduces a SP populator function which gets UUID and load address from firmware config device tree and updates its C data structure.
Change-Id: I17faec41803df9a76712dcc8b67cadb1c9daf8cd Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
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| 24038137 | 28-Feb-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I75f6d135,I4add470e,I0ecd3a2b,I67a63d73 into integration
* changes: board/rddaniel: intialize tzc400 controllers plat/arm/tzc: add support to configure multiple tzc400 plat/arm:
Merge changes I75f6d135,I4add470e,I0ecd3a2b,I67a63d73 into integration
* changes: board/rddaniel: intialize tzc400 controllers plat/arm/tzc: add support to configure multiple tzc400 plat/arm: allow boards to specify second DRAM Base address plat/arm: allow boards to define PLAT_ARM_TZC_FILTERS
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| 60e8f3cf | 07-Nov-2019 |
Petre-Ionut Tudor <petre-ionut.tudor@arm.com> |
Read-only xlat tables for BL31 memory
This patch introduces a build flag which allows the xlat tables to be mapped in a read-only region within BL31 memory. It makes it much harder for someone who h
Read-only xlat tables for BL31 memory
This patch introduces a build flag which allows the xlat tables to be mapped in a read-only region within BL31 memory. It makes it much harder for someone who has acquired the ability to write to arbitrary secure memory addresses to gain control of the translation tables.
The memory attributes of the descriptors describing the tables themselves are changed to read-only secure data. This change happens at the end of BL31 runtime setup. Until this point, the tables have read-write permissions. This gives a window of opportunity for changes to be made to the tables with the MMU on (e.g. reclaiming init code). No changes can be made to the tables with the MMU turned on from this point onwards. This change is also enabled for sp_min and tspd.
To make all this possible, the base table was moved to .rodata. The penalty we pay is that now .rodata must be aligned to the size of the base table (512B alignment). Still, this is better than putting the base table with the higher level tables in the xlat_table section, as that would cost us a full 4KB page.
Changing the tables from read-write to read-only cannot be done with the MMU on, as the break-before-make sequence would invalidate the descriptor which resolves the level 3 page table where that very descriptor is located. This would make the translation required for writing the changes impossible, generating an MMU fault.
The caches are also flushed.
Signed-off-by: Petre-Ionut Tudor <petre-ionut.tudor@arm.com> Change-Id: Ibe5de307e6dc94c67d6186139ac3973516430466
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| 88005701 | 06-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
plat/arm: Pass cookie argument down to arm_get_rotpk_info()
The cookie will be leveraged in the next commit.
Change-Id: Ie8bad275d856d84c27466461cf815529dd860446 Signed-off-by: Sandrine Bailleux <s
plat/arm: Pass cookie argument down to arm_get_rotpk_info()
The cookie will be leveraged in the next commit.
Change-Id: Ie8bad275d856d84c27466461cf815529dd860446 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 4ed16765 | 04-Feb-2020 |
Suyash Pathak <suyash.pathak@arm.com> |
plat/arm/tzc: add support to configure multiple tzc400
For platforms that have two or more TZC400 controllers instantiated, allow the TZC400 driver to be usable with all those instances. This is ach
plat/arm/tzc: add support to configure multiple tzc400
For platforms that have two or more TZC400 controllers instantiated, allow the TZC400 driver to be usable with all those instances. This is achieved by allowing 'arm_tzc400_setup' function to accept the base address of the TZC400 controller.
Change-Id: I4add470e6ddb58432cd066145e644112400ab924 Signed-off-by: Suyash Pathak <suyash.pathak@arm.com>
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| 86f297a3 | 12-Feb-2020 |
Suyash Pathak <suyash.pathak@arm.com> |
plat/arm: allow boards to specify second DRAM Base address
The base address for second DRAM varies across different platforms. So allow platforms to define second DRAM by moving Juno/SGM-775 specifi
plat/arm: allow boards to specify second DRAM Base address
The base address for second DRAM varies across different platforms. So allow platforms to define second DRAM by moving Juno/SGM-775 specific definition of second DRAM base address to Juno/SGM-775 board definition respectively, SGI/RD specific definition of DRAM 2 base address to SGI board definition.
Change-Id: I0ecd3a2bd600b6c7019c7f06f8c452952bd07cae Signed-off-by: Suyash Pathak <suyash.pathak@arm.com>
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| 96318f82 | 06-Feb-2020 |
Suyash Pathak <suyash.pathak@arm.com> |
plat/arm: allow boards to define PLAT_ARM_TZC_FILTERS
A TZC400 can have upto 4 filters and the number of filters instantiated within a TZC400 is platform dependent. So allow platforms to define the
plat/arm: allow boards to define PLAT_ARM_TZC_FILTERS
A TZC400 can have upto 4 filters and the number of filters instantiated within a TZC400 is platform dependent. So allow platforms to define the value of PLAT_ARM_TZC_FILTERS by moving the existing Juno specific definition of PLAT_ARM_TZC_FILTERS to Juno board definitions.
Change-Id: I67a63d7336595bbfdce3163f9a9473e15e266f40 Signed-off-by: Suyash Pathak <suyash.pathak@arm.com>
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| 21c4f56f | 11-Feb-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "lm/fconf" into integration
* changes: arm-io: Panic in case of io setup failure MISRA fix: Use boolean essential type fconf: Add documentation fconf: Move platform
Merge changes from topic "lm/fconf" into integration
* changes: arm-io: Panic in case of io setup failure MISRA fix: Use boolean essential type fconf: Add documentation fconf: Move platform io policies into fconf fconf: Add mbedtls shared heap as property fconf: Add TBBR disable_authentication property fconf: Add dynamic config DTBs info as property fconf: Populate properties from dtb during bl2 setup fconf: Load config dtb from bl1 fconf: initial commit
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| 63aa4094 | 11-Feb-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "spmd" into integration
* changes: SPMD: enable SPM dispatcher support SPMD: hook SPMD into standard services framework SPMD: add SPM dispatcher based upon SPCI Beta 0
Merge changes from topic "spmd" into integration
* changes: SPMD: enable SPM dispatcher support SPMD: hook SPMD into standard services framework SPMD: add SPM dispatcher based upon SPCI Beta 0 spec SPMD: add support to run BL32 in TDRAM and BL31 in secure DRAM on Arm FVP SPMD: add support for an example SPM core manifest SPMD: add SPCI Beta 0 specification header file
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| 64758c97 | 11-Oct-2019 |
Achin Gupta <achin.gupta@arm.com> |
SPMD: add support to run BL32 in TDRAM and BL31 in secure DRAM on Arm FVP
This patch reserves and maps the Trusted DRAM for SPM core execution. It also configures the TrustZone address space control
SPMD: add support to run BL32 in TDRAM and BL31 in secure DRAM on Arm FVP
This patch reserves and maps the Trusted DRAM for SPM core execution. It also configures the TrustZone address space controller to run BL31 in secure DRAM.
Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: I7e1bb3bbc61a0fec6a9cb595964ff553620c21dc
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| 0cb64d01 | 11-Oct-2019 |
Achin Gupta <achin.gupta@arm.com> |
SPMD: add support for an example SPM core manifest
This patch repurposes the TOS FW configuration file as the manifest for the SPM core component which will reside at the secure EL adjacent to EL3.
SPMD: add support for an example SPM core manifest
This patch repurposes the TOS FW configuration file as the manifest for the SPM core component which will reside at the secure EL adjacent to EL3. The SPM dispatcher component will use the manifest to determine how the core component must be initialised. Routines and data structure to parse the manifest have also been added.
Signed-off-by: Achin Gupta <achin.gupta@arm.com> Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: Id94f8ece43b4e05609f0a1d364708a912f6203cb
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| 31e703f9 | 31-Dec-2019 |
Aditya Angadi <aditya.angadi@arm.com> |
drivers/arm/scmi: allow use of multiple SCMI channels
On systems that have multiple platform components that can interpret the SCMI messages, there is a need to support multiple SCMI channels (one e
drivers/arm/scmi: allow use of multiple SCMI channels
On systems that have multiple platform components that can interpret the SCMI messages, there is a need to support multiple SCMI channels (one each to those platform components). Extend the existing SCMI interface that currently supports only a single SCMI channel to support multiple SCMI channels.
Change-Id: Ice4062475b903aef3b5e5bc37df364c9778a62c5 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 6daeec70 | 22-Oct-2019 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
plat/arm/sgi: add chip_id and multi_chip_mode to platform variant info
Multi-chip platforms have two or more identical chips connected using a high speed coherent link. In order to identify such pla
plat/arm/sgi: add chip_id and multi_chip_mode to platform variant info
Multi-chip platforms have two or more identical chips connected using a high speed coherent link. In order to identify such platforms, add chip_id and multi_chip_mode information in the platform variant info structure. The values of these two new elements is populated during boot.
Change-Id: Ie6e89cb33b3f0f408814f6239cd06647053e23ed Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
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| 97399821 | 29-Jan-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
arm-io: Panic in case of io setup failure
Currently, an IO setup failure will be ignored on arm platform release build. Change this to panic instead.
Change-Id: I027a045bce2422b0a0fc4ff9e9d4c6e7bf5
arm-io: Panic in case of io setup failure
Currently, an IO setup failure will be ignored on arm platform release build. Change this to panic instead.
Change-Id: I027a045bce2422b0a0fc4ff9e9d4c6e7bf5d2f98 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| d6dcbcad | 29-Jan-2020 |
Louis Mayencourt <louis.mayencourt@arm.com> |
MISRA fix: Use boolean essential type
Change the return type of "arm_io_is_toc_valid()" and "plat_arm_bl1_fwu_needed()" to bool, to match function behavior.
Change-Id: I503fba211219a241cb263149ef36
MISRA fix: Use boolean essential type
Change the return type of "arm_io_is_toc_valid()" and "plat_arm_bl1_fwu_needed()" to bool, to match function behavior.
Change-Id: I503fba211219a241cb263149ef36ca14e3362a1c Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| 0a6e7e3b | 24-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Move platform io policies into fconf
Use the firmware configuration framework to store the io_policies information inside the configuration device tree instead of the static structure in the
fconf: Move platform io policies into fconf
Use the firmware configuration framework to store the io_policies information inside the configuration device tree instead of the static structure in the code base.
The io_policies required by BL1 can't be inside the dtb, as this one is loaded by BL1, and only available at BL2.
This change currently only applies to FVP platform.
Change-Id: Ic9c1ac3931a4a136aa36f7f58f66d3764c1bfca1 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| 6c972317 | 01-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Add mbedtls shared heap as property
Use the firmware configuration framework in arm dynamic configuration to retrieve mbedtls heap information between bl1 and bl2.
For this, a new fconf gett
fconf: Add mbedtls shared heap as property
Use the firmware configuration framework in arm dynamic configuration to retrieve mbedtls heap information between bl1 and bl2.
For this, a new fconf getter is added to expose the device tree base address and size.
Change-Id: Ifa5ac9366ae100e2cdd1f4c8e85fc591b170f4b6 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| ce852841 | 30-Sep-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Add TBBR disable_authentication property
Use fconf to retrieve the `disable_authentication` property. Move this access from arm dynamic configuration to bl common.
Change-Id: Ibf184a5c6245d0
fconf: Add TBBR disable_authentication property
Use fconf to retrieve the `disable_authentication` property. Move this access from arm dynamic configuration to bl common.
Change-Id: Ibf184a5c6245d04839222f5457cf5e651f252b86 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| 25ac8794 | 17-Dec-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Add dynamic config DTBs info as property
This patch introduces a better separation between the trusted-boot related properties, and the dynamic configuration DTBs loading information.
The dy
fconf: Add dynamic config DTBs info as property
This patch introduces a better separation between the trusted-boot related properties, and the dynamic configuration DTBs loading information.
The dynamic configuration DTBs properties are moved to a new node: `dtb-registry`. All the sub-nodes present will be provided to the dynamic config framework to be loaded. The node currently only contains the already defined configuration DTBs, but can be extended for future features if necessary. The dynamic config framework is modified to use the abstraction provided by the fconf framework, instead of directly accessing the DTBs.
The trusted-boot properties are kept under the "arm,tb_fw" compatible string, but in a separate `tb_fw-config` node. The `tb_fw-config` property of the `dtb-registry` node simply points to the load address of `fw_config`, as the `tb_fw-config` is currently part of the same DTB.
Change-Id: Iceb6c4c2cb92b692b6e28dbdc9fb060f1c46de82 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| 3b5ea741 | 17-Oct-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
fconf: Load config dtb from bl1
Move the loading of the dtb from arm_dym_cfg to fconf. The new loading function is not associated to arm platform anymore, and can be moved to bl_main if wanted.
Cha
fconf: Load config dtb from bl1
Move the loading of the dtb from arm_dym_cfg to fconf. The new loading function is not associated to arm platform anymore, and can be moved to bl_main if wanted.
Change-Id: I847d07eaba36d31d9d3ed9eba8e58666ea1ba563 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| a6ffddec | 06-Dec-2019 |
Max Shvetsov <maksims.svecovs@arm.com> |
Adds option to read ROTPK from registers for FVP
Enables usage of ARM_ROTPK_LOCATION=regs for FVP board. Removes hard-coded developer keys. Instead, setting ARM_ROTPK_LOCATION=devel_* takes keys fro
Adds option to read ROTPK from registers for FVP
Enables usage of ARM_ROTPK_LOCATION=regs for FVP board. Removes hard-coded developer keys. Instead, setting ARM_ROTPK_LOCATION=devel_* takes keys from default directory. In case of ROT_KEY specified - generates a new hash and replaces the original.
Note: Juno board was tested by original feature author and was not tested for this patch since we don't have access to the private key. Juno implementation was moved to board-specific file without changing functionality. It is not known whether byte-swapping is still needed for this platform.
Change-Id: I0fdbaca0415cdcd78f3a388551c2e478c01ed986 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>
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