refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean

Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@

refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean

Improve use and readability.

Change-Id: Ia99fc38287f36c9dd12bfe51352afa5da68c0e47
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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feat(clk): add a minimal clock framework

This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compil

feat(clk): add a minimal clock framework

This is mainly a clock interface with clk_ops callbacks.
Those callbacks are: enable, disable, get_rate, set_parent,
and is_enabled.
This framework is compiled for STM32MP1.

Change-Id: I5119a2aeaf103ceaae7a60d9e423caf0c148d794
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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feat(stm32_gpio): add a function to reset a pin

Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_se

feat(stm32_gpio): add a function to reset a pin

Add set_gpio_reset_cfg() to set a pin in its reset configuration:
analog, no-pull, speed low, and its secure configuration, thanks to
stm32_gpio_is_secure_at_reset().

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e

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Merge changes from topic "mb_critical_data" into integration

* changes:
docs(measured-boot): add a platform function for critical data
feat(fvp): measure critical data

feat(fvp): measure critical data

Implemented a platform function 'plat_mboot_measure_critical_data' to
measure critical data and record its measurement using the Event Log
driver.
'bl2_plat_mboot_fi

feat(fvp): measure critical data

Implemented a platform function 'plat_mboot_measure_critical_data' to
measure critical data and record its measurement using the Event Log
driver.
'bl2_plat_mboot_finish' function invokes this platform function
immediately after populating the critical data.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ia198295c6e07ab26d436eab1ff90df2cf28303af

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refactor(measured-boot): add generic macros for using Crypto library

It doesn't look correct to use mbed TLS defines directly in the Event
Log driver as this driver may use another Crypto library in

refactor(measured-boot): add generic macros for using Crypto library

It doesn't look correct to use mbed TLS defines directly in the Event
Log driver as this driver may use another Crypto library in future.
Hence mbed TLS Crypto dependency on Event Log driver is removed by
introducing generic Crypto defines and uses those in the Event Log
driver to call Crypto functions.
Also, updated mbed TLS glue layer to map these generic Crypto defines
to mbed TLS library defines.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ibc9c751f60cbce4d3f3cf049b7c53b3d05cc6735

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Merge "refactor(measured boot): rename a macro INVALID_ID to EVLOG_INVALID_ID" into integration

feat(drivers/st/uart): add uart driver for STM32MP1

Add a UART/USART driver for STM32 with complete a hardware support;
it used for STM32CubeProgrammer support with even parity.

This driver is not

feat(drivers/st/uart): add uart driver for STM32MP1

Add a UART/USART driver for STM32 with complete a hardware support;
it used for STM32CubeProgrammer support with even parity.

This driver is not used for console, which is already handle
by a simple driver (drivers/st/uart/aarch32/stm32_console.S).

Change-Id: Ia9266e5d177fe7fd09c8a15b81da1a05b1bc8b2d
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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fix(plat/marvell/a3720/uart): do external reset during initialization

Sometimes when changing UART clock from TBG to XTAL, UART HW enters into
some broken state. It does not transit characters from

fix(plat/marvell/a3720/uart): do external reset during initialization

Sometimes when changing UART clock from TBG to XTAL, UART HW enters into
some broken state. It does not transit characters from TX FIFO anymore
and TX FIFO stays always empty. TX FIFO reset does not recover UART HW
from this broken state.

Experiments show that external reset can fix UART HW from this broken
state.

TF-A fatal error handler calls console_a3700_core_init() function to
initialize UART HW. This handler may be called anytime during CPU
runtime, also when kernel is running.

U-Boot or Linux kernel may change UART clock to TBG to achieve higher
baudrates. During initialization, console_a3700_core_init() resets UART
configuration to default settings, which means that it also changes
UART clock from TBG to XTAL.

Do an external reset of UART via North Bridge Peripheral reset register
to prevent this UART hangup.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I8990bce24d1a6fd8ccc47a2cd0a5ff932fcfcf14

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refactor(measured boot): rename a macro INVALID_ID to EVLOG_INVALID_ID

Renamed a macro 'INVALID_ID' to 'EVLOG_INVALID_ID' to avoid its clash
with other macro names and to show it is explicitly used

refactor(measured boot): rename a macro INVALID_ID to EVLOG_INVALID_ID

Renamed a macro 'INVALID_ID' to 'EVLOG_INVALID_ID' to avoid its clash
with other macro names and to show it is explicitly used for Event
Log driver.

Change-Id: Ie4c92b3cd1366d9a59cd6f43221e24734865f427
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge changes from topic "st_usb" into integration

* changes:
fix(drivers/usb): add a optional ops get_other_speed_config_desc
fix(drivers/usb): remove unnecessary cast

fix(drivers/usb): add a optional ops get_other_speed_config_desc

Correctly handle USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION request
in USB driver and support a different result than
USB_DESC_TYPE_CONF

fix(drivers/usb): add a optional ops get_other_speed_config_desc

Correctly handle USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION request
in USB driver and support a different result than
USB_DESC_TYPE_CONFIGURATION with the new optional ops
get_other_speed_config_desc().

The support of this descriptor is optionnal and is only
required when high-speed capable device which can operate at its
other possible speed.

This patch allows to remove the pbuf update in usb_core_get_desc()
and solves an issue on USB re-enumeration on STM32MP15 platform
as the result of get_config_desc() is a const array.
This issue is not see on normal use-case, as the USB enumeration
is only done in ROM code and TF-A reuse the same USB descritors.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I8edcc1e45065ab4e45d48f4bc37b49120674fdb0

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feat(arm_fpga): determine GICR base by probing

When an Arm Ltd GIC (Arm GIC-[567]00) is instantiated with one or more
ITSes, the ITS MMIO frames appear between the distributor and
redistributor addr

feat(arm_fpga): determine GICR base by probing

When an Arm Ltd GIC (Arm GIC-[567]00) is instantiated with one or more
ITSes, the ITS MMIO frames appear between the distributor and
redistributor addresses. This makes the beginning of the redistributor
region dependent on the existence and number of ITSes.

To support various FPGA images, with and without ITSes, probe the
addresses in question, to learn whether they accommodate an ITS or a
redistributor. This can be safely done by looking at the PIDR[01]
registers, which contain an ID code for each region, documented in the
Arm GIC TRMs.

We try to find all ITSes instantiated, and skip either two or four 64K
frames, depending on GICv4.1 support. At some point we will find the
first redistributor; this address we then update in the DTB.

Change-Id: Iefb88c2afa989e044fe0b36b7020b56538c60b07
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(gicv3): introduce GIC component identification

The GIC specification describes ID registers in each GIC register frame
(PIDRx), which can be used to identify a GIC component. The Arm Ltd. GIC
i

feat(gicv3): introduce GIC component identification

The GIC specification describes ID registers in each GIC register frame
(PIDRx), which can be used to identify a GIC component. The Arm Ltd. GIC
implementations use certain ID values to identify the distributor, the
redistributors and other parts like ITSes.

Introduce a function that reads those part number IDs, which are spread
over two registers. The actual numbers are only meaningful in connection
with a certain GIC model, which would need to be checked beforehand, by
the caller.

Change-Id: Ia6ff326a1e8b12664e4637bc8e2683d2b5c7721c
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(drivers/st/usb): add device driver for STM32MP1

Add a device driver for Synopsis DWC2 USB IP of STM32MP15x,
this USB OTG device is only supported in device mode.

Signed-off-by: Patrick Delauna

feat(drivers/st/usb): add device driver for STM32MP1

Add a device driver for Synopsis DWC2 USB IP of STM32MP15x,
this USB OTG device is only supported in device mode.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I90b21f094f6637b85f3ace23a3a3a2f6fd4e0951

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feat(drivers/usb): add a USB device stack

Add a new USB framework to manage an USB device profile (USBD)
based on a peripheral controller driver (PCD).

This USB stack can be use to implement any Un

feat(drivers/usb): add a USB device stack

Add a new USB framework to manage an USB device profile (USBD)
based on a peripheral controller driver (PCD).

This USB stack can be use to implement any Universal Serial Bus Device
Class in TF-A on top of a USB driver defined in the platform.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I7971ec6d952edec3511157a198e6e5359df4346b

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Merge "fix(scmi): relax requirement for exact protocol version" into integration

Merge changes from topic "ufs_patches" into integration

* changes:
fix(ufs): add reset before DME_LINKSTARTUP
refactor(ufs): add retry logic to ufshc_reset
refactor(ufs): reuse ufshc_send_uic_

Merge changes from topic "ufs_patches" into integration

* changes:
fix(ufs): add reset before DME_LINKSTARTUP
refactor(ufs): add retry logic to ufshc_reset
refactor(ufs): reuse ufshc_send_uic_cmd

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Merge changes Id7d4f5df,If82542cc,I0ba80057,I75a443db,Ifa18b4fc, ... into integration

* changes:
feat(nxp/common/ocram): add driver for OCRAM initialization
feat(plat/nxp/common): add EESR regis

Merge changes Id7d4f5df,If82542cc,I0ba80057,I75a443db,Ifa18b4fc, ... into integration

* changes:
feat(nxp/common/ocram): add driver for OCRAM initialization
feat(plat/nxp/common): add EESR register definition
fix(plat/nxp/ls1028a): fix compile error when enable fuse provision
fix(drivers/nxp/sfp): fix compile warning
fix(plat/nxp/ls1028a): define endianness of scfg and gpio
fix(nxp/scfg): fix endianness checking

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fix(ufs): add reset before DME_LINKSTARTUP

This change aims to make the UFS code more robust by performing a
controller reset if linkstartup fails. This idea was borrowed from
Linux's ufshcd_link_st

fix(ufs): add reset before DME_LINKSTARTUP

This change aims to make the UFS code more robust by performing a
controller reset if linkstartup fails. This idea was borrowed from
Linux's ufshcd_link_startup function.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I6b52148d1bf155b11198dc82a39b1120057adaaf

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refactor(ufs): add retry logic to ufshc_reset

This change aims to make the UFS code more robust by adding retry logic
and timeouts to ufshc_reset. We also define a new function
ufshc_hce_enable for

refactor(ufs): add retry logic to ufshc_reset

This change aims to make the UFS code more robust by adding retry logic
and timeouts to ufshc_reset. We also define a new function
ufshc_hce_enable for Host Controller Enable (HCE). The inner and outer
retry pattern is based on Linux's ufshcd_hba_execute_hce function.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I9403a5a25d3ca50af5f2f9a65b774f6a2d7a9626

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refactor(ufs): reuse ufshc_send_uic_cmd

This change aims to make the UFS code more robust by removing asserts
and adding retry logic. We also reduce repetition by reusing
ufshc_send_uic_cmd for DME_

refactor(ufs): reuse ufshc_send_uic_cmd

This change aims to make the UFS code more robust by removing asserts
and adding retry logic. We also reduce repetition by reusing
ufshc_send_uic_cmd for DME_GET and DME_SET commands.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: Id70aa1687d5ca78dc7d47234372255ac5a04a612

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Merge changes from topic "st_fixes" into integration

* changes:
fix(stpmic1): fix power switches activation
fix(stpmic1): update error cases return
refactor(stpmic1): use BIT and GENMASK helpe

Merge changes from topic "st_fixes" into integration

* changes:
fix(stpmic1): fix power switches activation
fix(stpmic1): update error cases return
refactor(stpmic1): use BIT and GENMASK helpers
fix(stm32mp1_clk): keep RTC clock always on
fix(stm32mp1_clk): set other clocks as always on

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fix(scmi): relax requirement for exact protocol version

Currently, for the supported SCMI protocols, the version returned by the SCMI
platform agent must be exactly matching the driver's version (ma

fix(scmi): relax requirement for exact protocol version

Currently, for the supported SCMI protocols, the version returned by the SCMI
platform agent must be exactly matching the driver's version (major version).

The recent change for the required version of Power Domain protocol means that
the platform must return version 2.0. This can be however a limitation in some
cases, where a SCMI-v1.0 platform can still be considered compatible with the
driver supported in firmware.

Relax the protocol version requirement such that any version older than the
one supported by the drivers can still be compatible.

Note: For now this has effect only on Power Domain protocol, as the other
drivers still require the "base" version 1.0.

Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>
Change-Id: I310ae1869c2e952991a8d733f394029ab64087bf

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refactor(measured boot): make measurement strings compliant with SBSG

Made measurement strings compliant to Server Base Security Guide
(SBSG, Arm DEN 0086) hence updated measurement strings for BL32

refactor(measured boot): make measurement strings compliant with SBSG

Made measurement strings compliant to Server Base Security Guide
(SBSG, Arm DEN 0086) hence updated measurement strings for BL32, BL31,
and SCP_BL2 images. As the GPT image is not get measured by BL2 so
removed its measurement string.
Also, namespaced measurement string defines that were looking quite
generic.

Change-Id: Iaa17c0cfeee3d06dc822eff2bd553da23bd99b76
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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