Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration

* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM siz

Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration

* changes:
feat(plat/rcar3): emit RPC status to DT fragment if RPC unlocked
feat(plat/rcar3): add a DRAM size setting for M3N
feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.0
feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB
feat(drivers/rcar3): ddr: add function to judge a DDR rank
fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N
fix(drivers/rcar3): i2c_dvfs: fix I2C operation
fix(drivers/rcar3): fix CPG registers redefinition
fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition
fix(plat/rcar3): generate two memory nodes for larger than 2 GiB channel 0
refactor(plat/rcar3): factor out DT memory node generation
feat(plat/rcar3): add optional support for gzip-compressed BL33

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Merge changes from topic "st_fip_fconf" into integration

* changes:
feat(io_mtd): offset management for FIP usage
feat(nand): count bad blocks before a given offset
feat(plat/st): add helper t

Merge changes from topic "st_fip_fconf" into integration

* changes:
feat(io_mtd): offset management for FIP usage
feat(nand): count bad blocks before a given offset
feat(plat/st): add helper to save boot interface
fix(plat/st): improve DDR get size function
refactor(plat/st): map DDR secure at boot
refactor(plat/st): rework TZC400 configuration

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refactor: moved drivers hdr files to include/drivers/nxp

NXP drivers header files are moved:
- from: drivers/nxp/<xx>/*.h
- to : include/drivers/nxp/<xx>/*.h

To accommodate these changes eac

refactor: moved drivers hdr files to include/drivers/nxp

NXP drivers header files are moved:
- from: drivers/nxp/<xx>/*.h
- to : include/drivers/nxp/<xx>/*.h

To accommodate these changes each drivers makefiles
drivers/nxp/<xx>/xx.mk, are updated.

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: I3979c509724d87e3d631a03dbafda1ee5ef07d21

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refactor(hw_crc32): renamed hw_crc32 to tf_crc32

Renamed hw_crc32 to tf_crc32 to make the file and function
name more generic so that the same name can be used in upcoming
software CRC32 implementat

refactor(hw_crc32): renamed hw_crc32 to tf_crc32

Renamed hw_crc32 to tf_crc32 to make the file and function
name more generic so that the same name can be used in upcoming
software CRC32 implementation.

Change-Id: Idff8f70c50ca700a4328a27b49d5e1f14d2095eb
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fwu): avoid NV counter upgrade in trial run state

Avoided NV counter update when the system is running in
trial run state.

Change-Id: I5da6a6760f8a9faff777f2ff879156e9c3c76726
Signed-off-by: M

feat(fwu): avoid NV counter upgrade in trial run state

Avoided NV counter update when the system is running in
trial run state.

Change-Id: I5da6a6760f8a9faff777f2ff879156e9c3c76726
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(fwu): add FWU driver

Implemented FWU metadata load and verification APIs.
Also, exported below APIs to the platform:
1. fwu_init - Load FWU metadata in a structure. Also, set the
address

feat(fwu): add FWU driver

Implemented FWU metadata load and verification APIs.
Also, exported below APIs to the platform:
1. fwu_init - Load FWU metadata in a structure. Also, set the
addresses of updated components in I/O policy
2. fwu_is_trial_run_state - To detect trial run or regular run
state

Change-Id: I67eeabb52d9275ac83be635306997b7c353727cd
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif" into integration

fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif

A RAS error may be triggered while offline core in OS. Error:
Uncorrected software error in the Distributor, with IERR=9,SERR=f

fix(gicv3): add dsb in both disable and enable function of gicv3_cpuif

A RAS error may be triggered while offline core in OS. Error:
Uncorrected software error in the Distributor, with IERR=9,SERR=f.
Core put to sleep before its Group enables were cleared.

gicv3_cpuif_disable() will be called in offline core flow.
According to GIC architecture version 3 and version 4:
Architectural execution of a DSB instruction guarantees that
the last value written to ICC_IGRPEN0_EL1, ICC_IGRPEN1_EL1,
ICC_IGRPEN1_EL3 or GICC_CTLR.{EnableGrp0, EnableGrp1}is observed
by the associated Redistributor.
An ISB or other context synchronization operation must precede
the DSB to ensure visibility of System register writes.

Signed-off-by: Ming Huang <huangming@linux.alibaba.com>
Change-Id: Iff1475657f401374c761b5e8f2f5b3a4b2040e9d

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fix(drivers/scmi-msg): entry: add weak functions

One platform may not implement all the protocols, to avoid build break
when we not include all the protocols, add weak functions.

Reviewed-by: Jacky

fix(drivers/scmi-msg): entry: add weak functions

One platform may not implement all the protocols, to avoid build break
when we not include all the protocols, add weak functions.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I1485baa2e8f381cb0eede1a7b93ed10e49934971

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feat(drivers/scmi-msg): add power domain protocol

Add SCMI power domain protocol, with POWER_STATE_NOTIFY and
POWER_STATE_CHANGE_REQUESTED_NOTIFY not implemented.

Reviewed-by: Jacky Bai <ping.bai@n

feat(drivers/scmi-msg): add power domain protocol

Add SCMI power domain protocol, with POWER_STATE_NOTIFY and
POWER_STATE_CHANGE_REQUESTED_NOTIFY not implemented.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: Ia7c4db57c4c702667f8eaa630c924016e4a8bde0

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fix(drivers/scmi-msg): smt: fix build for aarch64

For AARCH64, BIT() will make the number as ULL type, let use BIT_32()
here.

And use %zu for size_t print format.

Reviewed-by: Jacky Bai <ping.bai@

fix(drivers/scmi-msg): smt: fix build for aarch64

For AARCH64, BIT() will make the number as ULL type, let use BIT_32()
here.

And use %zu for size_t print format.

Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I1dc18d374cd2c6eb83b40b66ed6189dcc6a21728

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feat(io_mtd): offset management for FIP usage

A new seek handler is also created. It will be used for NAND to add an
extra offset in case of bad blocks, when FIP is used.

Change-Id: I03fb1588b44029

feat(io_mtd): offset management for FIP usage

A new seek handler is also created. It will be used for NAND to add an
extra offset in case of bad blocks, when FIP is used.

Change-Id: I03fb1588b44029db50583c0b2e7af7a1e88a5a7a
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(nand): count bad blocks before a given offset

In case of FIP, the offsets given in the FIP header are relative.
If bad blocks are found between the FIP base address and this offset,
the offset

feat(nand): count bad blocks before a given offset

In case of FIP, the offsets given in the FIP header are relative.
If bad blocks are found between the FIP base address and this offset,
the offset should be updated, taking care of the bad blocks.

Change-Id: I96fefabb583b3d030ab05191bae7d45cfeefe341
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB

Add new board revision for 8GB 1rank of Salvator-XS/H3ULCB

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Si

feat(plat/rcar3): add new board revision for Salvator-XS/H3ULCB

Add new board revision for 8GB 1rank of Salvator-XS/H3ULCB

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I9e0ef7340d92de9c892fc5bd04abe24ad6ee4286

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feat(drivers/rcar3): ddr: add function to judge a DDR rank

This commit adds the function to change the settings used for DDR
initialization depending on the board ID and DDR rank.

Signed-off-by: To

feat(drivers/rcar3): ddr: add function to judge a DDR rank

This commit adds the function to change the settings used for DDR
initialization depending on the board ID and DDR rank.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I94d550cea620748f5b15499fed1b791a69d61592

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fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N

[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.41.

Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Yoshifumi H

fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N

[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.41.

Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Idd2fbea621365d84b566748b5b7d7fb2f0d08168

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fix(drivers/rcar3): i2c_dvfs: fix I2C operation

This commit fixes value to write to the ICCR register according to
the hardware manual.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hi

fix(drivers/rcar3): i2c_dvfs: fix I2C operation

This commit fixes value to write to the ICCR register according to
the hardware manual.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I1f612a482c012a6739e2f31db80224b222df766c

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fix(drivers/rcar3): fix CPG registers redefinition

This commit deletes the value of the redefined CPG register.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by

fix(drivers/rcar3): fix CPG registers redefinition

This commit deletes the value of the redefined CPG register.

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I05cf4a449ae28adb2ddd59593971a7d0cbcb21de

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fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition

emmc_registers.h contains redefinition of
CPG_CPGWPR from bl2_cpg_register.h

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hita

fix(drivers/rcar3): emmc: remove CPG_CPGWPR redefinition

emmc_registers.h contains redefinition of
CPG_CPGWPR from bl2_cpg_register.h

Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Ie13590100df08f32193653e50191e66ed42d2b28

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refactor(measured boot): revisit error handling (3/3)

- In tpm_record_measurement():

The platform layer is responsible for providing an exhaustive list
of images to measure. If it doesn't th

refactor(measured boot): revisit error handling (3/3)

- In tpm_record_measurement():

The platform layer is responsible for providing an exhaustive list
of images to measure. If it doesn't then this should be treated as
a programming error, as documented in [1].

Thus, turn the error test into an assertion.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-guidelines.html#using-assert-to-check-for-programming-errors

Change-Id: I002309c2ebdf2d348a7d12a8f7f9e82465046b8e
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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refactor(measured boot): revisit error handling (2/3)

- In add_event2():

Turn the first error condition checking whether there is room for an
extra event2 data structure into an assertion. The

refactor(measured boot): revisit error handling (2/3)

- In add_event2():

Turn the first error condition checking whether there is room for an
extra event2 data structure into an assertion. The platform layer is
responsible for choosing an appropriate event log buffer size based
on the number of measurements it expects. If this assertion fires,
the platform macro EVENT_LOG_SIZE should be adjusted and the
firmware recompiled.

Call this assumption out in the function documentation.

Also remove the second error condition check, which is a subset of
the first one and thus is redundant.

As a result of these changes, add_event2() can no longer fail. Thus,
change its return type from int to void.

Also, the 'size_of_event' local variable is now unused in release
builds so remove it and move its value into the assertion.

Change-Id: I113fc141de59708b20435a0c7126255561ab7786
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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refactor(measured boot): revisit error handling (1/3)

- In event_log_init():

Throughout the function, we are incrementing a pointer by some fixed
amounts of bytes (corresponding to the size

refactor(measured boot): revisit error handling (1/3)

- In event_log_init():

Throughout the function, we are incrementing a pointer by some fixed
amounts of bytes (corresponding to the size of some data structure or
to some constant number of bytes), there is no variable-size
increments in the picture. Thus it seems pointless to verify that the
pointer has indeed been incremented by this fixed amount of bytes
afterwards.

For this reason, remove these checks altogether. As a result, the
start_ptr local variable is now unused so remove it as well.

Change-Id: I612e2278cd3a63d1417427e45d81e285503f5efe
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

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style(measured boot): fix incorrect indentation

Change-Id: I5b84a28ed254a7c7bb95c18fa999592a4e3f6d90
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge changes from topic "st_fixes" into integration

* changes:
fix(plat/st): correct IO compensation disabling
fix(plat/st): correct BSEC error code management
fix(drivers/st/pmic): missing e

Merge changes from topic "st_fixes" into integration

* changes:
fix(plat/st): correct IO compensation disabling
fix(plat/st): correct BSEC error code management
fix(drivers/st/pmic): missing error check
fix(drivers/st/pmic): initialize i2c_state
fix(drivers/st/clk): use correct return value

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Merge "fix(drivers/mtd): macronix quad enable bit issue" into integration