History log of /rk3399_ARM-atf/drivers/ (Results 776 – 800 of 2101)
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bdc88d2114-Feb-2022 Yann Gautier <yann.gautier@st.com>

fix(tzc400): correct message with filter

As filter is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I9fc9f15774dc974edfa3db65f5aecd1e70

fix(tzc400): correct message with filter

As filter is unsigned, we have to use %u and not %d.
This avoids warning when -Wformat-signedness is enabled.

Change-Id: I9fc9f15774dc974edfa3db65f5aecd1e70bc146b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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ae95b17820-Jan-2022 Jiafei Pan <Jiafei.Pan@nxp.com>

fix(nxp-qspi): fix include path for QSPI driver

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If9322cf2646d3be3391445cb72d338c2d20117a6

2ba3085b11-Feb-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "refactor(measured-boot): cleanup Event Log makefile" into integration

1af59c4508-Feb-2022 Yann Gautier <yann.gautier@st.com>

feat(common): add SZ_* macros

Add the SZ_* macros from 32 to 2G.
This allows removing some defines in raw NAND driver
and STM32MP1 boot device selection code.

Change-Id: I3c4d4959b0f43e785eeb37a43d

feat(common): add SZ_* macros

Add the SZ_* macros from 32 to 2G.
This allows removing some defines in raw NAND driver
and STM32MP1 boot device selection code.

Change-Id: I3c4d4959b0f43e785eeb37a43d03b2906b7fcfbc
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>

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acd0e9bf07-Feb-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(ufs): don't zero out the write buffer" into integration

cd3ea90b03-Feb-2022 Jorge Troncoso <jatron@google.com>

fix(ufs): don't zero out the write buffer

Previously ufs_write_blocks was memsetting the write buffer before
calling ufs_prepare_cmd, causing zeros to be written to UFS. This change
deletes the mems

fix(ufs): don't zero out the write buffer

Previously ufs_write_blocks was memsetting the write buffer before
calling ufs_prepare_cmd, causing zeros to be written to UFS. This change
deletes the memset call so the original buffer contents get written to
UFS.

Signed-off-by: Jorge Troncoso <jatron@google.com>
Change-Id: I3299f11b30e6d7d409408ce11a6759c88607ee18

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812daf9115-Dec-2020 Lionel Debieve <lionel.debieve@st.com>

feat(st): update the security based on new compatible

From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.

Signed-off-

feat(st): update the security based on new compatible

From the new binding, the RCC become secured based on the new
compatible. This must be done only from the secure OS initialisation.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I7f0a62f22bfcca638ddaefc9563df00f89f01653

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992d97c418-Jan-2022 Manish V Badarkhe <Manish.Badarkhe@arm.com>

refactor(measured-boot): cleanup Event Log makefile

The Event Log sources are added to the source-list of BL1 and BL2
images in the Event Log Makefile. It doesn't seem correct since
some platforms o

refactor(measured-boot): cleanup Event Log makefile

The Event Log sources are added to the source-list of BL1 and BL2
images in the Event Log Makefile. It doesn't seem correct since
some platforms only compile Event Log sources for BL2.
Hence, moved compilation decision of Event Log sources to the
platform makefile.

Change-Id: I1cb96e24d6bea5e091d08167f3d1470d22b461cc
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fc0aa10a11-Aug-2020 Yann Gautier <yann.gautier@st.com>

feat(st-gpio): do not apply secure config in BL2

At boot, the devices under ETZPC control are secured, so should be
their GPIOs. As securable GPIOs are secured by default, keep the reset
values in B

feat(st-gpio): do not apply secure config in BL2

At boot, the devices under ETZPC control are secured, so should be
their GPIOs. As securable GPIOs are secured by default, keep the reset
values in BL2.

Change-Id: I9e560d936f8e8fda0f96f6299bb0c3b35ba9b71f
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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53584e1d21-Sep-2021 Fabien Dessenne <fabien.dessenne@foss.st.com>

feat(st-gpio): allow to set a gpio in output mode

Allow to set a gpio in output mode from the device tree.

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Change-Id: Ic483324bc5fe916a6

feat(st-gpio): allow to set a gpio in output mode

Allow to set a gpio in output mode from the device tree.

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Change-Id: Ic483324bc5fe916a60df05f74706bd1da4d08aa5

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417196fa21-Sep-2021 Fabien Dessenne <fabien.dessenne@foss.st.com>

refactor(st-gpio): code improvements

No functional, change, but some improvements:
- Declare set_gpio() as static (only called locally)
- Handle the type ('open-drain') property independently from t

refactor(st-gpio): code improvements

No functional, change, but some improvements:
- Declare set_gpio() as static (only called locally)
- Handle the type ('open-drain') property independently from the
mode one.
- Replace mmio_clrbits_32() + mmio_setbits_32() with
mmio_clrsetbits_32().
- Add a missing log
- Add missing U() in macro definitions

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
Change-Id: I1a79609609ac8e8001127ebefdb81def573f76fa

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884a650631-Jan-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge changes from topic "st-nvmem" into integration

* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes

Merge changes from topic "st-nvmem" into integration

* changes:
feat(stm32mp1): manage monotonic counter
feat(stm32mp1): new way to access platform OTP
feat(stm32mp1-fdts): update NVMEM nodes
refactor(st-drivers): improve BSEC driver
feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions
feat(stm32mp1): add NVMEM layout compatibility definition

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0fc22fcd31-Jan-2022 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

Merge "fix(scmi): add missing \n in ERROR message" into integration

072d753220-May-2019 Nicolas Le Bayon <nicolas.le.bayon@st.com>

refactor(st-drivers): improve BSEC driver

Rename driver file to BSEC2.
Split header file in IP and feature parts.
Add functions to access BSEC scratch register.
Several corrections and improvements.

refactor(st-drivers): improve BSEC driver

Rename driver file to BSEC2.
Split header file in IP and feature parts.
Add functions to access BSEC scratch register.
Several corrections and improvements.
Probe the driver earlier, especially to check debug features.

Change-Id: I1981536398d598d67a19d2d7766dacc18de72ec1
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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9b4ca70d28-Jan-2022 Pascal Paillet <p.paillet@st.com>

feat(st-regulator): add support for regulator-always-on

Add support for regulator-always-on at BL2 level as it was supported
before using the regulator framework.

Signed-off-by: Pascal Paillet <p.p

feat(st-regulator): add support for regulator-always-on

Add support for regulator-always-on at BL2 level as it was supported
before using the regulator framework.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: Idb2f4ddc2fdd4e0d31fb33da87c84618aa2e5135

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0dc9f52a27-Jan-2022 Yann Gautier <yann.gautier@st.com>

fix(scmi): add missing \n in ERROR message

Correct ERROR message in scmi_process_message().

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I55e337a3904045aa188975f6a7ed3e989678f571

24ce8d1327-Jan-2022 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(nxp-drivers): ddr: corrects mapping of HNFs nodes" into integration

591d80c804-Dec-2019 Lionel Debieve <lionel.debieve@st.com>

refactor(st-clock): update STGEN management

Rework STGEN config function, and move it to stm32mp_clkfunc.c file.

Change-Id: I7784a79c486d1b8811f6f8d123e49ea34899e9b6
Signed-off-by: Lionel Debieve <

refactor(st-clock): update STGEN management

Rework STGEN config function, and move it to stm32mp_clkfunc.c file.

Change-Id: I7784a79c486d1b8811f6f8d123e49ea34899e9b6
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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7418cf3917-Jan-2020 Yann Gautier <yann.gautier@st.com>

feat(st-clock): assign clocks to the correct BL

Some clocks are only required in BL2, like boot devices clocks:
FMC, QSPI.
Some clocks are only used in BL32: Timers, devices that need special
care f

feat(st-clock): assign clocks to the correct BL

Some clocks are only required in BL2, like boot devices clocks:
FMC, QSPI.
Some clocks are only used in BL32: Timers, devices that need special
care for independent reset.

Change-Id: Id4ba99afeea5095f419a86f7dc6423192c628d82
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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3d69149a27-Oct-2021 Yann Gautier <yann.gautier@st.com>

feat(st-clock): do not refcount on non-secure clocks in bl32

This change removes reference counting support in clock gating
implementation for clocks that rely on non-secure only RCC resources.
As R

feat(st-clock): do not refcount on non-secure clocks in bl32

This change removes reference counting support in clock gating
implementation for clocks that rely on non-secure only RCC resources.
As RCC registers are accessed straight by non-secure world for these
clocks, secure world cannot safely store the clock state and even
disabling such clock from secure world can jeopardize the non-secure
world clock management framework and drivers.

As a consequence, for such clocks, stm32_clock_enable() forces the clock
ON without any increment of a refcount and stm32_clock_disable() does
not disable the clock.

Change-Id: I0cc159b36a25dbc8676f05edf2668ae63c640537
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>

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aaa09b7127-Oct-2021 Yann Gautier <yann.gautier@st.com>

feat(st-clock): define secure and non-secure gate clocks

Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure u

feat(st-clock): define secure and non-secure gate clocks

Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure upon RCC[TZEN] and RCC[MCKPROT] (MKP) or always accessible
from non-secure (N_S).

At init, lookup clock tree to check if any of the secure clocks
is derived from PLL3 in which case PLL3 shall be secure.

Note that this change does not grow byte size of stm32mp1_clk_gate[].

Change-Id: I933d8a30007f3c72f755aa1ef6d7e6bcfabbfa9e
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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2444d23119-Jan-2022 Yann Gautier <yann.gautier@st.com>

refactor(st-clock): use refcnt instead of secure status

Rework the internal functions __stm32mp1_clk_enable/disable to check for
reference count instead of secure status for a clock.
Some functions

refactor(st-clock): use refcnt instead of secure status

Rework the internal functions __stm32mp1_clk_enable/disable to check for
reference count instead of secure status for a clock.
Some functions now unused can be removed.

Change-Id: Ie4359110d7144229f85c961dcd5a019222c3fd25
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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40b085bd01-Dec-2021 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): simplify the assert to check for fwu init

Simplify the assert to check if the FWU subsystem has been initialised
in the fwu_is_trial_run_state function.

Signed-off-by: Sughosh Ganu <sugh

feat(fwu): simplify the assert to check for fwu init

Simplify the assert to check if the FWU subsystem has been initialised
in the fwu_is_trial_run_state function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I428668470ebd4b67e68777a62d5732cb96841ab9

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9adce87e01-Dec-2021 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(fwu): add a function to pass metadata structure to platforms

Add a helper function to pass the metadata structure to the
platforms. Platforms can then read the metadata structure and pass the
b

feat(fwu): add a function to pass metadata structure to platforms

Add a helper function to pass the metadata structure to the
platforms. Platforms can then read the metadata structure and pass the
boot index value, i.e. the bank(partition) from which the firmware
images were booted, to the Update Agent.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I571179b9baa0fbc4d0f08d7a6e3b50c0c7165c5c

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3cb1065510-Nov-2021 Sughosh Ganu <sughosh.ganu@linaro.org>

feat(partition): add a function to identify a partition by GUID

With the GPT partition scheme, a partition can be identified using
it's UniquePartitionGUID, instead of it's name. Add a function to
i

feat(partition): add a function to identify a partition by GUID

With the GPT partition scheme, a partition can be identified using
it's UniquePartitionGUID, instead of it's name. Add a function to
identify the partition based on this GUID value. This functionality is
useful in identification of a partition whose UniquePartitionGUID
value is known.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I543f794e1f7773f969968a6bce85ecca6f6a1659

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