| 5b111c74 | 12-Jul-2021 |
HE Shushan <shushan.he@st.com> |
fix(stm32mp1_clk): keep RTC clock always on
On battery powered systems the RTC keeps the date/time across system reboot. The RTC clock should not be disabled otherwise the date/time counter gets sto
fix(stm32mp1_clk): keep RTC clock always on
On battery powered systems the RTC keeps the date/time across system reboot. The RTC clock should not be disabled otherwise the date/time counter gets stopped.
Tag RTC clock as always on.
Signed-off-by: HE Shushan <shushan.he@st.com> Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Change-Id: I6455c3c740d2e5add28255eb84f8ebaf2870d9d8
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| bf39318d | 16-Sep-2020 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1_clk): set other clocks as always on
AXI, MPU and MCU clocks are always on, put them in the list in the function clock_is_always_on().
Change-Id: I969a442274d2da6c59636f3293de1c31b4c8e3
fix(stm32mp1_clk): set other clocks as always on
AXI, MPU and MCU clocks are always on, put them in the list in the function clock_is_always_on().
Change-Id: I969a442274d2da6c59636f3293de1c31b4c8e3b1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 602ae2f2 | 28-Feb-2020 |
Gabriel Fernandez <gabriel.fernandez@st.com> |
fix(stm32mp1_clk): fix MPU clock rate
MPUDIV dividers are stored in a constant array, under bit shifts form. They must be used in this way by the clock driver.
Change-Id: If758f7a4048eff956067a10a4
fix(stm32mp1_clk): fix MPU clock rate
MPUDIV dividers are stored in a constant array, under bit shifts form. They must be used in this way by the clock driver.
Change-Id: If758f7a4048eff956067a10a42ab0983a20a000d Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| b8fe48b6 | 19-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
fix(stm32mp1_clk): fix MCU/AXI parent clock
Correct MCU clock parent selector: MCU subsystem clock is derived from clock PLL3_P, not PLL3.
Correct AXI clock parent selector: AXI subsystem clock is
fix(stm32mp1_clk): fix MCU/AXI parent clock
Correct MCU clock parent selector: MCU subsystem clock is derived from clock PLL3_P, not PLL3.
Correct AXI clock parent selector: AXI subsystem clock is derived from clock PLL2_P, not PLL2.
This change also renames MCU clock and AXI clock resources to prevent confusion.
Change-Id: If55618d180e7dce8e4f0977b0e586a6fa8ef28d1 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 288f5cf2 | 31-Aug-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(stm32mp1_clk): update RCC registers file
The file is first generated with the peripheral spirit XML file. And then we add some common definition, to ease driver development.
Change-Id: I4c
refactor(stm32mp1_clk): update RCC registers file
The file is first generated with the peripheral spirit XML file. And then we add some common definition, to ease driver development.
Change-Id: I4c222cf006caf27cda6da044eaf184ce66bb1442 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 373f06be | 02-Sep-2019 |
Lionel Debieve <lionel.debieve@st.com> |
fix(stm32mp1_clk): keep RTCAPB clock always on
Further information such as boot instance are sent over backup registers. In order to guarantee direct access to backup registers in uboot, we will kee
fix(stm32mp1_clk): keep RTCAPB clock always on
Further information such as boot instance are sent over backup registers. In order to guarantee direct access to backup registers in uboot, we will keep the RTC clock enabled.
Change-Id: I16572d422bfebbf39190a87db8046df486ce91c8 Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| cbd2e8a6 | 27-Jul-2021 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
fix(stm32mp1_clk): fix RTC clock rating
When RTC clock source is HSE, the RTCDIV is not taken into account.
Change-Id: I1613b638e8932c03f3349adb01e13f5294a3bf5d Signed-off-by: Gabriel Fernandez <ga
fix(stm32mp1_clk): fix RTC clock rating
When RTC clock source is HSE, the RTCDIV is not taken into account.
Change-Id: I1613b638e8932c03f3349adb01e13f5294a3bf5d Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 25be845e | 08-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32mp1 clocks: fix debug trace on clock enable/disable
Adds missing terminal new line character '\n' to debug traces, fix format as index is an unsigned value and use present tense rather
drivers: stm32mp1 clocks: fix debug trace on clock enable/disable
Adds missing terminal new line character '\n' to debug traces, fix format as index is an unsigned value and use present tense rather than past tense in the printed message.
Change-Id: I88c06ef4d3a11d97ff8e96875a3dd0f58a3c98b6 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 033b6c3a | 08-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32mp1 clocks: enable system clocks during initialization
Enable few system clocks at related BL initialization.
Change-Id: I12b35e8cdc128b993de4a1dc4c6e9d52624dd8d9 Signed-off-by: Etien
drivers: stm32mp1 clocks: enable system clocks during initialization
Enable few system clocks at related BL initialization.
Change-Id: I12b35e8cdc128b993de4a1dc4c6e9d52624dd8d9 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 35848200 | 08-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32mp1 clocks: prevent crash on always on clocks
Oscillators and PLLs are not gated on stm32mp_clk_enable/disable() calls. This change prevents functions to panic when called for such alw
drivers: stm32mp1 clocks: prevent crash on always on clocks
Oscillators and PLLs are not gated on stm32mp_clk_enable/disable() calls. This change prevents functions to panic when called for such always-on clocks. Gating these clocks is out of the scope of this change.
Change-Id: Ie730553dea480b529de942446176db9119587832 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 016af006 | 08-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32mp1 clocks: add RTC as a gateable clock
Adds RTC clock to the list of the supported clocks. This allows stm32mp_clk_*() API functions to enable, disable and set and get rate for the cl
drivers: stm32mp1 clocks: add RTC as a gateable clock
Adds RTC clock to the list of the supported clocks. This allows stm32mp_clk_*() API functions to enable, disable and set and get rate for the clock RTC clock.
Change-Id: I8efc3f00b1f22d1912f59d1846994e9e646d6614 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 8ae08dcd | 08-Dec-2019 |
Etienne Carriere <etienne.carriere@st.com> |
drivers: stm32mp1 clocks: support shifted clock selector bit masks
The current implementation optimizes memory consumed by gateable clock table by storing bit mask and bit shift with 1 byte each. Th
drivers: stm32mp1 clocks: support shifted clock selector bit masks
The current implementation optimizes memory consumed by gateable clock table by storing bit mask and bit shift with 1 byte each. The issue is that register selector bit masks above the 7th LSBit cannot be stored.
This change uses the shift info to shift the mask before it is used, allowing clock selector register bit fields to be spread on the 32 bits of the register as long as the mask fits in 8 contiguous bit at most.
This change is needed to add the RTC clock to the gateable clocks table.
Change-Id: I8a0fbcbf20ea383fb3d712f5064d2d307e44465d Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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