refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE

Now that EARLY_CONSOLE is generic, use it instead of the ST flag.
Remove stm32mp_setup_early_console() calls as it is done in common TF

refactor(st): replace STM32MP_EARLY_CONSOLE with EARLY_CONSOLE

Now that EARLY_CONSOLE is generic, use it instead of the ST flag.
Remove stm32mp_setup_early_console() calls as it is done in common TF-A
code.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Icac29b62a6267303cb5c679d15847c013ead1d23

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feat(console): introduce EARLY_CONSOLE

This is a generic porting of what was done on ST platforms with flag
STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for
plat_setup_early_console(

feat(console): introduce EARLY_CONSOLE

This is a generic porting of what was done on ST platforms with flag
STM32MP_EARLY_CONSOLE. It creates the flag and the prototype for
plat_setup_early_console(). This function depends on platform
implementation. This function call is added at the beginning of each BL
image early setup function.
The patch also introduce an extra log macro: EARLY_ERROR. This can
replace ERROR macro in code that will only be executed before the
default console is enabled, and will do nothing when the EARLY_CONSOLE
is not enabled. This can then save some space in memory.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I77bf0a0c4289b4c7df94e4bfb783a938e05bf023

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Merge "docs(fconf): add TB_FW config bindings" into integration

refactor(docs): restructure min requirements section

The ordering of the setup guide is quite confusing, primarly because the
min requirements section is overly verbose. Reconcile this information
i

refactor(docs): restructure min requirements section

The ordering of the setup guide is quite confusing, primarly because the
min requirements section is overly verbose. Reconcile this information
into a single table, and present the most important information at the
start of the document i.e. how to get the source, and the tools to
compile.

Change-Id: I1c4d708259e152b101c7282dad19e467d6c36519
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(cpus): workaround for Cortex-X4 erratum 2763018

Cortex-X4 erratum 2763018 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.

The workaround is to set bit[47] of CP

fix(cpus): workaround for Cortex-X4 erratum 2763018

Cortex-X4 erratum 2763018 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.

The workaround is to set bit[47] of CPUACTLR3_EL1 register.
Setting this chicken bit might have a small impact on power
and negligible impact on performance.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2432808/latest

Change-Id: Ia188e08c2eb2952923ec72e2a56efdeea836fe1e
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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Merge "fix(cpus): workaround for Cortex-X4 erratum 2740089" into integration

Merge "fix(cpus): workaround for Cortex-A715 erratum 2728106" into integration

docs(mte2): update docs

Add a section under release for capturing and populating
build options that are deprecated and removed.

Various fixes and refactor[1] led to removal of certain MTE
build opt

docs(mte2): update docs

Add a section under release for capturing and populating
build options that are deprecated and removed.

Various fixes and refactor[1] led to removal of certain MTE
build options so capture this part in build-options docs.

[1]: https://review.trustedfirmware.org/q/topic:%22mte_fixes%22

Change-Id: I74a82f6f73f7f1dceea65a295ad2df60301ad838
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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docs: change all occurrences of RSS to RSE

Changes all occurrences of "RSS" and "rss" in the documentation
to "RSE" and "rse".

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia42078f5faa1d

docs: change all occurrences of RSS to RSE

Changes all occurrences of "RSS" and "rss" in the documentation
to "RSE" and "rse".

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia42078f5faa1db331b1e5a35f01faeaf1afacb5f

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docs: rename all 'rss' files to 'rse'

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I93877ebeca1db6ee27dcb5446cc1f1a1e4e56775

docs(fconf): add TB_FW config bindings

Document bindings for TB_FW_CONFIG that are common between platforms.
Since the information this device tree type contains pertains to
firmware specific proper

docs(fconf): add TB_FW config bindings

Document bindings for TB_FW_CONFIG that are common between platforms.
Since the information this device tree type contains pertains to
firmware specific properties, we do not expect that the document will
cover all uses, nor do we promise backward compatiblity.

Change-Id: I0e850c13b77cc62940ab5020a15bf8e503568ed8
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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docs(fvp): restructure FVP platform documentation

The Arm FVP documentation has grown organically over the years. As a
result, it has become a big document, which can be difficult to digest.

Also,

docs(fvp): restructure FVP platform documentation

The Arm FVP documentation has grown organically over the years. As a
result, it has become a big document, which can be difficult to digest.

Also, the organization of some of the sections does not make sense. In
particular, all "Running on the ... FVP" sections live under a section
named "Booting a preloaded kernel image (Base FVP)". To illustrate this,
here is the current table of contents:

Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)
Obtaining the Flattened Device Treesp
Running on the Foundation FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL1 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL1 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to BL1 entrypoint
Running on the AEMv8 Base FVP with reset to BL31 entrypoint
Running on the AEMv8 Base FVP (AArch32) with reset to SP_MIN entrypoint
Running on the Cortex-A57-A53 Base FVP with reset to BL31 entrypoint
Running on the Cortex-A32 Base FVP (AArch32) with reset to SP_MIN entrypoint

This patch breaks down this document in sub-documents, which are now
included from the index file. The table of contents (ToC) reflects the
new documents hierarchy. The depth of the ToC has been reduced to
simplify the index page. Here is what it looks like now:

Arm Fixed Virtual Platforms (FVP)
Fixed Virtual Platform (FVP) Support
Arm FVP Platform Specific Build Options
Running on the Foundation FVP
Running on the AEMv8 Base FVP
Running on the Cortex-A57-A53 Base FVP
Running on the Cortex-A32 Base FVP (AArch32)
Booting Firmware Update images
Booting an EL3 payload
Booting a preloaded kernel image (Base FVP)

Apart from moving information around in separate files, this patch also
makes the following minor changes to the contents:

- Add a brief introduction about FVPs in the index page.
- Change some of the titles names for conciseness.

Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Icb650e0ec2c7a86ccd6e7eea4e16a84c41442c96

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Merge "docs(plat): remove TC1 entry from the deprecation table" into integration

docs(plat): remove TC1 entry from the deprecation table

Since the TC1 platform has been eliminated from the TF-A source code
and CI script repository, updated the deprecation table to remove its
ent

docs(plat): remove TC1 entry from the deprecation table

Since the TC1 platform has been eliminated from the TF-A source code
and CI script repository, updated the deprecation table to remove its
entry.

Change-Id: I93ae03e1f810666e9a6d0c6172a322ff1e960c71
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(cpus): workaround for Cortex-X4 erratum 2740089

Cortex-X4 erratum 2740089 is a Cat B erratum that applies to
all revisions <=r0p1 and is fixed in r0p2. The workaround is to
insert a dsb before t

fix(cpus): workaround for Cortex-X4 erratum 2740089

Cortex-X4 erratum 2740089 is a Cat B erratum that applies to
all revisions <=r0p1 and is fixed in r0p2. The workaround is to
insert a dsb before the isb in the power down sequence.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2432808/latest

Change-Id: I1d0fa4dd383437044a4467591f65a4a8514cabdc
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>

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Merge "fix(docs): typo in the romlib design" into integration

fix(docs): typo in the romlib design

There's a typo in the romlib design document when referring to
the generator script. It should be romlib_generator.py instead
of romlib_generate.py so fixed this

fix(docs): typo in the romlib design

There's a typo in the romlib design document when referring to
the generator script. It should be romlib_generator.py instead
of romlib_generate.py so fixed this typo.

Change-Id: I6db7ee66b13c2b0b9d8511da7e0d1b058366281b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs: decrease the minimum supported OpenSSL

Our code does not preclude the use of versions 1.0.x of OpenSSL.
Instead, we discourage it's use due to security concerns. Update the
documentation to re

docs: decrease the minimum supported OpenSSL

Our code does not preclude the use of versions 1.0.x of OpenSSL.
Instead, we discourage it's use due to security concerns. Update the
documentation to reflect this.

Change-Id: I5c60907337f10b05d5c43b0384247c5d4135db50
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge "docs(build): update GCC to 13.2.Rel1 version" into integration

fix(cpus): workaround for Cortex-A715 erratum 2728106

Cortex-A715 erratum 2728106 is a Cat B(rare) erratum that is present
in revision r0p0, r1p0 and r1p1. It is fixed in r1p2.

The workaround is to

fix(cpus): workaround for Cortex-A715 erratum 2728106

Cortex-A715 erratum 2728106 is a Cat B(rare) erratum that is present
in revision r0p0, r1p0 and r1p1. It is fixed in r1p2.

The workaround is to execute an implementation specific sequence in
the CPU.

SDEN documentation:
https://developer.arm.com/documentation/SDEN2148827/latest

Change-Id: Ic825f9942e7eb13893fdbb44a2090b897758cbc4
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>

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docs(build): update GCC to 13.2.Rel1 version

Updating toolchain to the latest production release version
13.2.Rel1 publicly available on:
https://developer.arm.com/downloads/-/arm-gnu-toolchain-down

docs(build): update GCC to 13.2.Rel1 version

Updating toolchain to the latest production release version
13.2.Rel1 publicly available on:
https://developer.arm.com/downloads/-/arm-gnu-toolchain-downloads

We build TF-A in CI using x86_64 Linux hosted cross toolchains:
---------------------------------------------------------------
* AArch32 bare-metal target (arm-none-eabi)
* AArch64 bare-metal target (aarch64-none-elf)

Change-Id: I9b60728bcb1a48508ccd4fcbe0114b3029509a64
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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docs: clarify build environment prerequisites

Our build system extensively uses syntax and tools that are not natively
supported by Windows shells (i.e., CMD.exe and Powershell). This
dependency nec

docs: clarify build environment prerequisites

Our build system extensively uses syntax and tools that are not natively
supported by Windows shells (i.e., CMD.exe and Powershell). This
dependency necessitates a UNIX-compatible build environment. This commit
updates the prerequisites section in our documentation to reflect this.

Change-Id: Ia7e02d7a335e6c88bbaa0394650f1313cdfd6e40
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge "docs: update release and code freeze dates" into integration

Merge "docs: remove entries of the deleted platforms" into integration

docs: update release and code freeze dates

Change-Id: I850f26a66f017d5290ca4d3d670a7efed527f1ef
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>