feat(bl): add plat handler for image loading

In case of load error, platform may need to try another instance, either
from another storage, or from the same storage in case of PSA FWU. On
MTD device

feat(bl): add plat handler for image loading

In case of load error, platform may need to try another instance, either
from another storage, or from the same storage in case of PSA FWU. On
MTD devices such as NAND, it is required to define backup partitions.
A new function plat_setup_try_img_ops() should be called by platform
code to register handlers (plat_try_images_ops) to manage loading
other images.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ideaecaf296c0037a26fb4e6680f33e507111378a

show more ...

refactor(bl)!: remove unused plat_try_next_boot_source

The plat_try_next_boot_source() API is not used by any upstream platform
and not used by platforms that asked for this API. It is then removed.

refactor(bl)!: remove unused plat_try_next_boot_source

The plat_try_next_boot_source() API is not used by any upstream platform
and not used by platforms that asked for this API. It is then removed.
It will be replaced with a more generic interface in next patch.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I298c7acace8c5efb3c66422d8d9280ecd08e5ade

show more ...

feat(versal2): add support for AMD Versal Gen 2 platform

New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal NET platform. System starts with AMD PLM

feat(versal2): add support for AMD Versal Gen 2 platform

New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal NET platform. System starts with AMD PLM
firmware which loads TF-A(bl31) to memory, which is already configured, and
jumps to it. PLM also prepare handoff structure for TF-A with information
what components were load and flags which indicate which EL level SW should
be started.

Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

feat(rockchip): add RK3566/RK3568 Socs support

RK3566/RK3568 is a Quad-core soc and Cortex-a55 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. su

feat(rockchip): add RK3566/RK3568 Socs support

RK3566/RK3568 is a Quad-core soc and Cortex-a55 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system

Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Change-Id: I8b98a4d07664de26bd6078f63664cbc3d9c1c68c

show more ...

Merge "docs(gpt): update GPT library documentation" into integration

docs(gpt): update GPT library documentation

This patch updates GPT library design documentation
with the changes introduced by patches which add
support for large GPT mappings and configuration of
m

docs(gpt): update GPT library documentation

This patch updates GPT library design documentation
with the changes introduced by patches which add
support for large GPT mappings and configuration of
memory size protected by bitlock.

Change-Id: I1f97fa8f003deb07a5f32b7237c1927581a788c8
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>

show more ...

Merge "feat(stm32mp15): remove OP-TEE shared mem" into integration

Merge changes I710d1780,Ia9a59bde into integration

* changes:
feat(gpt): configure memory size protected by bitlock
feat(gpt): add support for large GPT mappings

feat(stm32mp15): remove OP-TEE shared mem

The flag STM32MP15_OPTEE_RSV_SHM was disabled and mark deprecated.
Remove the corresponding code.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-

feat(stm32mp15): remove OP-TEE shared mem

The flag STM32MP15_OPTEE_RSV_SHM was disabled and mark deprecated.
Remove the corresponding code.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I948af3e1de4b89815c967a63abe64f285c405ecc

show more ...

Merge "docs(changelog): changelog for v2.11 release" into integration

docs(changelog): changelog for v2.11 release

Generated this change-log using below command:
npm run release -- --skip.commit --skip.tag --release-as 2.11.0

Change-Id: I34c7b342549781057da1b18116500

docs(changelog): changelog for v2.11 release

Generated this change-log using below command:
npm run release -- --skip.commit --skip.tag --release-as 2.11.0

Change-Id: I34c7b342549781057da1b18116500f110bc3f5ad
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Signed-off-by: Juan Pablo Conde <JuanPablo.Conde@arm.com>

show more ...

Merge changes from topic "hm/rt-instr" into integration

* changes:
docs(juno): update PSCI instrumentation data
docs(n1sdp): update N1SDP PSCI instrumentation data

docs: move DPE option to experimental section

Since DPE support is experimental, move the build option for
the DPE to the experimental section.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm

docs: move DPE option to experimental section

Since DPE support is experimental, move the build option for
the DPE to the experimental section.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I2e18947d37c52a0151b5ac656098dbae51254956

show more ...

feat(gpt): configure memory size protected by bitlock

This patch adds support in GPT library for configuration
of the memory block size protected by one bit of 'bitlock'
structure. Build option 'RME

feat(gpt): configure memory size protected by bitlock

This patch adds support in GPT library for configuration
of the memory block size protected by one bit of 'bitlock'
structure. Build option 'RME_GPT_BITLOCK_BLOCK' defines the
number of 512MB blocks covered by each bit. This numeric
parameter must be a power of 2 and can take the values from
0 to 512. Setting this value to 0 chooses a single spinlock
for all GPT L1 table entries. The default value is set to 1
which corresponds to 512MB per bit.

Change-Id: I710d178072894a3ef40daebea701f74d19e8a3d7
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>

show more ...

docs(juno): update PSCI instrumentation data

Add the latest instrumentation data as of v2.11-rc0, remove data for
v2.9.

Change-Id: I8c055278d732220a9be88978ed63d27e453b7f2f
Signed-off-by: Harrison

docs(juno): update PSCI instrumentation data

Add the latest instrumentation data as of v2.11-rc0, remove data for
v2.9.

Change-Id: I8c055278d732220a9be88978ed63d27e453b7f2f
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

show more ...

docs(n1sdp): update N1SDP PSCI instrumentation data

Add data for v2.11 release and remove data from v2.9.

Change-Id: Ic960cece6f27993cefebf483c768967bd6f2cad1
Signed-off-by: Harrison Mutai <harriso

docs(n1sdp): update N1SDP PSCI instrumentation data

Add data for v2.11 release and remove data from v2.9.

Change-Id: Ic960cece6f27993cefebf483c768967bd6f2cad1
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

show more ...

docs(maintainers): update the maintainer list for LTS

This patch updates the maintainer list for LTS.

Change-Id: I7942288cd79dd163bebd3397bf908bf29906d59e
Signed-off-by: Bipin Ravi <bipin.ravi@arm.

docs(maintainers): update the maintainer list for LTS

This patch updates the maintainer list for LTS.

Change-Id: I7942288cd79dd163bebd3397bf908bf29906d59e
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>

show more ...

docs(maintainers): add code owners for runtime services module

This patch adds code owners responsible for maintaining source files
related to runtime services functionality in TF-A.

Change-Id: I24

docs(maintainers): add code owners for runtime services module

This patch adds code owners responsible for maintaining source files
related to runtime services functionality in TF-A.

Change-Id: I24fbbfd017f90a4fae2ffbb94c8eb81d0d837f8e
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

docs(maintainers): add missing header files

Few header files are added to the lists tracking code owners of
various modules in TF-A project.

Also remove drivers/nuvoton directory, which does not ex

docs(maintainers): add missing header files

Few header files are added to the lists tracking code owners of
various modules in TF-A project.

Also remove drivers/nuvoton directory, which does not exist, from the list
of files maintained by the corresponding owners.

Change-Id: Iad7ce5b1430965237004c9e76e972a3469d20c9d
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

docs(maintainers): add code owners for context management module

This patch adds code owners responsible for maintaining context
management source files in TF-A.

Change-Id: Idc679a907b8380e81d5fbb1

docs(maintainers): add code owners for context management module

This patch adds code owners responsible for maintaining context
management source files in TF-A.

Change-Id: Idc679a907b8380e81d5fbb129fcb74cea5983c0e
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

docs(maintainers): add code owners for runtime exceptions module

This patch adds code owners responsible for maintaining runtime
exceptions and interrupt management modules in TF-A.

Change-Id: Idb1

docs(maintainers): add code owners for runtime exceptions module

This patch adds code owners responsible for maintaining runtime
exceptions and interrupt management modules in TF-A.

Change-Id: Idb131a2af143097e4d05a285e08ef12cd5d3db2a
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

docs(maintainers): add missing files related to SPMD

Few header files are added to the list maintained by SPMD code owners.
Also, added myself as one of the code owners for SPMD module in TF-A.

Cha

docs(maintainers): add missing files related to SPMD

Few header files are added to the list maintained by SPMD code owners.
Also, added myself as one of the code owners for SPMD module in TF-A.

Change-Id: Ic017cb98013d349702c35837463586d4aae65543
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

docs(maintainers): update missing files related to EL3 SPMC

Few header files are added to the list maintained by EL3 SPMC
code owner.

Also added missing copyright license footer message.

Change-Id

docs(maintainers): update missing files related to EL3 SPMC

Few header files are added to the list maintained by EL3 SPMC
code owner.

Also added missing copyright license footer message.

Change-Id: I72afe4c4e1280ef64610a5efe6d1b0e2c9727bb0
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

show more ...

docs: remove reference to phabricator pages

Phabricator wiki is deprecated, remove TF-A links to this website.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I1255a1513524504636b

docs: remove reference to phabricator pages

Phabricator wiki is deprecated, remove TF-A links to this website.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I1255a1513524504636b9c914f9dacf3c54063196

show more ...

feat(gpt): add support for large GPT mappings

This patch adds support for large GPT mappings using
Contiguous descriptors. The maximum size of supported
contiguous block in MB is defined in RME_GPT_

feat(gpt): add support for large GPT mappings

This patch adds support for large GPT mappings using
Contiguous descriptors. The maximum size of supported
contiguous block in MB is defined in RME_GPT_MAX_BLOCK
build parameter and takes values 0, 2, 32 and 512 and
by default set to 2 in make_helpers/defaults.mk.
Setting RME_GPT_MAX_BLOCK value to 0 disables use of
Contiguous descriptors.
Function gpt_tlbi_by_pa_ll() and its declaration
are removed from lib/aarch64/misc_helpers.S and
include/arch/aarch64/arch_helpers.h, because the
GPT library now uses tlbirpalos_xxx() functions.

Change-Id: Ia9a59bde1741c5666b4ca1de9324e6dfd6f734eb
Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>

show more ...