xref: /rk3399_ARM-atf/docs/glossary.rst (revision 07c2d18f4ef6cd1ce61326e0e85d93abe8f2f4ed)
1Glossary
2========
3
4This glossary provides definitions for terms and abbreviations used in the TF-A
5documentation.
6
7You can find additional definitions in the `Arm Glossary`_.
8
9.. glossary::
10   :sorted:
11
12   AArch32
13      32-bit execution state of the ARMv8 ISA
14
15   AArch64
16      64-bit execution state of the ARMv8 ISA
17
18   AMU
19      Activity Monitor Unit, a hardware monitoring unit introduced by FEAT_AMUv1
20      that exposes CPU core runtime metrics as a set of counter registers.
21
22   API
23      Application Programming Interface
24
25   AT
26      Address Translation
27
28   BTI
29      Branch Target Identification. An Armv8.5 extension providing additional
30      control flow integrity around indirect branches and their targets.
31
32   CoT
33   COT
34      Chain of Trust
35
36   CSS
37      Compute Sub-System
38
39   CVE
40      Common Vulnerabilities and Exposures. A CVE document is commonly used to
41      describe a publicly-known security vulnerability.
42
43   DICE
44      Device Identifier Composition Engine
45
46   DCE
47      DRTM Configuration Environment
48
49   D-CRTM
50      Dynamic Code Root of Trust for Measurement
51
52   DLME
53      Dynamically Launched Measured Environment
54
55   DRTM
56      Dynamic Root of Trust for Measurement
57
58   DPE
59      DICE Protection Environment
60
61   DS-5
62      Arm Development Studio 5
63
64   DSU
65      DynamIQ Shared Unit
66
67   DT
68      Device Tree
69
70   DTB
71      Device Tree Blob
72
73   EL
74      Exception Level
75
76   EHF
77      Exception Handling Framework
78
79   ERRATA_ABI
80      Errata management firmware interface
81
82   FCONF
83      Firmware Configuration Framework
84
85   FDT
86      Flattened Device Tree
87
88   FF-A
89      Firmware Framework for Arm A-profile
90
91   FIP
92      Firmware Image Package
93
94   FVP
95      Fixed Virtual Platform
96
97   FWU
98      FirmWare Update
99
100   GIC
101      Generic Interrupt Controller
102
103   ISA
104      Instruction Set Architecture
105
106   Linaro
107      A collaborative engineering organization consolidating
108      and optimizing open source software and tools for the Arm architecture.
109
110   LSP
111      A logical secure partition managed by SPM
112
113   MMU
114      Memory Management Unit
115
116   MPAM
117      Memory Partitioning And Monitoring. An optional Armv8.4 extension.
118
119   MPMM
120     Maximum Power Mitigation Mechanism, an optional power management mechanism
121     supported by some Arm Armv9-A cores.
122
123   MPIDR
124      Multiprocessor Affinity Register
125
126   MTE
127      Memory Tagging Extension. An optional Armv8.5 extension that enables
128      hardware-assisted memory tagging.
129
130   OEN
131      Owning Entity Number
132
133   OP-TEE
134      Open Portable Trusted Execution Environment. An example of a :term:`TEE`
135
136   OTE
137      Open-source Trusted Execution Environment
138
139   PCR
140      Platform Configuration Register
141
142   PDD
143      Platform Design Document
144
145   PAUTH
146      Pointer Authentication. An optional extension introduced in Armv8.3.
147
148   PMF
149      Performance Measurement Framework
150
151   PSA
152      Platform Security Architecture
153
154   PSR
155     Platform Security Requirements
156
157   PSCI
158      Power State Coordination Interface
159
160   RAS
161      Reliability, Availability, and Serviceability extensions. A mandatory
162      extension for the Armv8.2 architecture and later. An optional extension to
163      the base Armv8 architecture.
164
165   ROT
166      Root of Trust
167
168   SCMI
169      System Control and Management Interface
170
171   SCP
172      System Control Processor
173
174   SDEI
175      Software Delegated Exception Interface
176
177   SDS
178      Shared Data Storage
179
180   SEA
181      Synchronous External Abort
182
183   SiP
184   SIP
185      Silicon Provider
186
187   SMC
188      Secure Monitor Call
189
190   SMCCC
191      :term:`SMC` Calling Convention
192
193   SoC
194      System on Chip
195
196   SP
197      Secure Partition
198
199   SPD
200      Secure Payload Dispatcher
201
202   SPM
203      Secure Partition Manager
204
205   SRTM
206      Static Root of Trust for Measurement
207
208   SSBS
209      Speculative Store Bypass Safe. Introduced in Armv8.5, this configuration
210      bit can be set by software to allow or prevent the hardware from
211      performing speculative operations.
212
213   SVE
214      Scalable Vector Extension
215
216   TBB
217      Trusted Board Boot
218
219   TBBR
220      Trusted Board Boot Requirements
221
222   TCB
223      Trusted Compute Base
224
225   TCG
226      Trusted Computing Group
227
228   TEE
229      Trusted Execution Environment
230
231   TF-A
232      Trusted Firmware-A
233
234   TF-M
235      Trusted Firmware-M
236
237   TLB
238      Translation Lookaside Buffer
239
240   TLK
241      Trusted Little Kernel. A Trusted OS from NVIDIA.
242
243   TPM
244      Trusted Platform Module
245
246   TRNG
247      True Random Number Generator (hardware based)
248
249   TSP
250      Test Secure Payload
251
252   TZC
253      TrustZone Controller
254
255   UBSAN
256      Undefined Behavior Sanitizer
257
258   UEFI
259      Unified Extensible Firmware Interface
260
261   WDOG
262      Watchdog
263
264   XLAT
265      Translation (abbr.). For example, "XLAT table".
266
267.. _`Arm Glossary`: https://developer.arm.com/support/arm-glossary
268