| 6ad67cc8 | 03-Oct-2016 |
David Cunado <david.cunado@arm.com> |
Release v1.3: update change-log.md
Updated change-log.md with summary of changes since release v1.2.
Change-Id: Ia1e18ff4b0da567cf12dfcb53e6317e995100bdf |
| b314c9fa | 12-Oct-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #732 from dp-arm/dp/pmf-doc
PMF: Add documentation |
| 514a94c2 | 08-Sep-2016 |
dp-arm <dimitris.papastamos@arm.com> |
PMF: Add documentation
Add a Performance Measurement Framework (PMF) section to the firmware design document.
Change-Id: I5953bd3b1067501f190164c8827d2b0d8022fc0b Signed-off-by: dp-arm <dimitris.pa
PMF: Add documentation
Add a Performance Measurement Framework (PMF) section to the firmware design document.
Change-Id: I5953bd3b1067501f190164c8827d2b0d8022fc0b Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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| 2c8df7c1 | 12-Oct-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #731 from danh-arm/an/fix-juno-doc
Fix documentation of bootwrapper boot on juno |
| 7486eb04 | 20-Apr-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Fix documentation of bootwrapper boot on juno
The user guide incorrectly claimed that it is possible to load a bootwrapped kernel over JTAG on Juno in the same manner as an EL3 payload. In the EL3 p
Fix documentation of bootwrapper boot on juno
The user guide incorrectly claimed that it is possible to load a bootwrapped kernel over JTAG on Juno in the same manner as an EL3 payload. In the EL3 payload boot flow, some of the platform initialisations in BL2 are modified. In particular, the TZC settings are modified to allow unrestricted access to DRAM. This in turn allows the debugger to access the DRAM and therefore to load the image there.
In the BL33-preloaded boot flow though, BL2 uses the default TZC programming, which prevent access to most of the DRAM from secure state. When execution reaches the SPIN_ON_BL1_EXIT loop, the MMU is disabled and thus DS-5 presumably issues secure access transactions while trying to load the image, which fails.
One way around it is to stop execution at the end of BL2 instead. At this point, the MMU is still enabled and the DRAM is mapped as non-secure memory. Therefore, the debugger is allowed to access this memory in this context and to sucessfully load the bootwrapped kernel in DRAM. The user guide is updated to suggest this alternative method.
Co-Authored-By: Sandrine Bailleux <sandrine.bailleux@arm.com> Signed-off-by: Dan Handley <dan.handley@arm.com>
Change-Id: I537ea1c6d2f96edc06bc3f512e770c748bcabe94
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| c81894d7 | 12-Oct-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #728 from yatharth-arm/yk/AArch32_porting_doc
AArch32: Update firmware-design.md |
| ea68f8c7 | 12-Oct-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #727 from soby-mathew/sm/PSCI_lib_doc
AArch32: Update user-guide and add DTBs |
| 5e21d795 | 14-Sep-2016 |
Soby Mathew <soby.mathew@arm.com> |
AArch32: Update user-guide and add DTBs
This patch adds necessary updates for building and running Trusted Firmware for AArch32 to user-guide.md. The instructions for running on both `FVP_Base_AEMv8
AArch32: Update user-guide and add DTBs
This patch adds necessary updates for building and running Trusted Firmware for AArch32 to user-guide.md. The instructions for running on both `FVP_Base_AEMv8A-AEMv8A` in AArch32 mode and `FVP_Base_Cortex-A32x4` models are added. The device tree files for AArch32 Linux kernel are also added in the `fdts` folder.
Change-Id: I0023b6b03e05f32637cb5765fdeda8c8df2d0d3e
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| 9a3236ea | 24-Aug-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Update firmware-design.md
This patch updates the firmware-design.md for AArch32 related changes.
Change-Id: Idf392a44861ab9c1f59f3de4f3435f508b17c678 |
| ec2653a7 | 11-Oct-2016 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Docs: Rename duplicate title in porting guide
Fix one of the two titles that ended up being the same, although both describe different things.
Change-Id: I66ecf369643709898ee4c014659d8f85c0480643 |
| 9e534b20 | 03-Aug-2016 |
Soby Mathew <soby.mathew@arm.com> |
Docs: Add the PSCI library integration guide
This patch adds the PSCI library integration guide for AArch32 ARMv8-A systems `psci-lib-integration-guide.md` to the documentation. The patch also adds
Docs: Add the PSCI library integration guide
This patch adds the PSCI library integration guide for AArch32 ARMv8-A systems `psci-lib-integration-guide.md` to the documentation. The patch also adds appropriate reference to the new document in the `firmware-design.md` document.
Change-Id: I2d5b5c6b612452371713399702e318e3c73a8ee0
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| bfd92513 | 27-Sep-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #718 from sandrine-bailleux-arm/sb/update-deps-v1.3
Upgrade Linaro release, FVPs and mbed TLS versions |
| 605a4fc7 | 23-Sep-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Upgrade Linaro release, FVPs and mbed TLS versions
This patch updates the User Guide to recommend the latest version of some of the software dependencies of ARM Trusted Firmware.
- Upgrade Linaro
Upgrade Linaro release, FVPs and mbed TLS versions
This patch updates the User Guide to recommend the latest version of some of the software dependencies of ARM Trusted Firmware.
- Upgrade Linaro release: 16.02 -> 16.06
- Upgrade FVPs - Foundation v8 FVP: 9.5 -> 10.1 - Base FVPs: 7.6 -> 7.7
- Upgrade mbed TLS library: 2.2.0 -> 2.2.1
Note that the latest release of mbed TLS as of today is 2.3.0 but it has compilations issues with the set of library configuration options that Trusted Firmware uses. 2.2.1 is the next most recent release known to build with TF.
This patch also fixes the markdown formatting of a link in the User Guide.
Change-Id: Ieb7dd336f4d3110fba060afec4ad580ae707a8f1
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| 1a0a3f06 | 28-Jun-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Common changes needed for BL1/BL2
This patch adds common changes to support AArch32 state in BL1 and BL2. Following are the changes:
* Added functions for disabling MMU from Secure state.
AArch32: Common changes needed for BL1/BL2
This patch adds common changes to support AArch32 state in BL1 and BL2. Following are the changes:
* Added functions for disabling MMU from Secure state. * Added AArch32 specific SMC function. * Added semihosting support. * Added reporting of unhandled exceptions. * Added uniprocessor stack support. * Added `el3_entrypoint_common` macro that can be shared by BL1 and BL32 (SP_MIN) BL stages. The `el3_entrypoint_common` is similar to the AArch64 counterpart with the main difference in the assembly instructions and the registers that are relevant to AArch32 execution state. * Enabled `LOAD_IMAGE_V2` flag in Makefile for `ARCH=aarch32` and added check to make sure that platform has not overridden to disable it.
Change-Id: I33c6d8dfefb2e5d142fdfd06a0f4a7332962e1a3
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| 72600226 | 12-Sep-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Add new version of image loading.
This patch adds capability to load BL images based on image descriptors instead of hard coded way of loading BL images. This framework is designed such that it can
Add new version of image loading.
This patch adds capability to load BL images based on image descriptors instead of hard coded way of loading BL images. This framework is designed such that it can be readily adapted by any BL stage that needs to load images.
In order to provide the above capability the following new platform functions are introduced:
bl_load_info_t *plat_get_bl_image_load_info(void); This function returns pointer to the list of images that the platform has populated to load.
bl_params_t *plat_get_next_bl_params(void); This function returns a pointer to the shared memory that the platform has kept aside to pass trusted firmware related information that next BL image needs.
void plat_flush_next_bl_params(void); This function flushes to main memory all the params that are passed to next image.
int bl2_plat_handle_post_image_load(unsigned int image_id) This function can be used by the platforms to update/use image information for given `image_id`.
`desc_image_load.c` contains utility functions which can be used by the platforms to generate, load and executable, image list based on the registered image descriptors.
This patch also adds new version of `load_image/load_auth_image` functions in-order to achieve the above capability.
Following are the changes for the new version as compared to old: - Refactor the signature and only keep image_id and image_info_t arguments. Removed image_base argument as it is already passed through image_info_t. Given that the BL image base addresses and limit/size are already provided by the platforms, the meminfo_t and entry_point_info arguments are not needed to provide/reserve the extent of free memory for the given BL image.
- Added check for the image size against the defined max size. This is needed because the image size could come from an unauthenticated source (e.g. the FIP header). To make this check, new member is added to the image_info_t struct for identifying the image maximum size.
New flag `LOAD_IMAGE_V2` is added in the Makefile. Default value is 0.
NOTE: `TRUSTED_BOARD_BOOT` is currently not supported when `LOAD_IMAGE_V2` is enabled.
Change-Id: Ia7b643f4817a170d5a2fbf479b9bc12e63112e79
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| 7813aae4 | 17-Aug-2016 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
Document: add PLAT_PARTITION_MAX_ENTRIES define
Partition driver requires the "PLAT_PARTITION_MAX_ENTRIES" definition.
By default, it's defined to 128 in partition driver. But it costs a lot of mem
Document: add PLAT_PARTITION_MAX_ENTRIES define
Partition driver requires the "PLAT_PARTITION_MAX_ENTRIES" definition.
By default, it's defined to 128 in partition driver. But it costs a lot of memory, and only a few partition entries are really used in platform partition table. If user wants use memory efficiently, user should define the build flag in platform.mk instead.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 7a1b2794 | 19-Sep-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #702 from jeenu-arm/psci-node-hw-state
Support for PSCI NODE_HW_STATE |
| 28d3d614 | 03-Aug-2016 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
PSCI: Add support for PSCI NODE_HW_STATE API
This patch adds support for NODE_HW_STATE PSCI API by introducing a new PSCI platform hook (get_node_hw_state). The implementation validates supplied arg
PSCI: Add support for PSCI NODE_HW_STATE API
This patch adds support for NODE_HW_STATE PSCI API by introducing a new PSCI platform hook (get_node_hw_state). The implementation validates supplied arguments, and then invokes this platform-defined hook and returns its result to the caller. PSCI capabilities are updated accordingly.
Also updates porting and firmware design guides.
Change-Id: I808e55bdf0c157002a7c104b875779fe50a68a30
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| 9df69ba3 | 24-Aug-2016 |
dp-arm <dimitris.papastamos@arm.com> |
fiptool: Add support for printing the sha256 digest with info command
This feature allows one to quickly verify that the expected image is contained in the FIP without extracting the image and runni
fiptool: Add support for printing the sha256 digest with info command
This feature allows one to quickly verify that the expected image is contained in the FIP without extracting the image and running sha256sum(1) on it.
The sha256 digest is only shown when the verbose flag is used.
This change requires libssl-dev to be installed in order to build Trusted Firmware. Previously, libssl-dev was optionally needed only to support Trusted Board Boot configurations.
Fixes ARM-Software/tf-issues#124
Change-Id: Ifb1408d17f483d482bb270a589ee74add25ec5a6
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| 937108a0 | 18-Aug-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #678 from soby-mathew/sm/PSCI_AArch32
Introduce AArch32 support for PSCI library |
| ccea0d2e | 16-Aug-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Move up to Base FVP version 7.6
This patch updates the User Guide to move up from version 7.2 to 7.6 of the Base FVP.
Change-Id: I792b2250deb4836266e14b40992ae59a5ab5f729 |
| 9d29c227 | 05-May-2016 |
Soby Mathew <soby.mathew@arm.com> |
AArch32: Enable build at top level Makefile for FVP
This patch enables the AArch32 build including SP_MIN in the top level Makefile. The build flag `ARCH` now can specify either `aarch64`(default) o
AArch32: Enable build at top level Makefile for FVP
This patch enables the AArch32 build including SP_MIN in the top level Makefile. The build flag `ARCH` now can specify either `aarch64`(default) or `aarch32`. Currently only FVP AEM model is supported for AArch32 build. Another new build flag `AARCH32_SP` is introduced to specify the AArch32 secure payload to be built.
Change-Id: Ie1198cb9e52d7da1b79b93243338fc3868b08faa
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| 41b568f5 | 09-Aug-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #661 from dp-arm/master
Replace fip_create with fiptool |
| 819281ee | 25-May-2016 |
dp-arm <dimitris.papastamos@arm.com> |
Replace fip_create with fiptool
fiptool provides a more consistent and intuitive interface compared to the fip_create program. It serves as a better base to build on more features in the future.
f
Replace fip_create with fiptool
fiptool provides a more consistent and intuitive interface compared to the fip_create program. It serves as a better base to build on more features in the future.
fiptool supports various subcommands. Below are the currently supported subcommands:
1) info - List the images contained in a FIP file. 2) create - Create a new FIP file with the given images. 3) update - Update an existing FIP with the given images. 4) unpack - Extract a selected set or all the images from a FIP file. 5) remove - Remove images from a FIP file. This is a new command that was not present in fip_create.
To create a new FIP file, replace "fip_create" with "fiptool create".
To update a FIP file, replace "fip_create" with "fiptool update".
To dump the contents of a FIP file, replace "fip_create --dump" with "fiptool info".
A compatibility script that emulates the basic functionality of fip_create is provided. Existing scripts might or might not work with the compatibility script. Users are strongly encouraged to migrate to fiptool.
Fixes ARM-Software/tf-issues#87 Fixes ARM-Software/tf-issues#108 Fixes ARM-Software/tf-issues#361
Change-Id: I7ee4da7ac60179cc83cf46af890fd8bc61a53330
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| 3d99b17f | 28-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #668 from sandrine-bailleux-arm/sb/rodata-xn-doc
Documentation for SEPARATE_CODE_AND_RODATA build flag |