| e09559fd | 22-Jul-2020 |
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> |
docs/fvp: update SGI and RD FVP list
Update SGI-575, RD-E1-Edge and RD-N1-Edge FVP versions to 11.10/36 and
add RD-N1-Edge-Dual to the list of supported Arm Fixed Virtual
Platforms.
Change-Id: I9e7
docs/fvp: update SGI and RD FVP list
Update SGI-575, RD-E1-Edge and RD-N1-Edge FVP versions to 11.10/36 and
add RD-N1-Edge-Dual to the list of supported Arm Fixed Virtual
Platforms.
Change-Id: I9e7e5662324eeefc80d799ca5341b5bc4dc39cbb
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
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| 3ee148d6 | 22-Jul-2020 |
joanna.farley <joanna.farley@arm.com> |
Merge changes from topics "af/add_measured_boot_bl1_bl2", "af/add_measured_boot_driver", "af/add_measured_boot_driver_support", "af/add_measured_boot_fconf", "af/add_measured_boot_fvp" into integrati
Merge changes from topics "af/add_measured_boot_bl1_bl2", "af/add_measured_boot_driver", "af/add_measured_boot_driver_support", "af/add_measured_boot_fconf", "af/add_measured_boot_fvp" into integration
* changes:
plat/arm/board/fvp: Add support for Measured Boot
TF-A: Add support for Measured Boot driver to FCONF
TF-A: Add support for Measured Boot driver in BL1 and BL2
TF-A: Add Event Log for Measured Boot
TF-A: Add support for Measured Boot driver
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| 4a135bc3 | 13-Jul-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
plat/arm/board/fvp: Add support for Measured Boot
This patch adds support for Measured Boot functionality
to FVP platform code. It also defines new properties
in 'tpm_event_log' node to store Event
plat/arm/board/fvp: Add support for Measured Boot
This patch adds support for Measured Boot functionality
to FVP platform code. It also defines new properties
in 'tpm_event_log' node to store Event Log address and
it size
'tpm_event_log_sm_addr'
'tpm_event_log_addr'
'tpm_event_log_size'
in 'event_log.dtsi' included in 'fvp_tsp_fw_config.dts'
and 'fvp_nt_fw_config.dts'. The node and its properties
are described in binding document
'docs\components\measured_boot\event_log.rst'.
Change-Id: I087e1423afcb269d6cfe79c1af9c348931991292
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| d95c3de3 | 21-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "FVP Doc: Update list of supported FVP platforms" into integration |
| 1f730723 | 21-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "Add myself and Jack Bond-Preston as code owners for the CMake build definitions" into integration |
| 578bf9f5 | 10-Jul-2020 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
Add myself and Jack Bond-Preston as code owners for the CMake build
definitions
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I1c5cc8af34c02a6294ffc44a26152fb89849
Add myself and Jack Bond-Preston as code owners for the CMake build
definitions
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I1c5cc8af34c02a6294ffc44a26152fb8984927fc
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| fcb1398f | 02-Apr-2020 |
Olivier Deprez <olivier.deprez@arm.com> |
doc: secure partition manager design
Former EL3 Secure Partition Manager using MM protocol is renamed
Secure Partition Manager (MM).
A new Secure Partition Manager document covers TF-A support for t
doc: secure partition manager design
Former EL3 Secure Partition Manager using MM protocol is renamed
Secure Partition Manager (MM).
A new Secure Partition Manager document covers TF-A support for the
PSA FF-A compliant implementation.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I9763359c2e96181e1726c8ad72738de293b80eb4
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| 294d7bf2 | 20-Jul-2020 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
Add myself and Alexei Fedorov as Measured Boot code owners
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: Ib327bda239bb5163c60764bae90b0739589dcf66 |
| 91879af7 | 20-Jul-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
FVP Doc: Update list of supported FVP platforms
This patch adds the following models
FVP_Base_Neoverse-E1x1
FVP_Base_Neoverse-E1x2
FVP_Base_Neoverse-E1x4
to the list of supported FVP platforms.
FVP Doc: Update list of supported FVP platforms
This patch adds the following models
FVP_Base_Neoverse-E1x1
FVP_Base_Neoverse-E1x2
FVP_Base_Neoverse-E1x4
to the list of supported FVP platforms.
Change-Id: Ib526a2a735f17724af3a874b06bf69b4ca85d0dd
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| 7be2b983 | 10-Jun-2020 |
Leonardo Sandoval <leonardo.sandoval@linaro.org> |
doc: use docker to build documentation
docker (container) is another way to build the documentation and fortunately
there is already a docker image (sphinxdoc/sphinx) with sphinx so we can use
it to
doc: use docker to build documentation
docker (container) is another way to build the documentation and fortunately
there is already a docker image (sphinxdoc/sphinx) with sphinx so we can use
it to generate the documentation.
Change-Id: I06b0621cd7509a8279655e828680b92241b9fde4
Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>
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| 2bdb4611 | 16-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "imx8mp_basic_support" into integration
* changes:
plat: imx8mp: Add the basic support for i.MX8MP
plat: imx8m: Move the gpc hw reg to a separate header file |
| b5cfb045 | 13-Jul-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "Add myself and Andre Przywara as code owners for the Arm FPGA platform port" into integration |
| f0e2e66a | 10-Jul-2020 |
Javier Almansa Sobrino <javier.almansasobrino@arm.com> |
Add myself and Andre Przywara as code owners for the Arm FPGA platform port
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I6d3949a971fada5a086b788dbe274f8451fcfc0d |
| 0a977b9b | 15-Apr-2019 |
Konstantin Porotchkin <kostap@marvell.com> |
plat: marvell: armada: a8k: change CCU LLC SRAM mapping
The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage.
The CCU have to prepare SRAM window, but point to the DRAM-0 target
unt
plat: marvell: armada: a8k: change CCU LLC SRAM mapping
The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage.
The CCU have to prepare SRAM window, but point to the DRAM-0 target
until the SRAM is actually enabled.
This patch changes CCU SRAM window target to DRAM-0
Remove dependence between LLC_SRAM and LLC_ENABLE and update the
build documentation.
The SRAМ base moved to follow the OP-TEE SHMEM area (0x05400000)
Change-Id: I85c2434a3d515ec37da5ae8eb729e3280f91c456
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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| a775ef25 | 03-Jun-2020 |
Jacky Bai <ping.bai@nxp.com> |
plat: imx8mp: Add the basic support for i.MX8MP
The i.MX 8MP Media Applications Processor is part of the growing
i.MX8M family targeting the consumer and industrial market. It brings
an effective Ma
plat: imx8mp: Add the basic support for i.MX8MP
The i.MX 8MP Media Applications Processor is part of the growing
i.MX8M family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in 14LPP to achieve both high
performance and low power consumption and relies on a powerful fully
coherent core complex based on a quad core Arm Cortex-A53 cluster and
Cortex-M7 low-power coprocessor, audio digital signal processor, machine
learning and graphics accelerators.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I98311ebc32bee20af05031492e9fc24d06e55f4a
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| 84ef9cd8 | 29-Jun-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
make, doc: Add build option to create chain of trust at runtime
Added a build option 'COT_DESC_IN_DTB' to create chain of trust
at runtime using fconf.
Signed-off-by: Manish V Badarkhe <Manish.Bada
make, doc: Add build option to create chain of trust at runtime
Added a build option 'COT_DESC_IN_DTB' to create chain of trust
at runtime using fconf.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I92b257ac4ece8bbf56f05a41d1e4056e2422ab89
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| b5fb6917 | 30-Jun-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
doc: Update CoT binding to make it more generic
Updated the CoT binding document to show chain of trust relationship
with the help of 'authentication method' and 'authentication data'
instead of sho
doc: Update CoT binding to make it more generic
Updated the CoT binding document to show chain of trust relationship
with the help of 'authentication method' and 'authentication data'
instead of showing content of certificate and fixed rendering issue
while creating html page using this document.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ib48279cfe786d149ab69ddc711caa381a50f9e2b
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| 231d0b35 | 04-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
docs: qemu: bump to QEMU 5.0.0
Fix the version inconsistency in the same file.
I tested QEMU 5.0.0, and it worked for me.
Change-Id: I9d8ca9aae1e413410eb5676927e13ae4aee9fad8
Signed-off-by: Masahi
docs: qemu: bump to QEMU 5.0.0
Fix the version inconsistency in the same file.
I tested QEMU 5.0.0, and it worked for me.
Change-Id: I9d8ca9aae1e413410eb5676927e13ae4aee9fad8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 624120e0 | 04-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
docs: qemu: remove unneeded root=/dev/vda2 kernel parameter
In my understanding, /dev/vda2 does not exist unless you add
virtio drive to the qemu command line.
The rootfs is already specified by '-
docs: qemu: remove unneeded root=/dev/vda2 kernel parameter
In my understanding, /dev/vda2 does not exist unless you add
virtio drive to the qemu command line.
The rootfs is already specified by '-initrd rootfs.cpio.gz'.
Change-Id: Ifdca5d4f3819d87ef7e8a08ed870872d24b86370
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| a66f0309 | 04-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
docs: qemu: add build instructions for QEMU_EFI.fd and rootfs.cpio.gz
This commit solves the limitation, "No build instructions for
QEMU_EFI.fd and rootfs-arm64.cpio.gz"
Document the steps to build
docs: qemu: add build instructions for QEMU_EFI.fd and rootfs.cpio.gz
This commit solves the limitation, "No build instructions for
QEMU_EFI.fd and rootfs-arm64.cpio.gz"
Document the steps to build them.
Change-Id: Ic6d895617cf71fe969f4aa9820dad25cc6182023
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 1f8ea715 | 02-Jul-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "doc: Fix some broken links" into integration |
| 11af40b6 | 01-Jul-2020 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge "Workaround for Neoverse N1 erratum 1800710" into integration |
| 0396bcbc | 01-Jul-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
doc: Fix some broken links
Fix all external broken links reported by Sphinx linkcheck tool.
This does not take care of broken cross-references between internal
TF-A documentation files. These will
doc: Fix some broken links
Fix all external broken links reported by Sphinx linkcheck tool.
This does not take care of broken cross-references between internal
TF-A documentation files. These will be fixed in a future patch.
Change-Id: I2a740a3ec0b688c14aad575a6c2ac71e72ce051e
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| c3233c11 | 29-Jun-2020 |
Manish Pandey <manish.pandey2@arm.com> |
doc: RAS: fixing broken links
There were some links in the file "ras.rst" which were broken, this
patch fixes all the broken links in this file.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com
doc: RAS: fixing broken links
There were some links in the file "ras.rst" which were broken, this
patch fixes all the broken links in this file.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I00cf080e9338af5786239a4843cb4c2e0cc9d99d
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| edd8188d | 26-Jun-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ib9c82b85,Ib348e097,I4dc315e4,I58a8ce44,Iebc03361, ... into integration
* changes:
plat: marvell: armada: a8k: add OP-TEE OS MMU tables
drivers: marvell: add support for mapping th
Merge changes Ib9c82b85,Ib348e097,I4dc315e4,I58a8ce44,Iebc03361, ... into integration
* changes:
plat: marvell: armada: a8k: add OP-TEE OS MMU tables
drivers: marvell: add support for mapping the entire LLC to SRAM
plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms
plat: marvell: armada: reduce memory size reserved for FIP image
plat: marvell: armada: platform definitions cleanup
plat: marvell: armada: a8k: check CCU window state before loading MSS BL2
drivers: marvell: add CCU driver API for window state checking
drivers: marvell: align and extend llc macros
plat: marvell: a8k: move address config of cp1/2 to BL2
plat: marvell: armada: re-enable BL32_BASE definition
plat: marvell: a8k: extend includes to take advantage of the phy_porting_layer
marvell: comphy: initialize common phy selector for AP mode
marvell: comphy: update rx_training procedure
plat: marvell: armada: configure amb for all CPs
plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs
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