1 /* 2 * Copyright (c) 2015-2020, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <common/debug.h> 10 #include <common/interrupt_props.h> 11 #include <drivers/arm/gicv3.h> 12 #include "gicv3_private.h" 13 14 /******************************************************************************* 15 * GIC Redistributor functions 16 * Note: The raw register values correspond to multiple interrupt `id`s and 17 * the number of interrupt `id`s involved depends on the register accessed. 18 ******************************************************************************/ 19 20 /* 21 * Accessor to set the byte corresponding to interrupt `id` 22 * in GIC Redistributor IPRIORITYR and IPRIORITYRE. 23 */ 24 void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri) 25 { 26 GICR_WRITE_8(IPRIORITY, base, id, (uint8_t)(pri & GIC_PRI_MASK)); 27 } 28 29 /* 30 * Accessors to get/set/clear the bit corresponding to interrupt `id` 31 * from GIC Redistributor IGROUPR0 and IGROUPRE 32 */ 33 unsigned int gicr_get_igroupr(uintptr_t base, unsigned int id) 34 { 35 return GICR_GET_BIT(IGROUP, base, id); 36 } 37 38 void gicr_set_igroupr(uintptr_t base, unsigned int id) 39 { 40 GICR_SET_BIT(IGROUP, base, id); 41 } 42 43 void gicr_clr_igroupr(uintptr_t base, unsigned int id) 44 { 45 GICR_CLR_BIT(IGROUP, base, id); 46 } 47 48 /* 49 * Accessors to get/set/clear the bit corresponding to interrupt `id` 50 * from GIC Redistributor IGRPMODR0 and IGRPMODRE 51 */ 52 unsigned int gicr_get_igrpmodr(uintptr_t base, unsigned int id) 53 { 54 return GICR_GET_BIT(IGRPMOD, base, id); 55 } 56 57 void gicr_set_igrpmodr(uintptr_t base, unsigned int id) 58 { 59 GICR_SET_BIT(IGRPMOD, base, id); 60 } 61 62 void gicr_clr_igrpmodr(uintptr_t base, unsigned int id) 63 { 64 GICR_CLR_BIT(IGRPMOD, base, id); 65 } 66 67 /* 68 * Accessor to write the bit corresponding to interrupt `id` 69 * in GIC Redistributor ISENABLER0 and ISENABLERE 70 */ 71 void gicr_set_isenabler(uintptr_t base, unsigned int id) 72 { 73 GICR_WRITE_BIT(ISENABLE, base, id); 74 } 75 76 /* 77 * Accessor to write the bit corresponding to interrupt `id` 78 * in GIC Redistributor ICENABLER0 and ICENABLERE 79 */ 80 void gicr_set_icenabler(uintptr_t base, unsigned int id) 81 { 82 GICR_WRITE_BIT(ICENABLE, base, id); 83 } 84 85 /* 86 * Accessor to get the bit corresponding to interrupt `id` 87 * in GIC Redistributor ISACTIVER0 and ISACTIVERE 88 */ 89 unsigned int gicr_get_isactiver(uintptr_t base, unsigned int id) 90 { 91 return GICR_GET_BIT(ISACTIVE, base, id); 92 } 93 94 /* 95 * Accessor to clear the bit corresponding to interrupt `id` 96 * in GIC Redistributor ICPENDR0 and ICPENDRE 97 */ 98 void gicr_set_icpendr(uintptr_t base, unsigned int id) 99 { 100 GICR_WRITE_BIT(ICPEND, base, id); 101 } 102 103 /* 104 * Accessor to write the bit corresponding to interrupt `id` 105 * in GIC Redistributor ISPENDR0 and ISPENDRE 106 */ 107 void gicr_set_ispendr(uintptr_t base, unsigned int id) 108 { 109 GICR_WRITE_BIT(ISPEND, base, id); 110 } 111 112 /* 113 * Accessor to set the bit fields corresponding to interrupt `id` 114 * in GIC Redistributor ICFGR0, ICFGR1 and ICFGRE 115 */ 116 void gicr_set_icfgr(uintptr_t base, unsigned int id, unsigned int cfg) 117 { 118 /* Interrupt configuration is a 2-bit field */ 119 unsigned int bit_shift = BIT_NUM(ICFG, id) << 1U; 120 121 /* Clear the field, and insert required configuration */ 122 mmio_clrsetbits_32(base + GICR_OFFSET(ICFG, id), 123 (uint32_t)GIC_CFG_MASK << bit_shift, 124 (cfg & GIC_CFG_MASK) << bit_shift); 125 } 126