ftrace: dump ftrace after every ta_entry

This patch implements the feature to dump ftrace buffer to
tee_supplicant after every entry to the ta.
To implement the feature, this patch does some modific

ftrace: dump ftrace after every ta_entry

This patch implements the feature to dump ftrace buffer to
tee_supplicant after every entry to the ta.
To implement the feature, this patch does some modification to the
ftrace dumping process and add a new config CFG_FTRACE_DUMP_EVERY_ENTRY
to control this behavior.
This can reduce the chance of losing the ftrace data due to not
enough ftrace buffer and make debugging long-lived TA possible.

Signed-off-by: Leo Chen <shf.chen@mediatek.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

show more ...

core: support dynamic protected memory lending

With CFG_CORE_DYN_PROTMEM=y support dynamic protected memory lending.

A new internal struct mobj_ffa_rsm is added to handle dynamic protected
memory f

core: support dynamic protected memory lending

With CFG_CORE_DYN_PROTMEM=y support dynamic protected memory lending.

A new internal struct mobj_ffa_rsm is added to handle dynamic protected
memory for FF-A.

A new internal struct mobj_protmem is add to handle dynamic protected
memory without FF-A.

Lending non-secure memory to OP-TEE to use it as protected memory means
that it should to become inaccessible by the normal world as part of the
process. This part is currently not supported, since it must be done in
a platform specific way for platforms that support that. QEMU don't
support that.

Adding two platform specific functions, plat_get_protmem_config() and
plat_set_protmem_range() for dynamic protected memory. The functions has
__weak implementation to allow easier testing. However,
plat_set_protmem_range() requires CFG_INSECURE=y since it doesn't change
memory protection.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

Update CHANGELOG for 4.8.0

Update CHANGELOG for 4.8.0 and collect Tested-by tags.

Link: https://github.com/OP-TEE/optee_os/pull/7567
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested

Update CHANGELOG for 4.8.0

Update CHANGELOG for 4.8.0 and collect Tested-by tags.

Link: https://github.com/OP-TEE/optee_os/pull/7567
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_virt)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a)
Tested-by: Amey Raghatate <ameyavinash.raghatate@amd.com> (AMD Versal Gen 2)
Tested-by: Guiyong Hwang <gy.hwang@telechips.com> (telechips-tcc805x)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (rpi3 model 3B)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-135F_DK)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1_SCMI)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2_SCMI)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (rockchip-rk3399 Rockpi4B)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey + RPMB kernel routing)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (rockchip-rk3399 Rockpi4B)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6dlsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6qsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6sllevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6sxsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ulevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ullevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ulzevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx7dsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx7ulpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8dxlevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mmevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mnevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mqevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8qmmek)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8qxpmek)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8ulpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx93evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx91evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx95evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LX2160A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1046A-RDB)

show more ...

core: console: Allow setting logging verbosity during runtime

The default console can be disabled at runtime for power management. Any
prints after boot from OP-TEE could cause a bus data abort if t

core: console: Allow setting logging verbosity during runtime

The default console can be disabled at runtime for power management. Any
prints after boot from OP-TEE could cause a bus data abort if the UART has
been disabled. Add an option to change the log level after boot has
completed which can be used to disable the console log.

Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

core: panic: allow core halting on SGI in other cases than panic()

There may be cases where we want to halt several cores outside of a
panic() sequence.

Therefore, add CFG_MULTI_CORE_HALTING switch

core: panic: allow core halting on SGI in other cases than panic()

There may be cases where we want to halt several cores outside of a
panic() sequence.

Therefore, add CFG_MULTI_CORE_HALTING switch that allows to register
an interrupt handler for the CFG_HALT_CORES_SGI that is dedicated to
halt other cores.

This reduces the scope of CFG_HALT_CORES_ON_PANIC that is now used only
for halting other cores in a panic() sequence.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

Update CHANGELOG for 4.7.0

Update CHANGELOG for 4.7.0 and collect Tested-by tags.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.

Update CHANGELOG for 4.7.0

Update CHANGELOG for 4.7.0 and collect Tested-by tags.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_virt)
Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi 3B v1.2)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey + RPMB kernel routing)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (rockchip-rk3399) (Rockpi4B)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6dlsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6qsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6sllevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6sxsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ulevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ullevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ulzevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx7dsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx7ulpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8dxlevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mmevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mnevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mqevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8qmmek)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8qxpmek)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8ulpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx93evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx91evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx95evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LX2160A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1046A-RDB)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-135F_DK)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1_SCMI)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2)

show more ...

mk: core: relax rules around CFG_TRANSFER_LIST

`CFG_TRANSFER_LIST` forces DT-based console init, even though `CFG_DT`
might not be explicitly enabled or needed on the platform otherwise.
Relax the r

mk: core: relax rules around CFG_TRANSFER_LIST

`CFG_TRANSFER_LIST` forces DT-based console init, even though `CFG_DT`
might not be explicitly enabled or needed on the platform otherwise.
Relax the rules around `CFG_TRANSFER_LIST` to allow for a platform to
receive boot arguments via Firmware Handoff without enabling `CFG_DT`.

Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

mk/config.mk: allow CFG_CALLOUT for CFG_CORE_SEL2_SPMC=y

Upstream Hafnium provides emulated EL1 physical timer to be used by
OP-TEE. This timer is used by the callout service. However, the current
H

mk/config.mk: allow CFG_CALLOUT for CFG_CORE_SEL2_SPMC=y

Upstream Hafnium provides emulated EL1 physical timer to be used by
OP-TEE. This timer is used by the callout service. However, the current
Hafnium is not stable with this configuration. When creating and later
destroying guest it sometimes crashes with the following output from
Hafnium:
Panic: ASSERT: ../../src/ffa/spmc/interrupts.c:271

So by default keep it disabled, but allow it to be overridden for
testing.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

mk/config.mk: disable CFG_CALLOUT for CFG_CORE_SEL2_SPMC=y

With Hafnium at S-EL1 (CFG_CORE_SEL2_SPMC=y) the callout service isn't
initialized. To avoid unexpected aborts and errors, set CFG_CALLOUT=

mk/config.mk: disable CFG_CALLOUT for CFG_CORE_SEL2_SPMC=y

With Hafnium at S-EL1 (CFG_CORE_SEL2_SPMC=y) the callout service isn't
initialized. To avoid unexpected aborts and errors, set CFG_CALLOUT=n.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

core: replace CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG

This commit replaces CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG since now
RISC-V also supports CFG_DYN_STACK_CONFIG.

Signed-off-by: Alvin Chang

core: replace CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG

This commit replaces CFG_DYN_STACK_CONFIG with CFG_DYN_CONFIG since now
RISC-V also supports CFG_DYN_STACK_CONFIG.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

scmi-server: configure SCP-firmware from DT

Use the node "scmi" in device-tree, to fill a struct scpfw_config.
Pass the structure to SCP-fw through scpfw_configure() and clean
this structure.

Signe

scmi-server: configure SCP-firmware from DT

Use the node "scmi" in device-tree, to fill a struct scpfw_config.
Pass the structure to SCP-fw through scpfw_configure() and clean
this structure.

Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

show more ...

build: support building on ARM64 host

On ARM64 hosts we don't want to set CROSS_COMPILE when building for
arm64. Don't set a fallback value in this case.

Signed-off-by: Casey Connolly <casey.connol

build: support building on ARM64 host

On ARM64 hosts we don't want to set CROSS_COMPILE when building for
arm64. Don't set a fallback value in this case.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

core: kernel: Remove CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL

Now both ARM and RISC-V architectures support initialize
thread_core_local[current_core_pos] before calling C code. Thus, we can
deprecat

core: kernel: Remove CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL

Now both ARM and RISC-V architectures support initialize
thread_core_local[current_core_pos] before calling C code. Thus, we can
deprecate CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL and corresponding
code.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>

show more ...

core: dynamic allocation of thread_core_local and its stacks

With CFG_DYN_CONFIG enabled, use dynamic allocation of thread_core_local
and the two stacks, tmp_stack and abt_stack, recorded in it.

Si

core: dynamic allocation of thread_core_local and its stacks

With CFG_DYN_CONFIG enabled, use dynamic allocation of thread_core_local
and the two stacks, tmp_stack and abt_stack, recorded in it.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

core: pta: add self tests for transfer list

Add self tests for transfer list.
Adapt CFG_TRANSFER_LIST with its dependencies and add
CFG_TRANSFER_LIST_TEST.

Signed-off-by: Raymond Mao <raymond.mao@l

core: pta: add self tests for transfer list

Add self tests for transfer list.
Adapt CFG_TRANSFER_LIST with its dependencies and add
CFG_TRANSFER_LIST_TEST.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

show more ...

core: applies FF-A v1.2 features on StandaloneMm

edk2's StandaloneMm will be applied with FF-A v1.2.
while applying, StandaloneMm doesn't create anymore PHIT hob by itself
but it should be passed fr

core: applies FF-A v1.2 features on StandaloneMm

edk2's StandaloneMm will be applied with FF-A v1.2.
while applying, StandaloneMm doesn't create anymore PHIT hob by itself
but it should be passed from other software stack.

To make StandaloneMm runs properly, create Hob information and
deliver it using FF-A Boot protocol according to FF-A specification [1].

Also, apply FF-A management protocol to change it [2] to
get/set memory permission instead of using DIRECT_REQ_MSG.

Also, implements some FF-A ABIs to communication StandaloneMm properly.

Link: https://developer.arm.com/documentation/den0077/latest [1]
Link: https://developer.arm.com/documentation/den0140/latest [2]

Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Levi Yun <yeoreum.yun@arm.com>

show more ...

libutils: add division routines from LLVM compiler-rt

Add division routines needed to provide __udivti3() needed for long long
divisions in mbedtls.

Selected files are imported from the compiler-rt

libutils: add division routines from LLVM compiler-rt

Add division routines needed to provide __udivti3() needed for long long
divisions in mbedtls.

Selected files are imported from the compiler-rt directory in LLVM
version 20.1.3, tag llvmorg-20.1, to lib/libutils/compiler-rt with no
local changes except for the added sub.mk files.

Link: https://github.com/OP-TEE/optee_os/pull/7359
Link: https://github.com/OP-TEE/optee_os/issues/7374
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

show more ...

Update CHANGELOG for 4.6.0

Update CHANGELOG for 4.6.0 and collect Tested-by tags.

Link: https://github.com/OP-TEE/optee_os/pull/7359
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested

Update CHANGELOG for 4.6.0

Update CHANGELOG for 4.6.0 and collect Tested-by tags.

Link: https://github.com/OP-TEE/optee_os/pull/7359
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_armv8a)
Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (vexpress-qemu_virt)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey + RPMB kernel routing)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6dlsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6qsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6sllevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6sxsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ulevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ullevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx6ulzevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx7dsabresd)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx7ulpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8dxlevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mmevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mnevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mqevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8mpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8qmmek)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8qxpmek)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx8ulpevk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx93evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx91evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (imx-mx95evk)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LX2160A-RDB)
Tested-by: Sahil Malhotra <sahil.malhotra@nxp.com> (LS1012A-RDB)
Tested-by: Joakim Bech <joakim.bech@linaro.org> (RPi 3B v1.2)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (rockchip-rk3399 Rockpi4B)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (imx-mx8mqevk)
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (FVP)
Tested-by: Guiyong Hwang <gy.hwang@telechips.com> (telechips-tcc805x)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-135F_DK)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_EV1_SCMI)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2)
Tested-by: Etienne Carriere <etienne.carriere@foss.st.com> (stm32mp1-157C_DK2_SCMI)
Tested-by: Ricardo Salveti <ricardo@foundries.io> (ZynqMP)

show more ...

core: fs_htree: Fix wrong AAD length in authenc_init()

In authenc_init(), AAD length field passed to
crypto_authenc_init() does not match with the total
AAd data passed via crypto_authenc_update_aad

core: fs_htree: Fix wrong AAD length in authenc_init()

In authenc_init(), AAD length field passed to
crypto_authenc_init() does not match with the total
AAd data passed via crypto_authenc_update_aad() for
lower layer crypto computation.

To fix this issue and to support the legacy without
breaking existing REE file system content, introduce
a config CFG_REE_FS_HTREE_HASH_SIZE_COMPAT.

By default this config is enabled to support the legacy
REE FS hash tree that uses truncated hash implementation.

Link: https://github.com/OP-TEE/optee_os/issues/7331
Signed-off-by: Anil Kumar Reddy <areddy3@marvell.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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ta: enable ubsan support for TAs

Introduce CFG_TA_SANITIZE_UNDEFINED config to sanitize trusted
applications. If CFG_TA_SANITIZE_UNDEFINED is set sanitize flags are
propagated to internal TAs (avb,

ta: enable ubsan support for TAs

Introduce CFG_TA_SANITIZE_UNDEFINED config to sanitize trusted
applications. If CFG_TA_SANITIZE_UNDEFINED is set sanitize flags are
propagated to internal TAs (avb, pkcs11, remoteproc, trusted_keys) and
external TAs, which are built with the devkit.

Signed-off-by: Aleksandr Iashchenko <aleksandr.iashchenko@linutronix.de>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: scmi-msg: support performance domains for DVFS

Implement some of the SCMI performance domain management messages
in scmi-msg drivers to support basic DVFS scenario.

Co-developed-by: Etienn

drivers: scmi-msg: support performance domains for DVFS

Implement some of the SCMI performance domain management messages
in scmi-msg drivers to support basic DVFS scenario.

Co-developed-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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libmbedtls: fix typo: CFG_TA_MEBDTLS_UNSAFE_MODEXP

CFG_TA_"MEBDTLS"_UNSAFE_MODEXP is typo. This commit fixes it.

Fixes: cb03400251f9 ("Squashed commit upgrading to mbedtls-3.6.2")
Signed-off-by: Al

libmbedtls: fix typo: CFG_TA_MEBDTLS_UNSAFE_MODEXP

CFG_TA_"MEBDTLS"_UNSAFE_MODEXP is typo. This commit fixes it.

Fixes: cb03400251f9 ("Squashed commit upgrading to mbedtls-3.6.2")
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: fix CFG_BOOT_INIT_THREAD_CORE_LOCAL0

CFG_BOOT_INIT_THREAD_CORE_LOCAL0 is misleading since it's concerning the
core id of the boot CPU. So rename the configuration flag to
CFG_BOOT_INIT_CURRENT

core: fix CFG_BOOT_INIT_THREAD_CORE_LOCAL0

CFG_BOOT_INIT_THREAD_CORE_LOCAL0 is misleading since it's concerning the
core id of the boot CPU. So rename the configuration flag to
CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL and update the code as needed.
Only thread_init_thread_core_local() has a change of behaviour where the
boot CPU now can have any core id.

Fixes: b5ec8152f3e5 ("core: arm: refactor boot")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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Deprecate libgcc for TAs

By default keep linking with libgcc for TAs, but add CFG_TA_LIBGCC to
easily turn off linking with libgcc in configurations where it isn't
needed.

Signed-off-by: Jens Wikla

Deprecate libgcc for TAs

By default keep linking with libgcc for TAs, but add CFG_TA_LIBGCC to
easily turn off linking with libgcc in configurations where it isn't
needed.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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core: Implicitly enable CFG_BOOT_MEM

Now both ARM and RISC-V architectures support and enable CFG_BOOT_MEM by
default. It's unnecessary to define CFG_BOOT_MEM. This commit removes
CFG_BOOT_MEM and r

core: Implicitly enable CFG_BOOT_MEM

Now both ARM and RISC-V architectures support and enable CFG_BOOT_MEM by
default. It's unnecessary to define CFG_BOOT_MEM. This commit removes
CFG_BOOT_MEM and relevant dead code.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>

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