1# Default configuration values for OP-TEE core (all platforms). 2# 3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk. 4# Some subsystem-specific defaults are not here but rather in */sub.mk. 5# 6# Configuration values may be assigned from multiple sources. 7# From higher to lower priority: 8# 9# 1. Make arguments ('make CFG_FOO=bar...') 10# 2. The file specified by $(CFG_OPTEE_CONFIG) (if defined) 11# 3. The environment ('CFG_FOO=bar make...') 12# 4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk 13# 5. This file 14# 6. Subsystem-specific makefiles (*/sub.mk) 15# 16# Actual values used during the build are output to $(out-dir)/conf.mk 17# (CFG_* variables only). 18 19# Cross-compiler prefix and suffix 20ifeq ($(ARCH),arm) 21CROSS_COMPILE ?= arm-linux-gnueabihf- 22CROSS_COMPILE64 ?= aarch64-linux-gnu- 23endif 24ifeq ($(ARCH),riscv) 25CROSS_COMPILE ?= riscv-linux-gnu- 26CROSS_COMPILE64 ?= riscv64-linux-gnu- 27endif 28CROSS_COMPILE32 ?= $(CROSS_COMPILE) 29COMPILER ?= gcc 30 31# For convenience 32ifdef CFLAGS 33CFLAGS32 ?= $(CFLAGS) 34CFLAGS64 ?= $(CFLAGS) 35endif 36 37# Compiler warning level. 38# Supported values: undefined, 1, 2 and 3. 3 gives more warnings. 39WARNS ?= 3 40 41# Path to the Python interpreter used by the build system. 42# This variable is set to the default python3 interpreter in the user's 43# path. But build environments that require more explicit control can 44# set the path to a specific interpreter through this variable. 45PYTHON3 ?= python3 46 47# Define DEBUG=1 to compile without optimization (forces -O0) 48# DEBUG=1 49ifeq ($(DEBUG),1) 50# For backwards compatibility 51$(call force,CFG_CC_OPT_LEVEL,0) 52$(call force,CFG_DEBUG_INFO,y) 53endif 54 55# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive. 56# Optimize for size by default, usually gives good performance too. 57CFG_CC_OPT_LEVEL ?= s 58 59# Enabling CFG_DEBUG_INFO makes debug information embedded in core. 60CFG_DEBUG_INFO ?= y 61 62# If y, enable debug features of the TEE core (assertions and lock checks 63# are enabled, panic and assert messages are more verbose, data and prefetch 64# aborts show a stack dump). When disabled, the NDEBUG directive is defined 65# so assertions are disabled. 66CFG_TEE_CORE_DEBUG ?= y 67 68# Log levels for the TEE core. Defines which core messages are displayed 69# on the secure console. Disabling core log (level set to 0) also disables 70# logs from the TAs. 71# 0: none 72# 1: error 73# 2: error + info 74# 3: error + info + debug 75# 4: error + info + debug + flow 76CFG_TEE_CORE_LOG_LEVEL ?= 2 77 78# TA log level 79# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0, 80# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL 81# when the TA is built. 82CFG_TEE_TA_LOG_LEVEL ?= 1 83 84# TA enablement 85# When defined to "y", TA traces are output according to 86# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all 87CFG_TEE_CORE_TA_TRACE ?= y 88 89# If y, enable the memory leak detection feature in the bget memory allocator. 90# When this feature is enabled, calling mdbg_check(1) will print a list of all 91# the currently allocated buffers and the location of the allocation (file and 92# line number). 93# Note: make sure the log level is high enough for the messages to show up on 94# the secure console! For instance: 95# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with: 96# $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3 97# - To debug TEE core allocations: build OP-TEE with: 98# $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3 99CFG_TEE_CORE_MALLOC_DEBUG ?= n 100CFG_TEE_TA_MALLOC_DEBUG ?= n 101# Prints an error message and dumps the stack on failed memory allocations 102# using malloc() and friends. 103CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG) 104 105# Mask to select which messages are prefixed with long debugging information 106# (severity, core ID, thread ID, component name, function name, line number) 107# based on the message level. If BIT(level) is set, the long prefix is shown. 108# Otherwise a short prefix is used (severity and component name only). 109# Levels: 0=none 1=error 2=info 3=debug 4=flow 110CFG_MSG_LONG_PREFIX_MASK ?= 0x1a 111 112# Number of threads 113CFG_NUM_THREADS ?= 2 114 115# API implementation version 116CFG_TEE_API_VERSION ?= GPD-1.1-dev 117 118# Implementation description (implementation-dependent) 119CFG_TEE_IMPL_DESCR ?= OPTEE 120 121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal 122# World? 123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y 124 125# The following values are not extracted from the "git describe" output because 126# we might be outside of a Git environment, or the tree may have been cloned 127# with limited depth not including any tag, so there is really no guarantee 128# that TEE_IMPL_VERSION contains the major and minor revision numbers. 129CFG_OPTEE_REVISION_MAJOR ?= 4 130CFG_OPTEE_REVISION_MINOR ?= 5 131CFG_OPTEE_REVISION_EXTRA ?= 132 133# Trusted OS implementation version 134TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \ 135 echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))$(CFG_OPTEE_REVISION_EXTRA) 136 137# Trusted OS implementation manufacturer name 138CFG_TEE_MANUFACTURER ?= LINARO 139 140# Trusted firmware version 141CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF 142 143# Trusted OS implementation manufacturer name 144CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF 145 146# Rich Execution Environment (REE) file system support: normal world OS 147# provides the actual storage. 148# This is the default FS when enabled (i.e., the one used when 149# TEE_STORAGE_PRIVATE is passed to the trusted storage API) 150CFG_REE_FS ?= y 151 152# CFG_REE_FS_HTREE_HASH_SIZE_COMPAT, when enabled, supports the legacy 153# REE FS hash tree tagging implementation that uses a truncated hash. 154# Be warned that disabling this config could break accesses to existing 155# REE FS content. 156CFG_REE_FS_HTREE_HASH_SIZE_COMPAT ?= y 157 158# RPMB file system support 159CFG_RPMB_FS ?= n 160 161# Enable roll-back protection of REE file system using RPMB. 162# Roll-back protection only works if CFG_RPMB_FS = y. 163CFG_REE_FS_INTEGRITY_RPMB ?= $(CFG_RPMB_FS) 164$(eval $(call cfg-depends-all,CFG_REE_FS_INTEGRITY_RPMB,CFG_RPMB_FS)) 165 166# Device identifier used when CFG_RPMB_FS = y. 167# The exact meaning of this value is platform-dependent. On Linux, the 168# tee-supplicant process will open /dev/mmcblk<id>rpmb 169CFG_RPMB_FS_DEV_ID ?= 0 170 171# This config variable determines the number of entries read in from RPMB at 172# once whenever a function traverses the RPMB FS. Increasing the default value 173# has the following consequences: 174# - More memory required on heap. A single FAT entry currently has a size of 175# 256 bytes. 176# - Potentially significant speed-ups for RPMB I/O. Depending on how many 177# entries a function needs to traverse, the number of time-consuming RPMB 178# read-in operations can be reduced. 179# Chosing a proper value is both platform- (available memory) and use-case- 180# dependent (potential number of FAT fs entries), so overwrite in platform 181# config files 182CFG_RPMB_FS_RD_ENTRIES ?= 8 183 184# Enables caching of FAT FS entries when set to a value greater than zero. 185# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS 186# entries. The cache is populated when FAT FS entries are initially read in. 187# When traversing the FAT FS entries, we read from the cache instead of reading 188# in the entries from RPMB storage. Consequently, when a FAT FS entry is 189# written, the cache is updated. In scenarios where an estimate of the number 190# of FAT FS entries can be made, the cache may be specifically tailored to 191# store all entries. The caching can improve RPMB I/O at the cost 192# of additional memory. 193# Without caching, we temporarily require 194# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 195# while traversing the FAT FS (e.g. in read_fat). 196# For example 8*256 bytes = 2kB while in read_fat. 197# With caching, we constantly require up to 198# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 199# depending on how many elements are in the cache, and additional temporary 200# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory 201# in case the cache is too small to hold all elements when traversing. 202CFG_RPMB_FS_CACHE_ENTRIES ?= 0 203 204# Print RPMB data frames sent to and received from the RPMB device 205CFG_RPMB_FS_DEBUG_DATA ?= n 206 207# Clear RPMB content at cold boot 208CFG_RPMB_RESET_FAT ?= n 209 210# Use a hard coded RPMB key instead of deriving it from the platform HUK 211CFG_RPMB_TESTKEY ?= n 212 213# Enables RPMB key programming by the TEE, in case the RPMB partition has not 214# been configured yet. 215# !!! Security warning !!! 216# Do *NOT* enable this in product builds, as doing so would allow the TEE to 217# leak the RPMB key. 218# This option is useful in the following situations: 219# - Testing 220# - RPMB key provisioning in a controlled environment (factory setup) 221CFG_RPMB_WRITE_KEY ?= n 222 223# For the kernel driver to enable in-kernel RPMB routing it must know in 224# advance that OP-TEE supports it. Setting CFG_RPMB_ANNOUNCE_PROBE_CAP=y 225# will announce OP-TEE's capability for RPMB probing to the kernel and it 226# will use in-kernel RPMB routing, without it all RPMB commands will be 227# routed to tee-supplicant. This option is intended give some control over 228# how the RPMB commands are routed to simplify testing. 229CFG_RPMB_ANNOUNCE_PROBE_CAP ?= y 230 231_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS) 232 233# Signing key for OP-TEE TA's 234# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy 235# key and then set TA_PUBLIC_KEY to match public key from the HSM. 236# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS. 237TA_SIGN_KEY ?= keys/default_ta.pem 238TA_PUBLIC_KEY ?= $(TA_SIGN_KEY) 239 240# Subkeys is a complement to the normal TA_SIGN_KEY where a subkey is used 241# to verify a TA instead. To sign a TA using a previously prepared subkey 242# two new options are added, TA_SUBKEY_ARGS and TA_SUBKEY_DEPS. It is 243# typically used by assigning the following in the TA Makefile: 244# BINARY = <TA-uuid-string> 245# TA_SIGN_KEY = subkey.pem 246# TA_SUBKEY_ARGS = --subkey subkey.bin --name subkey_ta 247# TA_SUBKEY_DEPS = subkey.bin 248# See the documentation for more details on subkeys. 249 250# Include lib/libutils/isoc in the build? Most platforms need this, but some 251# may not because they obtain the isoc functions from elsewhere 252CFG_LIBUTILS_WITH_ISOC ?= y 253 254# Enables floating point support for user TAs 255# ARM32: EABI defines both a soft-float ABI and a hard-float ABI, 256# hard-float is basically a super set of soft-float. Hard-float 257# requires all the support routines provided for soft-float, but the 258# compiler may choose to optimize to not use some of them and use 259# the floating-point registers instead. 260# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or 261# nothing with ` -mgeneral-regs-only`) 262# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types 263CFG_TA_FLOAT_SUPPORT ?= y 264 265# Stack unwinding: print a stack dump to the console on core or TA abort, or 266# when a TA panics. 267# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be 268# unwound (not paged TAs, however). 269# Note that 32-bit ARM code needs unwind tables for this to work, so enabling 270# this option will increase the size of the 32-bit TEE binary by a few KB. 271# Similarly, TAs have to be compiled with -funwind-tables (default when the 272# option is set) otherwise they can't be unwound. 273# Warning: since the unwind sequence for user-mode (TA) code is implemented in 274# the privileged layer of OP-TEE, enabling this feature will weaken the 275# user/kernel isolation. Therefore it should be disabled in release builds. 276ifeq ($(CFG_TEE_CORE_DEBUG),y) 277CFG_UNWIND ?= y 278endif 279 280# Enable support for dynamically loaded user TAs 281CFG_WITH_USER_TA ?= y 282 283# Build user TAs included in this source tree 284CFG_BUILD_IN_TREE_TA ?= y 285 286# Choosing the architecture(s) of user-mode libraries (used by TAs) 287# 288# Platforms may define a list of supported architectures for user-mode code 289# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64", 290# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32". 291# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits, 292# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y). 293# The first entry in $(supported-ta-targets) has a special role, see 294# CFG_USER_TA_TARGET_<ta-name> below. 295# 296# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or 297# change the order of the values. 298# 299# The list of TA architectures is ultimately stored in $(ta-targets). 300 301# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if 302# defined, selects the unique TA architecture mode for building the in-tree TA 303# <ta-name>. Can be either ta_arm32 or ta_arm64. 304# By default, in-tree TAs are built using the first architecture specified in 305# $(ta-targets). 306 307# Address Space Layout Randomization for user-mode Trusted Applications 308# 309# When this flag is enabled, the ELF loader will introduce a random offset 310# when mapping the application in user space. ASLR makes the exploitation of 311# memory corruption vulnerabilities more difficult. 312CFG_TA_ASLR ?= y 313 314# How much ASLR may shift the base address (in pages). The base address is 315# randomly shifted by an integer number of pages comprised between these two 316# values. Bigger ranges are more secure because they make the addresses harder 317# to guess at the expense of using more memory for the page tables. 318CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0 319CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128 320 321# Address Space Layout Randomization for TEE Core 322# 323# When this flag is enabled, the early init code will introduce a random 324# offset when mapping TEE Core. ASLR makes the exploitation of memory 325# corruption vulnerabilities more difficult. 326CFG_CORE_ASLR ?= y 327 328# Stack Protection for TEE Core 329# This flag enables the compiler stack protection mechanisms -fstack-protector. 330# It will check the stack canary value before returning from a function to 331# prevent buffer overflow attacks. Stack protector canary logic will be added 332# for vulnerable functions that contain: 333# - A character array larger than 8 bytes. 334# - An 8-bit integer array larger than 8 bytes. 335# - A call to alloca() with either a variable size or a constant size bigger 336# than 8 bytes. 337CFG_CORE_STACK_PROTECTOR ?= n 338# This enable stack protector flag -fstack-protector-strong. Stack protector 339# canary logic will be added for vulnerable functions that contain: 340# - An array of any size and type. 341# - A call to alloca(). 342# - A local variable that has its address taken. 343CFG_CORE_STACK_PROTECTOR_STRONG ?= y 344# This enable stack protector flag -fstack-protector-all. Stack protector canary 345# logic will be added to all functions regardless of their vulnerability. 346CFG_CORE_STACK_PROTECTOR_ALL ?= n 347# Stack Protection for TA 348CFG_TA_STACK_PROTECTOR ?= n 349CFG_TA_STACK_PROTECTOR_STRONG ?= y 350CFG_TA_STACK_PROTECTOR_ALL ?= n 351 352_CFG_CORE_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_CORE_STACK_PROTECTOR \ 353 CFG_CORE_STACK_PROTECTOR_STRONG \ 354 CFG_CORE_STACK_PROTECTOR_ALL) 355_CFG_TA_STACK_PROTECTOR := $(call cfg-one-enabled, CFG_TA_STACK_PROTECTOR \ 356 CFG_TA_STACK_PROTECTOR_STRONG \ 357 CFG_TA_STACK_PROTECTOR_ALL) 358 359# Load user TAs from the REE filesystem via tee-supplicant 360CFG_REE_FS_TA ?= y 361 362# Pre-authentication of TA binaries loaded from the REE filesystem 363# 364# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the 365# "Secure DDR" pool, check the signature, then process the file only if it is 366# valid. 367# - If disabled: hash the binaries as they are being processed and verify the 368# signature as a last step. 369CFG_REE_FS_TA_BUFFERED ?= n 370$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA)) 371 372# When CFG_REE_FS=y: 373# Allow secure storage in the REE FS to be entirely deleted without causing 374# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or 375# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH) 376# can be used to reset the secure storage to a clean, empty state. 377# Intended to be used for testing only since it weakens storage security. 378# Warning: If enabled for release build then it will break rollback protection 379# of TAs and the entire REE FS secure storage. 380CFG_REE_FS_ALLOW_RESET ?= n 381 382# Support for loading user TAs from a special section in the TEE binary. 383# Such TAs are available even before tee-supplicant is available (hence their 384# name), but note that many services exported to TAs may need tee-supplicant, 385# so early use is limited to a subset of the TEE Internal Core API (crypto...) 386# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF 387# file(s). For example: 388# $ make ... \ 389# EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \ 390# path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf" 391# Typical build steps: 392# $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries, 393# # headers, makefiles), ready to build TAs. 394# # CFG_EARLY_TA=y is optional, it prevents 395# # later library recompilations. 396# <build some TAs> 397# $ make EARLY_TA_PATHS=<paths> # Build OP-TEE and embbed the TA(s) 398# 399# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at 400# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as: 401# <name-of-ta>/<uuid> 402# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067 403ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),) 404$(call force,CFG_EARLY_TA,y) 405else 406CFG_EARLY_TA ?= n 407endif 408 409ifeq ($(CFG_EARLY_TA),y) 410$(call force,CFG_EMBEDDED_TS,y) 411endif 412 413ifneq ($(SP_PATHS),) 414$(call force,CFG_EMBEDDED_TS,y) 415else 416CFG_SECURE_PARTITION ?= n 417endif 418 419ifeq ($(CFG_SECURE_PARTITION),y) 420$(call force,CFG_EMBEDDED_TS,y) 421endif 422 423ifeq ($(CFG_EMBEDDED_TS),y) 424$(call force,CFG_ZLIB,y) 425endif 426 427# By default the early TAs are compressed in the TEE binary, it is possible to 428# not compress them with CFG_EARLY_TA_COMPRESS=n 429CFG_EARLY_TA_COMPRESS ?= y 430 431# Enable paging, requires SRAM, can't be enabled by default 432CFG_WITH_PAGER ?= n 433 434# Use the pager for user TAs 435CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER) 436 437# If paging of user TAs, that is, R/W paging default to enable paging of 438# TAG and IV in order to reduce heap usage. 439CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA) 440 441# Runtime lock dependency checker: ensures that a proper locking hierarchy is 442# used in the TEE core when acquiring and releasing mutexes. Any violation will 443# cause a panic as soon as the invalid locking condition is detected. If 444# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm 445# records the call stacks when locks are taken, and prints them when a 446# potential deadlock is found. 447# Expect a significant performance impact when enabling this. 448CFG_LOCKDEP ?= n 449CFG_LOCKDEP_RECORD_STACK ?= y 450 451# BestFit algorithm in bget reduces the fragmentation of the heap when running 452# with the pager enabled or lockdep 453CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP) 454 455# Enable support for detected undefined behavior in C 456# Uses a lot of memory, can't be enabled by default 457CFG_CORE_SANITIZE_UNDEFINED ?= n 458CFG_TA_SANITIZE_UNDEFINED ?= n 459 460# Enable Kernel Address sanitizer, has a huge performance impact, uses a 461# lot of memory and need platform specific adaptations, can't be enabled by 462# default 463CFG_CORE_SANITIZE_KADDRESS ?= n 464 465ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_CORE_ASLR)) 466$(error CFG_CORE_SANITIZE_KADDRESS and CFG_CORE_ASLR are not compatible) 467endif 468 469# Add stack guards before/after stacks and periodically check them 470CFG_WITH_STACK_CANARIES ?= y 471 472# Use compiler instrumentation to troubleshoot stack overflows. 473# When enabled, most C functions check the stack pointer against the current 474# stack limits on entry and panic immediately if it is out of range. 475CFG_CORE_DEBUG_CHECK_STACKS ?= n 476 477# Use when the default stack allocations are not sufficient. 478CFG_STACK_THREAD_EXTRA ?= 0 479CFG_STACK_TMP_EXTRA ?= 0 480 481# Device Tree support 482# 483# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing 484# device tree blob (DTB) parsing from the core. 485# 486# When CFG_DT is enabled, the TEE _start function expects to find 487# the address of a DTB in register X2/R2 provided by the early boot stage 488# or value 0 if boot stage provides no DTB. 489# 490# When CFG_EXTERNAL_DT is enabled, the external device tree ABI is implemented 491# and the external device tree is expected to be used/modified. Its value 492# defaults to CFG_DT. 493# 494# When CFG_MAP_EXT_DT_SECURE is enabled the external device tree is expected to 495# be in the secure memory. 496# 497# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the 498# relative path of a DTS file located in core/arch/$(ARCH)/dts. 499# The DTS file is compiled into a DTB file which content is embedded in a 500# read-only section of the core. 501ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),) 502CFG_EMBED_DTB ?= y 503endif 504ifeq ($(filter y,$(CFG_EMBED_DTB) $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 505 $(CFG_CORE_EL3_SPMC)),y) 506$(call force,CFG_DT,y) 507endif 508CFG_EMBED_DTB ?= n 509CFG_DT ?= n 510CFG_EXTERNAL_DT ?= $(CFG_DT) 511CFG_MAP_EXT_DT_SECURE ?= n 512ifeq ($(CFG_MAP_EXT_DT_SECURE),y) 513$(call force,CFG_DT,y) 514endif 515 516# This option enables OP-TEE to support boot arguments handover via Transfer 517# List defined in Firmware Handoff specification. 518# Note: This is an experimental feature and incompatible ABI changes can be 519# expected. It should be off by default until Firmware Handoff specification 520# has a stable release. 521# This feature requires the support of Device Tree. 522CFG_TRANSFER_LIST ?= n 523ifeq ($(CFG_TRANSFER_LIST),y) 524$(call force,CFG_DT,y) 525$(call force,CFG_EXTERNAL_DT,y) 526$(call force,CFG_MAP_EXT_DT_SECURE,y) 527endif 528 529# Maximum size of the Device Tree Blob, has to be large enough to allow 530# editing of the supplied DTB. 531CFG_DTB_MAX_SIZE ?= 0x10000 532 533# CFG_DT_CACHED_NODE_INFO, when enabled, parses the embedded DT at boot 534# time and caches some information to speed up retrieve of DT node data, 535# more specifically those for which libfdt parses the full DTB to find 536# the target node information. 537CFG_DT_CACHED_NODE_INFO ?= $(CFG_EMBED_DTB) 538$(eval $(call cfg-depends-all,CFG_DT_CACHED_NODE_INFO,CFG_EMBED_DTB)) 539 540# Maximum size of the init info data passed to Secure Partitions. 541CFG_SP_INIT_INFO_MAX_SIZE ?= 0x1000 542 543# Device Tree Overlay support. 544# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing 545# external DTB. The overlay is created when no valid DTB overlay is found. 546# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external 547# DTB location. 548# External DTB location (physical address) is provided either by boot 549# argument arg2 or from CFG_DT_ADDR if defined. 550# A subsequent boot stage can then merge the generated overlay DTB into a main 551# DTB using the standard fdt_overlay_apply() method. 552CFG_EXTERNAL_DTB_OVERLAY ?= n 553CFG_GENERATE_DTB_OVERLAY ?= n 554 555ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY)) 556$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive) 557endif 558_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \ 559 CFG_GENERATE_DTB_OVERLAY) 560 561# All embedded tests are supposed to be disabled by default, this flag 562# is used to control the default value of all other embedded tests 563CFG_ENABLE_EMBEDDED_TESTS ?= n 564 565# Enable core self tests and related pseudo TAs 566CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS) 567 568# Compiles bget_main_test() to be called from a test TA 569CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS) 570 571# CFG_DT_DRIVER_EMBEDDED_TEST when enabled embedded DT driver probing tests. 572# This also requires embedding a DTB with expected content. 573# Default disable CFG_DRIVERS_CLK_EARLY_PROBE to probe clocks as other drivers. 574# A probe deferral test mandates CFG_DRIVERS_DT_RECURSIVE_PROBE=n. 575CFG_DT_DRIVER_EMBEDDED_TEST ?= n 576ifeq ($(CFG_DT_DRIVER_EMBEDDED_TEST),y) 577CFG_DRIVERS_CLK ?= y 578CFG_DRIVERS_GPIO ?= y 579CFG_DRIVERS_RSTCTRL ?= y 580CFG_DRIVERS_CLK_EARLY_PROBE ?= n 581$(call force,CFG_DRIVERS_DT_RECURSIVE_PROBE,n,Mandated by CFG_DT_DRIVER_EMBEDDED_TEST) 582endif 583 584# CFG_WITH_STATS when enabled embeds PTA statistics service to allow non-secure 585# clients to retrieve debug and statistics information on core and loaded TAs. 586CFG_WITH_STATS ?= n 587 588# CFG_DRIVERS_DT_RECURSIVE_PROBE when enabled forces a recursive subnode 589# parsing in the embedded DTB for driver probing. The alternative is 590# an exploration based on compatible drivers found. It is default disabled. 591CFG_DRIVERS_DT_RECURSIVE_PROBE ?= n 592 593# This option enables OP-TEE to respond to SMP boot request: the Rich OS 594# issues this to request OP-TEE to release secondaries cores out of reset, 595# with specific core number and non-secure entry address. 596CFG_BOOT_SECONDARY_REQUEST ?= n 597 598# Default heap size for Core, 64 kB 599CFG_CORE_HEAP_SIZE ?= 65536 600 601# Default size of nexus heap. 16 kB. Used only if CFG_NS_VIRTUALIZATION 602# is enabled 603CFG_CORE_NEX_HEAP_SIZE ?= 16384 604 605# TA profiling. 606# When this option is enabled, OP-TEE can execute Trusted Applications 607# instrumented with GCC's -pg flag and will output profiling information 608# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in 609# tee-supplicant) 610# Note: this does not work well with shared libraries at the moment for a 611# couple of reasons: 612# 1. The profiling code assumes a unique executable section in the TA VA space. 613# 2. The code used to detect at run time if the TA is intrumented assumes that 614# the TA is linked statically. 615CFG_TA_GPROF_SUPPORT ?= n 616 617# TA function tracing. 618# When this option is enabled, OP-TEE can execute Trusted Applications 619# instrumented with GCC's -pg flag and will output function tracing 620# information for all functions compiled with -pg to 621# /tmp/ftrace-<ta_uuid>.out (path is defined in tee-supplicant). 622CFG_FTRACE_SUPPORT ?= n 623 624# Core syscall function tracing. 625# When this option is enabled, OP-TEE core is instrumented with GCC's 626# -pg flag and will output syscall function graph in user TA ftrace 627# buffer 628CFG_SYSCALL_FTRACE ?= n 629$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT) 630 631# Enable to compile user TA libraries with profiling (-pg). 632# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT. 633CFG_ULIBS_MCOUNT ?= n 634# Profiling/tracing of syscall wrapper (utee_*) 635CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT) 636 637ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT))) 638ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT))) 639$(error Cannot instrument user libraries if user mode profiling is disabled) 640endif 641endif 642 643# Build libutee, libutils, libmbedtls as shared libraries. 644# - Static libraries are still generated when this is enabled, but TAs will use 645# the shared libraries unless explicitly linked with the -static flag. 646# - Shared libraries are made of two files: for example, libutee is 647# libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file 648# is a totally standard shared object, and should be used to link against. 649# The '.ta' file is a signed version of the '.so' and should be installed 650# in the same way as TAs so that they can be found at runtime. 651CFG_ULIBS_SHARED ?= n 652 653ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED)) 654$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible) 655endif 656 657# CFG_GP_SOCKETS 658# Enable Global Platform Sockets support 659CFG_GP_SOCKETS ?= y 660 661# Enable Secure Data Path support in OP-TEE core (TA may be invoked with 662# invocation parameters referring to specific secure memories). 663CFG_SECURE_DATA_PATH ?= n 664 665# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y 666# TA binaries are stored encrypted in the REE FS and are protected by 667# metadata in secure storage. 668CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA) 669$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA)) 670 671# Enable the pseudo TA that managages TA storage in secure storage 672CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA) 673$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA)) 674 675# Enable the pseudo TA for misc. auxilary services, extending existing 676# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy 677# pool etc...) 678CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA) 679$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA)) 680 681# Enable the pseudo TA for enumeration of TEE based devices for the normal 682# world OS. 683CFG_DEVICE_ENUM_PTA ?= y 684 685# The attestation pseudo TA provides an interface to request measurements of 686# a TA or the TEE binary. 687CFG_ATTESTATION_PTA ?= n 688$(eval $(call cfg-depends-all,CFG_ATTESTATION_PTA,_CFG_WITH_SECURE_STORAGE)) 689 690# RSA key size (in bits) for the attestation PTA. Must be at least 528 given 691# other algorithm parameters (RSA PSS with SHA-256 and 32-byte salt), but 692# note that such a low value is not secure. 693# See https://tools.ietf.org/html/rfc8017#section-8.1.1 and 694# https://tools.ietf.org/html/rfc8017#section-9.1.1 695# emLen >= hlen + sLen + 2 = 32 + 32 + 2 = 66 696# emLen = ceil((modBits - 1) / 8) => emLen is the key size in bytes 697CFG_ATTESTATION_PTA_KEY_SIZE ?= 3072 698 699# Define the number of cores per cluster used in calculating core position. 700# The cluster number is shifted by this value and added to the core ID, 701# so its value represents log2(cores/cluster). 702# Default is 2**(2) = 4 cores per cluster. 703CFG_CORE_CLUSTER_SHIFT ?= 2 704 705# Define the number of threads per core used in calculating processing 706# element's position. The core number is shifted by this value and added to 707# the thread ID, so its value represents log2(threads/core). 708# Default is 2**(0) = 1 threads per core. 709CFG_CORE_THREAD_SHIFT ?= 0 710 711# Enable support for dynamic shared memory (shared memory anywhere in 712# non-secure memory). 713CFG_CORE_DYN_SHM ?= y 714 715# Enable support for reserved shared memory (shared memory in a carved out 716# memory area). 717CFG_CORE_RESERVED_SHM ?= y 718 719# Enables support for larger physical addresses, that is, it will define 720# paddr_t as a 64-bit type. 721CFG_CORE_LARGE_PHYS_ADDR ?= n 722 723# Define the maximum size, in bits, for big numbers in the Internal Core API 724# Arithmetical functions. This does *not* influence the key size that may be 725# manipulated through the Cryptographic API. 726# Set this to a lower value to reduce the TA memory footprint. 727CFG_TA_BIGNUM_MAX_BITS ?= 2048 728 729# Not used since libmpa was removed. Force the values to catch build scripts 730# that would set = n. 731$(call force,CFG_TA_MBEDTLS_MPI,y) 732$(call force,CFG_TA_MBEDTLS,y) 733 734# Compile the TA library mbedTLS with self test functions, the functions 735# need to be called to test anything 736CFG_TA_MBEDTLS_SELF_TEST ?= y 737 738# By default use tomcrypt as the main crypto lib providing an implementation 739# for the API in <crypto/crypto.h> 740# CFG_CRYPTOLIB_NAME is used as libname and 741# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library 742# 743# It's also possible to configure to use mbedtls instead of tomcrypt. 744# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and 745# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively. 746CFG_CRYPTOLIB_NAME ?= tomcrypt 747CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt 748 749# Not used since libmpa was removed. Force the value to catch build scripts 750# that would set = n. 751$(call force,CFG_CORE_MBEDTLS_MPI,y) 752 753# When enabled, CFG_NS_VIRTUALIZATION embeds support for virtualization in 754# the non-secure world. OP-TEE will not work without a compatible hypervisor 755# in the non-secure world if this option is enabled. 756# 757# CFG_VIRTUALIZATION served the same purpose as CFG_NS_VIRTUALIZATION but is 758# deprecated as the configuration switch name was ambiguous regarding which 759# world has virtualization enabled. 760ifneq (undefined,$(flavor CFG_VIRTUALIZATION)) 761$(info WARNING: CFG_VIRTUALIZATION is deprecated, use CFG_NS_VIRTUALIZATION instead) 762CFG_NS_VIRTUALIZATION ?= $(CFG_VIRTUALIZATION) 763ifneq ($(CFG_NS_VIRTUALIZATION),$(CFG_VIRTUALIZATION)) 764$(error Inconsistent CFG_NS_VIRTUALIZATION=$(CFG_NS_VIRTUALIZATION) and CFG_VIRTUALIZATION=$(CFG_VIRTUALIZATION)) 765endif 766endif # CFG_VIRTUALIZATION defined 767CFG_NS_VIRTUALIZATION ?= n 768 769ifeq ($(CFG_NS_VIRTUALIZATION),y) 770$(call force,CFG_CORE_RODATA_NOEXEC,y) 771$(call force,CFG_CORE_RWDATA_NOEXEC,y) 772 773# Default number of virtual guests 774CFG_VIRT_GUEST_COUNT ?= 2 775endif 776 777# Enables backwards compatible derivation of RPMB and SSK keys 778CFG_CORE_HUK_SUBKEY_COMPAT ?= y 779 780# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation. 781# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y. 782CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n 783 784# Compress and encode conf.mk into the TEE core, and show the encoded string on 785# boot (with severity TRACE_INFO). 786CFG_SHOW_CONF_ON_BOOT ?= n 787 788# Enables support for passing a TPM Event Log stored in secure memory 789# to a TA or FF-A SP, so a TPM Service could use it to extend any measurement 790# taken before the service was up and running. 791CFG_CORE_TPM_EVENT_LOG ?= n 792 793# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core. 794# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_* 795# 796# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support. 797# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support. 798# CFG_SCMI_MSG_SMT embeds a SMT header in shared device memory buffers 799# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support. 800# CFG_SCMI_MSG_PERF_DOMAIN embeds SCMI performance domain management protocol 801# CFG_SCMI_MSG_SMT_FASTCALL_ENTRY embeds fastcall SMC entry with SMT memory 802# CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY embeds interrupt entry with SMT memory 803# CFG_SCMI_MSG_SMT_THREAD_ENTRY embeds threaded entry with SMT memory 804# CFG_SCMI_MSG_SHM_MSG embeds a MSG header in cached shared memory buffer 805CFG_SCMI_MSG_DRIVERS ?= n 806ifeq ($(CFG_SCMI_MSG_DRIVERS),y) 807CFG_SCMI_MSG_CLOCK ?= n 808CFG_SCMI_MSG_RESET_DOMAIN ?= n 809CFG_SCMI_MSG_SHM_MSG ?= n 810CFG_SCMI_MSG_SMT ?= n 811CFG_SCMI_MSG_SMT_FASTCALL_ENTRY ?= n 812CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY ?= n 813CFG_SCMI_MSG_SMT_THREAD_ENTRY ?= n 814CFG_SCMI_MSG_THREAD_ENTRY ?= n 815CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n 816CFG_SCMI_MSG_PERF_DOMAIN ?= n 817$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_FASTCALL_ENTRY,CFG_SCMI_MSG_SMT)) 818$(eval $(call cfg-depends-all,CFG_SCMI_MSG_SMT_INTERRUPT_ENTRY,CFG_SCMI_MSG_SMT)) 819$(eval $(call cfg-depends-one,CFG_SCMI_MSG_SMT_THREAD_ENTRY,CFG_SCMI_MSG_SMT CFG_SCMI_MSG_SHM_MSG)) 820ifeq ($(CFG_SCMI_MSG_SMT),y) 821_CFG_SCMI_PTA_SMT_HEADER := y 822endif 823ifeq ($(CFG_SCMI_MSG_SHM_MSG),y) 824_CFG_SCMI_PTA_MSG_HEADER := y 825endif 826endif 827 828# CFG_SCMI_SCPFW, when enabled, embeds the reference SCMI server implementation 829# from SCP-firmware package as an built-in SCMI stack in core. This 830# configuration mandates target product identifier is configured with 831# CFG_SCMI_SCPFW_PRODUCT and the SCP-firmware source tree path with 832# CFG_SCP_FIRMWARE. 833CFG_SCMI_SCPFW ?= n 834 835ifeq ($(CFG_SCMI_SCPFW),y) 836$(call force,CFG_SCMI_PTA,y,Required by CFG_SCMI_SCPFW) 837ifeq (,$(CFG_SCMI_SCPFW_PRODUCT)) 838$(error CFG_SCMI_SCPFW=y requires CFG_SCMI_SCPFW_PRODUCT configuration) 839endif 840ifeq (,$(wildcard $(CFG_SCP_FIRMWARE)/CMakeLists.txt)) 841$(error CFG_SCMI_SCPFW=y requires CFG_SCP_FIRMWARE configuration) 842endif 843endif #CFG_SCMI_SCPFW 844 845ifeq ($(CFG_SCMI_MSG_DRIVERS)-$(CFG_SCMI_SCPFW),y-y) 846$(error CFG_SCMI_MSG_DRIVERS=y and CFG_SCMI_SCPFW=y are mutually exclusive) 847endif 848 849# When enabled, CFG_SCMI_MSG_USE_CLK embeds SCMI clocks registering services for 850# the platform SCMI server and implements the platform plat_scmi_clock_*() 851# functions. 852CFG_SCMI_MSG_USE_CLK ?= n 853$(eval $(call cfg-depends-all,CFG_SCMI_MSG_USE_CLK,CFG_DRIVERS_CLK CFG_SCMI_MSG_DRIVERS)) 854 855# Enable SCMI PTA interface for REE SCMI agents 856CFG_SCMI_PTA ?= n 857ifeq ($(CFG_SCMI_PTA),y) 858_CFG_SCMI_PTA_SMT_HEADER ?= n 859_CFG_SCMI_PTA_MSG_HEADER ?= n 860endif 861 862ifneq ($(CFG_STMM_PATH),) 863$(call force,CFG_WITH_STMM_SP,y) 864else 865CFG_WITH_STMM_SP ?= n 866endif 867ifeq ($(CFG_WITH_STMM_SP),y) 868$(call force,CFG_ZLIB,y) 869endif 870 871# When enabled checks that buffers passed to the GP Internal Core API 872# comply with the rules added as annotations as part of the definition of 873# the API. For example preventing buffers in non-secure shared memory when 874# not allowed. 875CFG_TA_STRICT_ANNOTATION_CHECKS ?= y 876 877# When enabled accepts the DES key sizes excluding parity bits as in 878# the GP Internal API Specification v1.0 879CFG_COMPAT_GP10_DES ?= y 880 881# Defines a limit for many levels TAs may call each others. 882CFG_CORE_MAX_SYSCALL_RECURSION ?= 4 883 884# Pseudo-TA to export hardware RNG output to Normal World 885# RNG characteristics are platform specific 886CFG_HWRNG_PTA ?= n 887ifeq ($(CFG_HWRNG_PTA),y) 888# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited 889CFG_HWRNG_RATE ?= 0 890# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits 891ifeq (,$(CFG_HWRNG_QUALITY)) 892$(error CFG_HWRNG_QUALITY not defined) 893endif 894endif 895 896# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate 897# shared memory for each secure thread. When disabled, RPC shared 898# memory is released once the secure thread has completed is execution. 899ifeq ($(CFG_WITH_PAGER),y) 900CFG_PREALLOC_RPC_CACHE ?= n 901endif 902CFG_PREALLOC_RPC_CACHE ?= y 903 904# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core. 905# This clock framework allows to describe clock tree and provides functions to 906# get and configure the clocks. 907# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support 908# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks 909# CFG_DRIVERS_CLK_EARLY_PROBE makes clocks probed at early_init initcall level. 910# CFG_DRIVERS_CLK_PRINT_TREE embeds a helper function to print the clock tree 911# state on OP-TEE core console with the info trace level. 912CFG_DRIVERS_CLK ?= n 913CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT) 914CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT) 915CFG_DRIVERS_CLK_EARLY_PROBE ?= $(CFG_DRIVERS_CLK_DT) 916CFG_DRIVERS_CLK_PRINT_TREE ?= n 917 918$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT)) 919$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT)) 920 921# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in 922# OP-TEE core to provide reset controls on subsystems of the devices. 923CFG_DRIVERS_RSTCTRL ?= n 924 925# When enabled, CFG_DRIVERS_GPIO embeds a GPIO controller framework in 926# OP-TEE core to provide GPIO support for drivers. 927CFG_DRIVERS_GPIO ?= n 928 929# When enabled, CFG_DRIVERS_I2C provides I2C controller and devices support. 930CFG_DRIVERS_I2C ?= n 931 932# When enabled, CFG_DRIVERS_NVMEM provides a framework to register nvmem 933# providers and allow consumer drivers to get NVMEM cells using the Device Tree. 934CFG_DRIVERS_NVMEM ?= n 935 936# When enabled, CFG_DRIVERS_PINCTRL embeds a pin muxing controller framework in 937# OP-TEE core to provide drivers a way to apply pin muxing configurations based 938# on device-tree. 939CFG_DRIVERS_PINCTRL ?= n 940 941# When enabled, CFG_DRIVERS_REGULATOR embeds a voltage regulator framework in 942# OP-TEE core to provide drivers a common regulator interface and describe 943# the regulators dependencies using an embedded device tree. 944# 945# When enabled, CFG_REGULATOR_FIXED embeds a voltage regulator driver for 946# DT compatible "regulator-fixed" devices. 947# 948# When enabled, CFG_REGULATOR_GPIO embeds a voltage regulator driver for 949# DT compatible "regulator-gpio" devices. 950# 951# CFG_DRIVERS_REGULATOR_PRINT_TREE embeds a helper function to print the 952# regulator tree state on OP-TEE core console with the info trace level. 953CFG_DRIVERS_REGULATOR ?= n 954CFG_DRIVERS_REGULATOR_PRINT_TREE ?= n 955CFG_REGULATOR_FIXED ?= n 956CFG_REGULATOR_GPIO ?= n 957 958$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_FIXED, \ 959 CFG_DRIVERS_REGULATOR CFG_DT)) 960$(eval $(call cfg-enable-all-depends,CFG_REGULATOR_GPIO, \ 961 CFG_DRIVERS_REGULATOR CFG_DT CFG_DRIVERS_GPIO)) 962 963# When enabled, CFG_INSECURE permits insecure configuration of OP-TEE core 964# and shows a print (info level) when booting up the device that 965# indicates that the board runs a standard developer configuration. 966# 967# A developer configuration doesn't necessarily have to be secure. The intention 968# is that the one making products based on OP-TEE should override this flag in 969# plat-xxx/conf.mk for the platform they're basing their products on after 970# they've finalized implementing stubbed functionality (see OP-TEE 971# documentation/Porting guidelines) as well as vendor specific security 972# configuration. 973# 974# CFG_WARN_INSECURE served the same purpose as CFG_INSECURE but is deprecated. 975ifneq (undefined,$(flavor CFG_WARN_INSECURE)) 976$(info WARNING: CFG_WARN_INSECURE is deprecated, use CFG_INSECURE instead) 977CFG_INSECURE ?= $(CFG_WARN_INSECURE) 978ifneq ($(CFG_INSECURE),$(CFG_WARN_INSECURE)) 979$(error Inconsistent CFG_INSECURE=$(CFG_INSECURE) and CFG_WARN_INSECURE=$(CFG_WARN_INSECURE)) 980endif 981endif # CFG_WARN_INSECURE defined 982CFG_INSECURE ?= y 983 984ifneq ($(CFG_INSECURE),y) 985ifneq ($(CFG_CORE_ASLR_SEED),) 986$(error CFG_CORE_ASLR_SEED requires CFG_INSECURE=y) 987endif 988endif 989 990# Enables warnings for declarations mixed with statements 991CFG_WARN_DECL_AFTER_STATEMENT ?= y 992 993# Branch Target Identification (part of the ARMv8.5 Extensions) provides a 994# mechanism to limit the set of locations to which computed branch instructions 995# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's 996# that support it, enable this option. A GCC toolchain built with 997# --enable-standard-branch-protection is needed to use this option. 998CFG_CORE_BTI ?= n 999 1000$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core)) 1001 1002# To make use of BTI in user space libraries and TA's on CPU's that support it, 1003# enable this option. 1004CFG_TA_BTI ?= $(CFG_CORE_BTI) 1005 1006$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core)) 1007 1008ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI)) 1009$(error CFG_NS_VIRTUALIZATION and BTI are currently incompatible) 1010endif 1011 1012ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI)) 1013$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible) 1014endif 1015 1016# Memory Tagging Extension (part of the ARMv8.5 Extensions) implements lock 1017# and key access to memory. This is a hardware supported alternative to 1018# CFG_CORE_SANITIZE_KADDRESS which covers both S-EL1 and S-EL0. 1019CFG_MEMTAG ?= n 1020 1021$(eval $(call cfg-depends-all,CFG_MEMTAG,CFG_ARM64_core)) 1022ifeq (y-y,$(CFG_CORE_SANITIZE_KADDRESS)-$(CFG_MEMTAG)) 1023$(error CFG_CORE_SANITIZE_KADDRESS and CFG_MEMTAG are not compatible) 1024endif 1025ifeq (y-y,$(CFG_WITH_PAGER)-$(CFG_MEMTAG)) 1026$(error CFG_WITH_PAGER and CFG_MEMTAG are not compatible) 1027endif 1028 1029# Privileged Access Never (PAN, part of the ARMv8.1 Extensions) can be 1030# used to restrict accesses to unprivileged memory from privileged mode. 1031# For RISC-V architecture, CSR {m|s}status.SUM bit is used to implement PAN. 1032CFG_PAN ?= n 1033 1034$(eval $(call cfg-depends-one,CFG_PAN,CFG_ARM64_core CFG_RV64_core CFG_RV32_core)) 1035 1036ifeq ($(filter y, $(CFG_CORE_SEL1_SPMC) $(CFG_CORE_SEL2_SPMC) \ 1037 $(CFG_CORE_EL3_SPMC)),y) 1038# FF-A case, handled via the FF-A ABI 1039CFG_CORE_ASYNC_NOTIF ?= y 1040$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,n) 1041else 1042# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable support 1043# for sending asynchronous notifications to normal world. 1044# Interrupt ID must be configurged by the platform too. Currently is only 1045# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined. 1046CFG_CORE_ASYNC_NOTIF ?= n 1047$(call force,_CFG_CORE_ASYNC_NOTIF_DEFAULT_IMPL,$(CFG_CORE_ASYNC_NOTIF)) 1048endif 1049 1050# Enable callout service 1051CFG_CALLOUT ?= $(CFG_CORE_ASYNC_NOTIF) 1052 1053# Enable notification based test watchdog 1054CFG_NOTIF_TEST_WD ?= $(call cfg-all-enabled,CFG_ENABLE_EMBEDDED_TESTS \ 1055 CFG_CALLOUT CFG_CORE_ASYNC_NOTIF) 1056$(eval $(call cfg-depends-all,CFG_NOTIF_TEST_WD,CFG_CALLOUT \ 1057 CFG_CORE_ASYNC_NOTIF)) 1058 1059$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \ 1060 CFG_WITH_STATS)) 1061 1062# Pointer Authentication (part of ARMv8.3 Extensions) provides instructions 1063# for signing and authenticating pointers against secret keys. These can 1064# be used to mitigate ROP (Return oriented programming) attacks. This is 1065# currently done by instructing the compiler to add paciasp/autiasp at the 1066# begging and end of functions to sign and verify ELR. 1067# 1068# The CFG_CORE_PAUTH enables these instructions for the core parts 1069# executing at EL1, with one secret key per thread and one secret key per 1070# physical CPU. 1071# 1072# The CFG_TA_PAUTH option enables these instructions for TA's at EL0. When 1073# this option is enabled, TEE core will initialize secret keys per TA. 1074CFG_CORE_PAUTH ?= n 1075CFG_TA_PAUTH ?= $(CFG_CORE_PAUTH) 1076 1077$(eval $(call cfg-depends-all,CFG_CORE_PAUTH,CFG_ARM64_core)) 1078$(eval $(call cfg-depends-all,CFG_TA_PAUTH,CFG_ARM64_core)) 1079 1080ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_CORE_PAUTH)) 1081$(error CFG_NS_VIRTUALIZATION and CFG_CORE_PAUTH are currently incompatible) 1082endif 1083ifeq (y-y,$(CFG_NS_VIRTUALIZATION)-$(CFG_TA_PAUTH)) 1084$(error CFG_NS_VIRTUALIZATION and CFG_TA_PAUTH are currently incompatible) 1085endif 1086 1087ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_TA_PAUTH)) 1088$(error CFG_TA_GPROF_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1089endif 1090 1091ifeq (y-y,$(CFG_FTRACE_SUPPORT)-$(CFG_TA_PAUTH)) 1092$(error CFG_FTRACE_SUPPORT and CFG_TA_PAUTH are currently incompatible) 1093endif 1094 1095# Enable support for generic watchdog registration 1096# This watchdog will then be usable by non-secure world through SMC calls. 1097CFG_WDT ?= n 1098 1099# Enable watchdog SMC handling compatible with arm-smc-wdt Linux driver 1100CFG_WDT_SM_HANDLER ?= n 1101 1102$(eval $(call cfg-enable-all-depends,CFG_WDT_SM_HANDLER,CFG_WDT)) 1103 1104# When CFG_WDT_SM_HANDLER=y, SMC function ID 0x82003D06 default implements 1105# arm-smc-wdt service. Platform can also override this ID with a platform 1106# specific SMC function ID to access arm-smc-wdt service thanks to 1107# optional config switch CFG_WDT_SM_HANDLER_ID. 1108CFG_WDT_SM_HANDLER_ID ?= 0x82003D06 1109 1110# Allow using the udelay/mdelay function for platforms without ARM generic timer 1111# extension. When set to 'n', the plat_get_freq() function must be defined by 1112# the platform code 1113CFG_CORE_HAS_GENERIC_TIMER ?= y 1114 1115# Enable RTC API 1116CFG_DRIVERS_RTC ?= n 1117 1118# Enable PTA for RTC access from non-secure world 1119CFG_RTC_PTA ?= n 1120 1121# Enable the FF-A SPMC tests in xtests 1122CFG_SPMC_TESTS ?= n 1123 1124# Allocate the translation tables needed to map the S-EL0 application 1125# loaded 1126CFG_CORE_PREALLOC_EL0_TBLS ?= n 1127ifeq (y-y,$(CFG_CORE_PREALLOC_EL0_TBLS)-$(CFG_WITH_PAGER)) 1128$(error "CFG_WITH_PAGER can't support CFG_CORE_PREALLOC_EL0_TBLS") 1129endif 1130 1131# CFG_PGT_CACHE_ENTRIES defines the number of entries on the memory 1132# mapping page table cache used for Trusted Application mapping. 1133# CFG_PGT_CACHE_ENTRIES is ignored when CFG_CORE_PREALLOC_EL0_TBLS 1134# is enabled. 1135# 1136# A proper value for CFG_PGT_CACHE_ENTRIES depends on many factors: 1137# CFG_WITH_LPAE, CFG_TA_ASLR, size of TAs, size of memrefs passed 1138# to TA, CFG_ULIBS_SHARED and possibly others. The default value 1139# is based on the number of threads as an indicator on how large 1140# the system might be. 1141ifeq ($(CFG_NUM_THREADS),1) 1142CFG_PGT_CACHE_ENTRIES ?= 4 1143endif 1144ifeq ($(CFG_NUM_THREADS),2) 1145ifneq ($(CFG_WITH_LPAE),y) 1146CFG_PGT_CACHE_ENTRIES ?= 8 1147endif 1148endif 1149CFG_PGT_CACHE_ENTRIES ?= ($(CFG_NUM_THREADS) * 2) 1150 1151# User TA runtime context dump. 1152# When this option is enabled, OP-TEE provides a debug method for 1153# developer to dump user TA's runtime context, including TA's heap stats. 1154# Developer can open a stats PTA session and then invoke command 1155# STATS_CMD_TA_STATS to get the context of loaded TAs. 1156CFG_TA_STATS ?= n 1157 1158# Enables best effort mitigations against fault injected when the hardware 1159# is tampered with. Details in lib/libutils/ext/include/fault_mitigation.h 1160CFG_FAULT_MITIGATION ?= y 1161 1162# Enables TEE Internal Core API v1.1 compatibility for in-tree TAs. Note 1163# that this doesn't affect libutee itself, it's only the TAs compiled with 1164# this set that are affected. Each out-of-tree must set this if to enable 1165# compatibility with version v1.1 as the value of this variable is not 1166# preserved in the TA dev-kit. 1167CFG_TA_OPTEE_CORE_API_COMPAT_1_1 ?= n 1168 1169# Change supported HMAC key size range, from 64 to 1024. 1170# This is needed to pass AOSP Keymaster VTS tests: 1171# Link to tests : https://android.googlesource.com/platform/hardware/interfaces/+/master/keymaster/3.0/vts/functional/keymaster_hidl_hal_test.cpp 1172# Module: VtsHalKeymasterV3_0TargetTest 1173# Testcases: - PerInstance/SigningOperationsTest# 1174# - PerInstance/NewKeyGenerationTest# 1175# - PerInstance/ImportKeyTest# 1176# - PerInstance/EncryptionOperationsTest# 1177# - PerInstance/AttestationTest# 1178# Note that this violates GP requirements of HMAC size range. 1179CFG_HMAC_64_1024_RANGE ?= n 1180 1181# CFG_RSA_PUB_EXPONENT_3, when enabled, allows RSA public exponents in the 1182# range 3 <= e < 2^256. This is needed to pass AOSP KeyMint VTS tests: 1183# Link to tests: https://android.googlesource.com/platform/hardware/interfaces/+/refs/heads/main/security/keymint/aidl/vts/functional/KeyMintTest.cpp 1184# Module: VtsAidlKeyMintTargetTest 1185# Testcases: - PerInstance/EncryptionOperationsTest.RsaNoPaddingSuccess 1186# When CFG_RSA_PUB_EXPONENT_3 is disabled, RSA public exponents must conform 1187# to NIST SP800-56B recommendation and be in the range 65537 <= e < 2^256. 1188CFG_RSA_PUB_EXPONENT_3 ?= n 1189 1190# Enable a hardware pbkdf2 function 1191# By default use standard pbkdf2 implementation 1192CFG_CRYPTO_HW_PBKDF2 ?= n 1193$(eval $(call cfg-depends-all,CFG_CRYPTO_HW_PBKDF2,CFG_CRYPTO_PBKDF2)) 1194 1195# CFG_HALT_CORES_ON_PANIC, when enabled, makes any call to panic() halt the 1196# other cores. The feature currently relies on GIC device to trap the other 1197# cores using an SGI interrupt specified by CFG_HALT_CORES_ON_PANIC_SGI. 1198CFG_HALT_CORES_ON_PANIC ?= n 1199CFG_HALT_CORES_ON_PANIC_SGI ?= 15 1200$(eval $(call cfg-depends-all,CFG_HALT_CORES_ON_PANIC,CFG_GIC)) 1201 1202# Enable automatic discovery of maximal PA supported by the hardware and 1203# use that. Provides easier configuration of virtual platforms where the 1204# maximal PA can vary. 1205CFG_AUTO_MAX_PA_BITS ?= n 1206 1207# CFG_DRIVERS_REMOTEPROC, when enabled, embeds support for remote processor 1208# management including generic DT bindings for the configuration. 1209CFG_DRIVERS_REMOTEPROC ?= n 1210 1211# CFG_REMOTEPROC_PTA, when enabled, embeds remote processor management PTA 1212# service. 1213CFG_REMOTEPROC_PTA ?= n 1214 1215# When enabled, CFG_WIDEVINE_HUK uses the widevine HUK provided by secure 1216# DTB as OP-TEE HUK. 1217CFG_WIDEVINE_HUK ?= n 1218$(eval $(call cfg-depends-all,CFG_WIDEVINE_HUK,CFG_DT)) 1219 1220# When enabled, CFG_WIDEVINE_PTA embeds a PTA that exposes the keys under 1221# DT node "/options/op-tee/widevine" to some specific TAs. 1222CFG_WIDEVINE_PTA ?= n 1223$(eval $(call cfg-depends-all,CFG_WIDEVINE_PTA,CFG_DT CFG_WIDEVINE_HUK)) 1224 1225# When enabled, CFG_VERAISON_ATTESTATION_PTA embeds remote attestation PTA 1226# service. Note: This is an experimental feature and should be used 1227# with caution in production environments. 1228CFG_VERAISON_ATTESTATION_PTA ?= n 1229ifeq ($(CFG_VERAISON_ATTESTATION_PTA),y) 1230$(call force,CFG_QCBOR,y) 1231endif 1232 1233# When enabled, CFG_VERAISON_ATTESTATION_PTA_TEST_KEY embeds a test key. 1234# Note: CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled for 1235# CFG_VERAISON_ATTESTATION_PTA to work. 1236CFG_VERAISON_ATTESTATION_PTA_TEST_KEY ?= y 1237ifneq ($(CFG_VERAISON_ATTESTATION_PTA_TEST_KEY),y) 1238$(error "CFG_VERAISON_ATTESTATION_PTA_TEST_KEY must be enabled") 1239endif 1240 1241# CFG_SEMIHOSTING_CONSOLE, when enabled, embeds a semihosting console driver. 1242# When CFG_SEMIHOSTING_CONSOLE_FILE=NULL, OP-TEE console reads/writes 1243# trace messages from/to the debug terminal of the semihosting host computer. 1244# When CFG_SEMIHOSTING_CONSOLE_FILE="{your_log_file}", OP-TEE console 1245# outputs trace messages to that file. Output to "optee.log" by default. 1246CFG_SEMIHOSTING_CONSOLE ?= n 1247ifeq ($(CFG_SEMIHOSTING_CONSOLE),y) 1248$(call force,CFG_SEMIHOSTING,y) 1249endif 1250CFG_SEMIHOSTING_CONSOLE_FILE ?= "optee.log" 1251ifeq ($(CFG_SEMIHOSTING_CONSOLE_FILE),) 1252$(error CFG_SEMIHOSTING_CONSOLE_FILE cannot be empty) 1253endif 1254 1255# Semihosting is a debugging mechanism that enables code running on an embedded 1256# system (also called the target) to communicate with and use the I/O of the 1257# host computer. 1258CFG_SEMIHOSTING ?= n 1259 1260# CFG_FFA_CONSOLE, when enabled, embeds a FFA console driver. OP-TEE console 1261# writes trace messages via FFA interface to the SPM (Secure Partition Manager) 1262# like hafnium. 1263CFG_FFA_CONSOLE ?= n 1264 1265# CFG_CORE_UNSAFE_MODEXP, when enabled, makes modular exponentiation on TEE 1266# core use 'unsafe' algorithm having better performance. To resist against 1267# timing attacks, 'safe' one is designed to take constant-time that is 1268# generally much slower. 1269CFG_CORE_UNSAFE_MODEXP ?= n 1270 1271# CFG_TA_MBEDTLS_UNSAFE_MODEXP, similar to CFG_CORE_UNSAFE_MODEXP, 1272# when enabled, makes MBedTLS library for TAs use 'unsafe' modular 1273# exponentiation algorithm. 1274CFG_TA_MBEDTLS_UNSAFE_MODEXP ?= n 1275 1276# CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL, when enabled, initializes 1277# thread_core_local[current_core_pos] before calling C code. 1278ifeq ($(ARCH),arm) 1279$(call force,CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL,y) 1280else 1281CFG_BOOT_INIT_CURRENT_THREAD_CORE_LOCAL ?= n 1282endif 1283 1284# CFG_DYN_CONFIG, when enabled, use dynamic memory allocation for translation 1285# tables. Not supported with pager. 1286ifeq ($(CFG_WITH_PAGER),y) 1287$(call force,CFG_DYN_CONFIG,n,conflicts with CFG_WITH_PAGER) 1288else 1289CFG_DYN_CONFIG ?= y 1290endif 1291 1292# CFG_EXTERNAL_ABORT_PLAT_HANDLER is used to implement platform-specific 1293# handling of external abort implementing the plat_external_abort_handler() 1294# function. 1295CFG_EXTERNAL_ABORT_PLAT_HANDLER ?= n 1296 1297# CFG_TA_LIBGCC, when enabled, links user mode TAs with libgcc. Linking 1298# TAs with libgcc is deprecated, but keep this flag while sorting out the 1299# out remaining issues with supporting C++. 1300CFG_TA_LIBGCC ?= y 1301